Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Patrick Rudolph | e357ac3 | 2024-02-23 09:47:24 +0100 | [diff] [blame] | 2 | #include <acpi/acpigen_pci.h> |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 3 | #include <arch/ioapic.h> |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 4 | #include <console/console.h> |
Marc Jones | 8b522db | 2020-10-12 11:58:46 -0600 | [diff] [blame] | 5 | #include <console/debug.h> |
Marc Jones | 64c6223 | 2021-04-06 14:09:30 -0600 | [diff] [blame] | 6 | #include <cpu/x86/mp.h> |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 7 | #include <device/pci.h> |
Marc Jones | 456b7ba | 2021-04-15 16:24:54 -0600 | [diff] [blame] | 8 | #include <device/pci_ids.h> |
Patrick Rudolph | 106d7b3 | 2024-01-18 09:14:03 +0100 | [diff] [blame] | 9 | #include <device/pci_def.h> |
Dinesh Gehlot | 6fecff2 | 2023-01-17 06:02:16 +0000 | [diff] [blame] | 10 | #include <gpio.h> |
Marc Jones | 81ef9c2 | 2021-01-21 10:53:47 -0700 | [diff] [blame] | 11 | #include <intelblocks/acpi.h> |
Subrata Banik | 1366e44 | 2020-09-29 13:55:50 +0530 | [diff] [blame] | 12 | #include <intelblocks/lpc_lib.h> |
Andrey Petrov | 4e48ac0 | 2020-04-30 14:08:19 -0700 | [diff] [blame] | 13 | #include <intelblocks/p2sb.h> |
Jonathan Zhang | 3172f98 | 2020-05-28 17:53:48 -0700 | [diff] [blame] | 14 | #include <soc/acpi.h> |
Marc Jones | 1f50084 | 2020-10-15 14:32:51 -0600 | [diff] [blame] | 15 | #include <soc/chip_common.h> |
Arthur Heymans | 3d80253 | 2020-11-12 21:17:56 +0100 | [diff] [blame] | 16 | #include <soc/pch.h> |
Tim Chu | 13c4445 | 2022-11-25 10:31:00 +0000 | [diff] [blame] | 17 | #include <soc/soc_pch.h> |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 18 | #include <soc/ramstage.h> |
Arthur Heymans | 0f91e9c | 2020-10-16 13:15:50 +0200 | [diff] [blame] | 19 | #include <soc/p2sb.h> |
Jonathan Zhang | 7919d61 | 2020-04-02 17:27:54 -0700 | [diff] [blame] | 20 | #include <soc/soc_util.h> |
Marc Jones | 5851f9d | 2020-11-02 15:30:10 -0700 | [diff] [blame] | 21 | #include <soc/util.h> |
Arthur Heymans | 0f91e9c | 2020-10-16 13:15:50 +0200 | [diff] [blame] | 22 | #include <soc/pci_devs.h> |
Jonathan Zhang | 7919d61 | 2020-04-02 17:27:54 -0700 | [diff] [blame] | 23 | |
Marc Jones | b9365ef | 2020-10-11 15:00:36 -0600 | [diff] [blame] | 24 | /* UPD parameters to be initialized before SiliconInit */ |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 25 | void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd) |
| 26 | { |
Marc Jones | b9365ef | 2020-10-11 15:00:36 -0600 | [diff] [blame] | 27 | mainboard_silicon_init_params(silupd); |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 28 | } |
| 29 | |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 30 | static struct device_operations cpu_bus_ops = { |
Nico Huber | 2f8ba69 | 2020-04-05 14:05:24 +0200 | [diff] [blame] | 31 | .read_resources = noop_read_resources, |
| 32 | .set_resources = noop_set_resources, |
Arthur Heymans | 829e8e6 | 2023-01-30 19:09:34 +0100 | [diff] [blame] | 33 | .init = mp_cpu_bus_init, |
Jonathan Zhang | c110595 | 2020-06-03 15:55:28 -0700 | [diff] [blame] | 34 | .acpi_fill_ssdt = generate_cpu_entries, |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 35 | }; |
| 36 | |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 37 | struct pci_operations soc_pci_ops = { |
| 38 | .set_subsystem = pci_dev_set_subsystem, |
| 39 | }; |
| 40 | |
Jonathan Zhang | 7919d61 | 2020-04-02 17:27:54 -0700 | [diff] [blame] | 41 | static void chip_enable_dev(struct device *dev) |
| 42 | { |
| 43 | /* Set the operations if it is a special bus type */ |
| 44 | if (dev->path.type == DEVICE_PATH_DOMAIN) { |
Shuo Liu | 255f927 | 2023-03-29 20:14:11 +0800 | [diff] [blame] | 45 | /* domain ops are assigned at their creation */ |
Jonathan Zhang | 7919d61 | 2020-04-02 17:27:54 -0700 | [diff] [blame] | 46 | } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { |
| 47 | dev->ops = &cpu_bus_ops; |
Michael Niewöhner | 8913b78 | 2020-12-11 22:13:44 +0100 | [diff] [blame] | 48 | } else if (dev->path.type == DEVICE_PATH_GPIO) { |
| 49 | block_gpio_enable(dev); |
Jonathan Zhang | 7919d61 | 2020-04-02 17:27:54 -0700 | [diff] [blame] | 50 | } |
| 51 | } |
| 52 | |
Rocky Phagura | afefa50 | 2021-02-16 21:45:24 -0800 | [diff] [blame] | 53 | static void iio_write_mask(u16 bus, u16 dev, u8 func) |
| 54 | { |
| 55 | pci_devfn_t device = PCI_DEV(bus, dev, func); |
| 56 | u32 val = pci_s_read_config32(device, IIO_XPUNCCERRMSK_REG); |
| 57 | val |= (SENT_PCIE_UNSUPP_MASK | RCVD_PCIE_CA_STS_MASK | RCVD_PCIE_UR_STS_MASK); |
| 58 | pci_s_write_config32(device, IIO_XPUNCCERRMSK_REG, val); |
| 59 | |
| 60 | val = pci_s_read_config32(device, RP_UNCERRMSK); |
| 61 | val |= (SURPRISE_DWN_ERR_MSK | UNSUPPORTED_REQ_ERR_MSK); |
| 62 | pci_s_write_config32(device, RP_UNCERRMSK, val); |
| 63 | } |
| 64 | |
| 65 | static void iio_dmi_en_masks(void) |
| 66 | { |
| 67 | pci_devfn_t device; |
| 68 | u32 val; |
| 69 | device = PCI_DEV(DMI_BUS_INDEX, DMI_DEV, DMI_FUNC); |
| 70 | val = pci_s_read_config32(device, IIO_XPUNCCERRMSK_REG); |
| 71 | val |= (SENT_PCIE_UNSUPP_MASK | RCVD_PCIE_CA_STS_MASK | RCVD_PCIE_UR_STS_MASK); |
| 72 | pci_s_write_config32(device, IIO_XPUNCCERRMSK_REG, val); |
| 73 | |
| 74 | val = pci_s_read_config32(device, DMI_UNCERRMSK); |
| 75 | val |= (ECRC_ERR | MLFRMD_TLP | RCV_BUF_OVRFLOW | FLOW_CNTR | POISON_TLP | DLL_PRT_ERR); |
| 76 | pci_s_write_config32(device, DMI_UNCERRMSK, val); |
| 77 | } |
| 78 | |
| 79 | static void iio_enable_masks(void) |
| 80 | { |
| 81 | struct iiostack_resource iio = {0}; |
| 82 | get_iiostack_info(&iio); |
| 83 | int i, k; |
| 84 | for (i = 0; i < iio.no_of_stacks; i++) { |
| 85 | const STACK_RES *st = &iio.res[i]; |
| 86 | if (st->BusBase > 0 && st->BusBase != 0xff) { |
| 87 | for (k = 0; k < DEVICES_PER_IIO_STACK; k++) { |
| 88 | printk(BIOS_DEBUG, "%s: bus:%x dev:%x func:%x\n", __func__, |
| 89 | st->BusBase, k, 0); |
| 90 | iio_write_mask(st->BusBase, k, 0); |
| 91 | } |
| 92 | } |
| 93 | } |
| 94 | iio_dmi_en_masks(); |
| 95 | } |
Marc Jones | 4de7610 | 2021-03-12 14:36:48 -0700 | [diff] [blame] | 96 | |
| 97 | static void set_pcu_locks(void) |
| 98 | { |
Patrick Rudolph | 106d7b3 | 2024-01-18 09:14:03 +0100 | [diff] [blame] | 99 | struct device *dev = NULL; |
Marc Jones | 4de7610 | 2021-03-12 14:36:48 -0700 | [diff] [blame] | 100 | |
Patrick Rudolph | 106d7b3 | 2024-01-18 09:14:03 +0100 | [diff] [blame] | 101 | while ((dev = dev_find_device(PCI_VID_INTEL, PCU_CR0_DEVID, dev))) { |
| 102 | printk(BIOS_SPEW, "%s: locking registers\n", dev_path(dev)); |
| 103 | pci_or_config32(dev, PCU_CR0_P_STATE_LIMITS, P_STATE_LIMITS_LOCK); |
| 104 | pci_or_config32(dev, PCU_CR0_PACKAGE_RAPL_LIMIT_UPR, |
| 105 | PKG_PWR_LIM_LOCK_UPR); |
| 106 | pci_or_config32(dev, PCU_CR0_TURBO_ACTIVATION_RATIO, |
| 107 | TURBO_ACTIVATION_RATIO_LOCK); |
Marc Jones | 4de7610 | 2021-03-12 14:36:48 -0700 | [diff] [blame] | 108 | } |
| 109 | |
Patrick Rudolph | 106d7b3 | 2024-01-18 09:14:03 +0100 | [diff] [blame] | 110 | dev = NULL; |
| 111 | while ((dev = dev_find_device(PCI_VID_INTEL, PCU_CR1_DEVID, dev))) { |
| 112 | printk(BIOS_SPEW, "%s: locking registers\n", dev_path(dev)); |
| 113 | pci_or_config32(dev, PCU_CR1_SAPMCTL, SAPMCTL_LOCK_MASK); |
| 114 | } |
| 115 | |
| 116 | dev = NULL; |
| 117 | while ((dev = dev_find_device(PCI_VID_INTEL, PCU_CR2_DEVID, dev))) { |
| 118 | printk(BIOS_SPEW, "%s: locking registers\n", dev_path(dev)); |
| 119 | pci_or_config32(dev, PCU_CR2_DRAM_PLANE_POWER_LIMIT, |
| 120 | PP_PWR_LIM_LOCK); |
| 121 | pci_or_config32(dev, PCU_CR2_DRAM_POWER_INFO_UPR, |
| 122 | DRAM_POWER_INFO_LOCK_UPR); |
| 123 | } |
| 124 | |
| 125 | dev = NULL; |
| 126 | while ((dev = dev_find_device(PCI_VID_INTEL, PCU_CR3_DEVID, dev))) { |
| 127 | printk(BIOS_SPEW, "%s: locking registers\n", dev_path(dev)); |
| 128 | pci_or_config32(dev, PCU_CR3_CONFIG_TDP_CONTROL, TDP_LOCK); |
| 129 | pci_or_config32(dev, PCU_CR3_FLEX_RATIO, OC_LOCK); |
| 130 | } |
Marc Jones | 4de7610 | 2021-03-12 14:36:48 -0700 | [diff] [blame] | 131 | } |
| 132 | |
Marc Jones | 456b7ba | 2021-04-15 16:24:54 -0600 | [diff] [blame] | 133 | static void set_imc_locks(void) |
| 134 | { |
| 135 | struct device *dev = 0; |
Felix Singer | 43b7f41 | 2022-03-07 04:34:52 +0100 | [diff] [blame] | 136 | while ((dev = dev_find_device(PCI_VID_INTEL, IMC_M2MEM_DEVID, dev))) |
Marc Jones | 456b7ba | 2021-04-15 16:24:54 -0600 | [diff] [blame] | 137 | pci_or_config32(dev, IMC_M2MEM_TIMEOUT, TIMEOUT_LOCK); |
| 138 | } |
| 139 | |
Marc Jones | b20d694 | 2021-04-15 16:25:49 -0600 | [diff] [blame] | 140 | static void set_upi_locks(void) |
| 141 | { |
| 142 | struct device *dev = 0; |
Felix Singer | 43b7f41 | 2022-03-07 04:34:52 +0100 | [diff] [blame] | 143 | while ((dev = dev_find_device(PCI_VID_INTEL, UPI_LL_CR_DEVID, dev))) |
Marc Jones | b20d694 | 2021-04-15 16:25:49 -0600 | [diff] [blame] | 144 | pci_or_config32(dev, UPI_LL_CR_KTIMISCMODLCK, KTIMISCMODLCK_LOCK); |
| 145 | } |
| 146 | |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 147 | static void chip_final(void *data) |
| 148 | { |
Arthur Heymans | 0f91e9c | 2020-10-16 13:15:50 +0200 | [diff] [blame] | 149 | /* Lock SBI */ |
| 150 | pci_or_config32(PCH_DEV_P2SB, P2SBC, SBILOCK); |
Arthur Heymans | 1918553 | 2020-10-27 17:40:22 +0100 | [diff] [blame] | 151 | |
| 152 | /* LOCK PAM */ |
| 153 | pci_or_config32(pcidev_path_on_root(PCI_DEVFN(0, 0)), 0x80, 1 << 0); |
| 154 | |
Marc Jones | 4de7610 | 2021-03-12 14:36:48 -0700 | [diff] [blame] | 155 | set_pcu_locks(); |
Marc Jones | 456b7ba | 2021-04-15 16:24:54 -0600 | [diff] [blame] | 156 | set_imc_locks(); |
Marc Jones | b20d694 | 2021-04-15 16:25:49 -0600 | [diff] [blame] | 157 | set_upi_locks(); |
Marc Jones | 4de7610 | 2021-03-12 14:36:48 -0700 | [diff] [blame] | 158 | |
Andrey Petrov | 4e48ac0 | 2020-04-30 14:08:19 -0700 | [diff] [blame] | 159 | p2sb_hide(); |
Rocky Phagura | afefa50 | 2021-02-16 21:45:24 -0800 | [diff] [blame] | 160 | iio_enable_masks(); |
Jonathan Zhang | bea1980 | 2020-04-13 19:34:53 -0700 | [diff] [blame] | 161 | set_bios_init_completion(); |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 162 | } |
| 163 | |
| 164 | static void chip_init(void *data) |
| 165 | { |
Shuo Liu | 42fa624 | 2024-03-21 00:43:10 +0800 | [diff] [blame] | 166 | unlock_pam_regions(); |
| 167 | |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 168 | printk(BIOS_DEBUG, "coreboot: calling fsp_silicon_init\n"); |
Kyösti Mälkki | cc93c6e | 2021-01-09 22:53:52 +0200 | [diff] [blame] | 169 | fsp_silicon_init(); |
Shuo Liu | 255f927 | 2023-03-29 20:14:11 +0800 | [diff] [blame] | 170 | |
| 171 | attach_iio_stacks(); |
| 172 | |
Arthur Heymans | 3d80253 | 2020-11-12 21:17:56 +0100 | [diff] [blame] | 173 | override_hpet_ioapic_bdf(); |
Subrata Banik | 1366e44 | 2020-09-29 13:55:50 +0530 | [diff] [blame] | 174 | pch_enable_ioapic(); |
Arthur Heymans | 8346307 | 2020-12-16 11:30:40 +0100 | [diff] [blame] | 175 | pch_lock_dmictl(); |
Andrey Petrov | 4e48ac0 | 2020-04-30 14:08:19 -0700 | [diff] [blame] | 176 | p2sb_unhide(); |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 177 | } |
| 178 | |
| 179 | struct chip_operations soc_intel_xeon_sp_cpx_ops = { |
Nicholas Sudsgaard | bfb11be | 2024-01-30 09:53:46 +0900 | [diff] [blame] | 180 | .name = "Intel Cooper Lake-SP", |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 181 | .enable_dev = chip_enable_dev, |
| 182 | .init = chip_init, |
Jonathan Zhang | 7919d61 | 2020-04-02 17:27:54 -0700 | [diff] [blame] | 183 | .final = chip_final, |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 184 | }; |