soc/intel/xeon_sp/cpx: Add IMC locks
Add IMC locks as indicated by the Intel docs.
Change-Id: Id5c43711e80f4e2112c305a9b48d0a4c8509e89b
Signed-off-by: Marc Jones <marcjones@sysproconsulting.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52446
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
diff --git a/src/soc/intel/xeon_sp/cpx/chip.c b/src/soc/intel/xeon_sp/cpx/chip.c
index 34e0e27..f4a9e82 100644
--- a/src/soc/intel/xeon_sp/cpx/chip.c
+++ b/src/soc/intel/xeon_sp/cpx/chip.c
@@ -6,6 +6,7 @@
#include <cpu/x86/lapic.h>
#include <cpu/x86/mp.h>
#include <device/pci.h>
+#include <device/pci_ids.h>
#include <intelblocks/acpi.h>
#include <intelblocks/gpio.h>
#include <intelblocks/lpc_lib.h>
@@ -159,6 +160,13 @@
wrmsr(MSR_FEATURE_CONFIG, msr);
}
+static void set_imc_locks(void)
+{
+ struct device *dev = 0;
+ while ((dev = dev_find_device(PCI_VENDOR_ID_INTEL, IMC_M2MEM_DEVID, dev)))
+ pci_or_config32(dev, IMC_M2MEM_TIMEOUT, TIMEOUT_LOCK);
+}
+
static void chip_final(void *data)
{
/* Lock SBI */
@@ -177,6 +185,7 @@
mp_run_on_all_cpus(set_msr_locks, NULL);
set_pcu_locks();
+ set_imc_locks();
p2sb_hide();
iio_enable_masks();