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Huayang Duanc2ef1022018-09-26 14:24:02 +08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2018 MediaTek Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
Huayang Duan4d15d2f2018-09-26 21:23:53 +080016#include <assert.h>
Huayang Duan078332e2019-08-27 13:36:14 +080017#include <cbfs.h>
Huayang Duan4d15d2f2018-09-26 21:23:53 +080018#include <console/console.h>
Yu-Ping Wue67dce02019-10-14 16:56:50 +080019#include <ip_checksum.h>
Yu-Ping Wu998a3cc2019-10-16 18:29:50 +080020#include <security/vboot/vboot_common.h>
Huayang Duan078332e2019-08-27 13:36:14 +080021#include <soc/dramc_param.h>
Huayang Duan4d15d2f2018-09-26 21:23:53 +080022#include <soc/dramc_pi_api.h>
Huayang Duanc2ef1022018-09-26 14:24:02 +080023#include <soc/emi.h>
Huayang Duan4d15d2f2018-09-26 21:23:53 +080024#include <symbols.h>
Huayang Duanc2ef1022018-09-26 14:24:02 +080025
Yu-Ping Wuffb5ea32019-10-07 15:55:57 +080026static int mt_mem_test(void)
Huayang Duanc2ef1022018-09-26 14:24:02 +080027{
Huayang Duan4d15d2f2018-09-26 21:23:53 +080028 u64 rank_size[RANK_MAX];
29
Julius Wernercd49cce2019-03-05 16:53:33 -080030 if (CONFIG(MEMORY_TEST)) {
Huayang Duan4d15d2f2018-09-26 21:23:53 +080031 size_t r;
32 u8 *addr = _dram;
33
34 dramc_get_rank_size(rank_size);
35
36 for (r = RANK_0; r < RANK_MAX; r++) {
37 int i;
38
39 if (rank_size[r] == 0)
40 break;
41
42 i = complex_mem_test(addr, 0x2000);
43
44 printk(BIOS_DEBUG, "[MEM] complex R/W mem test %s : %d\n",
45 (i == 0) ? "pass" : "fail", i);
46
Yu-Ping Wuffb5ea32019-10-07 15:55:57 +080047 if (i != 0) {
Yu-Ping Wu31ec0c42019-10-09 16:11:47 +080048 printk(BIOS_ERR, "DRAM memory test failed\n");
Yu-Ping Wuffb5ea32019-10-07 15:55:57 +080049 return -1;
50 }
Huayang Duan4d15d2f2018-09-26 21:23:53 +080051
52 addr += rank_size[r];
53 }
54 }
Yu-Ping Wuffb5ea32019-10-07 15:55:57 +080055
56 return 0;
Huayang Duanc2ef1022018-09-26 14:24:02 +080057}
Huayang Duan078332e2019-08-27 13:36:14 +080058
59static void dump_param_header(const struct dramc_param *dparam)
60{
61 const struct dramc_param_header *header = &dparam->header;
62
63 printk(BIOS_DEBUG, "header.status = %#x\n", header->status);
64 printk(BIOS_DEBUG, "header.magic = %#x (expected: %#x)\n",
65 header->magic, DRAMC_PARAM_HEADER_MAGIC);
66 printk(BIOS_DEBUG, "header.version = %#x (expected: %#x)\n",
67 header->version, DRAMC_PARAM_HEADER_VERSION);
68 printk(BIOS_DEBUG, "header.size = %#x (expected: %#lx)\n",
69 header->size, sizeof(*dparam));
70 printk(BIOS_DEBUG, "header.config = %#x\n", header->config);
71 printk(BIOS_DEBUG, "header.flags = %#x\n", header->flags);
72 printk(BIOS_DEBUG, "header.checksum = %#x\n", header->checksum);
73}
74
Yu-Ping Wue67dce02019-10-14 16:56:50 +080075static u32 compute_checksum(const struct dramc_param *dparam)
76{
77 return (u32)compute_ip_checksum(dparam->freq_params,
78 sizeof(dparam->freq_params));
79}
80
Huayang Duan078332e2019-08-27 13:36:14 +080081static int dram_run_fast_calibration(const struct dramc_param *dparam,
82 u16 config)
83{
84 if (!is_valid_dramc_param(dparam)) {
85 printk(BIOS_WARNING,
86 "Invalid DRAM calibration data from flash\n");
87 dump_param_header(dparam);
88 return -1;
89 }
90
Yu-Ping Wu31ec0c42019-10-09 16:11:47 +080091 if (dparam->header.config != config) {
Huayang Duan078332e2019-08-27 13:36:14 +080092 printk(BIOS_WARNING,
93 "Incompatible config for calibration data from flash "
94 "(expected: %#x, saved: %#x)\n",
95 config, dparam->header.config);
96 return -1;
97 }
98
Yu-Ping Wue67dce02019-10-14 16:56:50 +080099 const u32 checksum = compute_checksum(dparam);
100 if (dparam->header.checksum != checksum) {
101 printk(BIOS_ERR,
102 "Invalid DRAM calibration checksum from flash "
103 "(expected: %#x, saved: %#x)\n",
104 checksum, dparam->header.checksum);
105 return -1;
106 }
107
Huayang Duan078332e2019-08-27 13:36:14 +0800108 return 0;
109}
110
111static int dram_run_full_calibration(struct dramc_param *dparam, u16 config)
112{
113 initialize_dramc_param(dparam, config);
114
115 /* Load and run the provided blob for full-calibration if available */
116 struct prog dram = PROG_INIT(PROG_REFCODE, CONFIG_CBFS_PREFIX "/dram");
117
118 if (prog_locate(&dram))
119 return -1;
120
121 if (cbfs_prog_stage_load(&dram))
122 return -2;
123
Hung-Te Linbeeab4e2019-10-15 17:49:24 +0800124 dparam->do_putc = do_putchar;
Huayang Duan078332e2019-08-27 13:36:14 +0800125 prog_set_entry(&dram, prog_entry(&dram), dparam);
126 prog_run(&dram);
127
128 if (dparam->header.status != DRAMC_SUCCESS) {
129 printk(BIOS_ERR, "Full calibration failed: status = %d\n",
130 dparam->header.status);
131 return -3;
132 }
133
134 if (!(dparam->header.flags & DRAMC_FLAG_HAS_SAVED_DATA)) {
135 printk(BIOS_ERR,
136 "Full calibration executed without saving parameters. "
137 "Please ensure the blob is built properly.\n");
138 return -4;
139 }
140
141 return 0;
142}
143
144static void set_source_to_flash(struct sdram_params *freq_params)
145{
146 for (u8 shuffle = DRAM_DFS_SHUFFLE_1; shuffle < DRAM_DFS_SHUFFLE_MAX;
147 shuffle++)
148 freq_params[shuffle].source = DRAMC_PARAM_SOURCE_FLASH;
149}
150
151static void init_sdram_params(struct sdram_params *dst,
152 const struct sdram_params *src)
153{
154 for (u8 shuffle = DRAM_DFS_SHUFFLE_1; shuffle < DRAM_DFS_SHUFFLE_MAX;
155 shuffle++)
156 memcpy(&dst[shuffle], src, sizeof(*dst));
157}
158
159void mt_mem_init(struct dramc_param_ops *dparam_ops)
160{
161 struct dramc_param *dparam = dparam_ops->param;
Huayang Duan078332e2019-08-27 13:36:14 +0800162
163 u16 config = 0;
164 if (CONFIG(MT8183_DRAM_EMCP))
165 config |= DRAMC_CONFIG_EMCP;
166
Yu-Ping Wu998a3cc2019-10-16 18:29:50 +0800167 const bool recovery_mode = vboot_recovery_mode_enabled();
168
Huayang Duan078332e2019-08-27 13:36:14 +0800169 /* Load calibration params from flash and run fast calibration */
Yu-Ping Wu998a3cc2019-10-16 18:29:50 +0800170 if (recovery_mode) {
171 printk(BIOS_WARNING, "Skip loading cached calibration data\n");
Yu-Ping Wu46009ea2019-10-17 13:38:32 +0800172 if (vboot_recovery_mode_memory_retrain()) {
173 printk(BIOS_WARNING, "Retrain memory in next boot\n");
174 /* Use 0xFF as erased flash data. */
175 memset(dparam, 0xff, sizeof(*dparam));
176 dparam_ops->write_to_flash(dparam);
177 }
Yu-Ping Wu998a3cc2019-10-16 18:29:50 +0800178 } else if (dparam_ops->read_from_flash(dparam)) {
179 printk(BIOS_INFO, "DRAM-K: Fast Calibration\n");
Huayang Duan078332e2019-08-27 13:36:14 +0800180 if (dram_run_fast_calibration(dparam, config) == 0) {
181 printk(BIOS_INFO,
Yu-Ping Wu998a3cc2019-10-16 18:29:50 +0800182 "Calibration params loaded from flash\n");
Yu-Ping Wuffb5ea32019-10-07 15:55:57 +0800183 if (mt_set_emi(dparam) == 0 && mt_mem_test() == 0)
184 return;
Yu-Ping Wu998a3cc2019-10-16 18:29:50 +0800185 } else {
186 printk(BIOS_ERR,
187 "Failed to apply cached calibration data\n");
Huayang Duan078332e2019-08-27 13:36:14 +0800188 }
189 } else {
190 printk(BIOS_WARNING,
191 "Failed to read calibration data from flash\n");
192 }
193
194 /* Run full calibration */
Yu-Ping Wu998a3cc2019-10-16 18:29:50 +0800195 printk(BIOS_INFO, "DRAM-K: Full Calibration\n");
Huayang Duan078332e2019-08-27 13:36:14 +0800196 int err = dram_run_full_calibration(dparam, config);
197 if (err == 0) {
198 printk(BIOS_INFO, "Successfully loaded DRAM blobs and "
199 "ran DRAM calibration\n");
Yu-Ping Wu998a3cc2019-10-16 18:29:50 +0800200 /*
201 * In recovery mode the system boots in RO but the flash params
202 * should be calibrated for RW so we can't mix them up.
203 */
204 if (!recovery_mode) {
205 set_source_to_flash(dparam->freq_params);
206 dparam->header.checksum = compute_checksum(dparam);
207 dparam_ops->write_to_flash(dparam);
208 printk(BIOS_DEBUG, "Calibration params saved to flash: "
209 "version=%#x, size=%#x\n",
210 dparam->header.version, dparam->header.size);
211 }
Huayang Duan078332e2019-08-27 13:36:14 +0800212 return;
213 }
214
215 printk(BIOS_ERR, "Failed to do full calibration (%d), "
216 "falling back to load default sdram param\n", err);
217
218 /* Init params from sdram configs and run partial calibration */
Yu-Ping Wu998a3cc2019-10-16 18:29:50 +0800219 printk(BIOS_INFO, "DRAM-K: Partial Calibration\n");
Yu-Ping Wu0e5b1962019-10-07 16:57:24 +0800220 init_sdram_params(dparam->freq_params, get_sdram_config());
Yu-Ping Wuffb5ea32019-10-07 15:55:57 +0800221 if (mt_set_emi(dparam) != 0)
222 die("Set emi failed with params from sdram config\n");
223 if (mt_mem_test() != 0)
224 die("Memory test failed with params from sdram config\n");
Huayang Duan078332e2019-08-27 13:36:14 +0800225}