Jonathan A. Kollasch | 3e4f7a3 | 2020-01-10 13:23:02 -0600 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Jonathan A. Kollasch | 3e4f7a3 | 2020-01-10 13:23:02 -0600 | [diff] [blame] | 2 | |
Jonathan A. Kollasch | 3e4f7a3 | 2020-01-10 13:23:02 -0600 | [diff] [blame] | 3 | #include <device/pci_ops.h> |
| 4 | #include <device/pnp_def.h> |
| 5 | #include <device/pnp_ops.h> |
Jonathan A. Kollasch | 3e4f7a3 | 2020-01-10 13:23:02 -0600 | [diff] [blame] | 6 | #include <bootblock_common.h> |
| 7 | #include <northbridge/intel/sandybridge/sandybridge.h> |
Jonathan A. Kollasch | 3e4f7a3 | 2020-01-10 13:23:02 -0600 | [diff] [blame] | 8 | #include <southbridge/intel/bd82x6x/pch.h> |
Jonathan A. Kollasch | 3e4f7a3 | 2020-01-10 13:23:02 -0600 | [diff] [blame] | 9 | #include <superio/nuvoton/common/nuvoton.h> |
| 10 | #include <superio/nuvoton/nct6776/nct6776.h> |
| 11 | #include <superio/nuvoton/wpcm450/wpcm450.h> |
Elyes HAOUAS | 2b75ce2 | 2020-04-29 07:41:33 +0200 | [diff] [blame] | 12 | |
Jonathan A. Kollasch | 3e4f7a3 | 2020-01-10 13:23:02 -0600 | [diff] [blame] | 13 | #include "x9scl.h" |
| 14 | |
| 15 | #define SERIAL_DEV PNP_DEV(X9SCL_NCT6776_PNP_BASE, NCT6776_SP1) |
| 16 | #define KCS_DEV PNP_DEV(X9SCL_WPCM450_PNP_BASE, 0x11) |
| 17 | |
| 18 | #define SUPERIO_INITVAL(reg, data) {(reg), (data)} |
| 19 | #define SUPERIO_BANK(x) SUPERIO_INITVAL(0x07, (x)) |
| 20 | |
| 21 | const struct southbridge_usb_port mainboard_usb_ports[] = { |
| 22 | { 1, 0, 0 }, /* ? USB0 1d.0 port 1 */ |
| 23 | { 1, 0, 0 }, /* ? USB1 1d.0 port 2 */ |
| 24 | { 1, 0, 1 }, /* ? USB2 1d.0 port 3 */ |
| 25 | { 1, 0, 1 }, /* ? USB3 1d.0 port 4 */ |
| 26 | { 1, 0, 2 }, /* ? USB4 1d.0 port 5 */ |
| 27 | { 1, 0, 2 }, /* ? USB5 1d.0 port 6 */ |
| 28 | { 1, 0, 3 }, /* ? ??? 1a.0 port 1 */ |
| 29 | { 1, 0, 3 }, /* ? BMC 1a.0 port 2 */ |
| 30 | { 1, 0, 4 }, /* ? ??? 1a.0 port 3 */ |
| 31 | { 1, 0, 4 }, /* ? USB11 1a.0 port 4 */ |
| 32 | { 1, 0, 6 }, /* ? USB12 1a.0 port 5 */ |
| 33 | { 1, 0, 5 }, /* ? USB13 1a.0 port 6 */ |
| 34 | { 1, 0, 5 }, |
| 35 | { 1, 0, 6 }, |
| 36 | }; |
| 37 | |
| 38 | static const uint8_t superio_initvals[][2] = { |
| 39 | /* Global config registers */ |
| 40 | SUPERIO_INITVAL(0x1a, 0xc8), |
| 41 | SUPERIO_INITVAL(0x1b, 0x68), |
| 42 | SUPERIO_INITVAL(0x1c, 0x83), |
| 43 | SUPERIO_INITVAL(0x24, 0x24), |
Jonathan A. Kollasch | 3e4f7a3 | 2020-01-10 13:23:02 -0600 | [diff] [blame] | 44 | SUPERIO_INITVAL(0x2a, 0x00), |
| 45 | SUPERIO_INITVAL(0x2b, 0x42), |
| 46 | SUPERIO_INITVAL(0x2c, 0x80), |
| 47 | |
| 48 | SUPERIO_BANK(0x9), /* GPIO[2345] */ |
| 49 | SUPERIO_INITVAL(0x30, 0x0c), |
| 50 | SUPERIO_INITVAL(0xe0, 0xcf), |
| 51 | SUPERIO_INITVAL(0xe4, 0xbd), |
| 52 | SUPERIO_INITVAL(0xe5, 0x42), |
| 53 | SUPERIO_INITVAL(0xe9, 0x10), |
| 54 | SUPERIO_INITVAL(0xea, 0x40), |
| 55 | SUPERIO_INITVAL(0xf0, 0xff), |
| 56 | SUPERIO_INITVAL(0xf1, 0x02), |
| 57 | |
| 58 | SUPERIO_BANK(0xb), /* HWM & LED */ |
| 59 | SUPERIO_INITVAL(0xf7, 0x07), |
| 60 | SUPERIO_INITVAL(0xf8, 0x40), |
| 61 | SUPERIO_INITVAL(0x30, 0x01), |
| 62 | SUPERIO_INITVAL(0x60, X9SCL_NCT6776_HWM_BASE >> 8), |
| 63 | SUPERIO_INITVAL(0x61, X9SCL_NCT6776_HWM_BASE & 0xff), |
| 64 | |
| 65 | SUPERIO_BANK(0x5), /* KBC */ |
| 66 | SUPERIO_INITVAL(0xf0, 0x83), |
| 67 | SUPERIO_INITVAL(0x30, 0x01), |
| 68 | |
| 69 | SUPERIO_BANK(0x0), /* FDC */ |
| 70 | SUPERIO_INITVAL(0x30, 0x80), |
Jonathan A. Kollasch | 3e4f7a3 | 2020-01-10 13:23:02 -0600 | [diff] [blame] | 71 | }; |
| 72 | |
Jonathan A. Kollasch | 3e4f7a3 | 2020-01-10 13:23:02 -0600 | [diff] [blame] | 73 | static void superio_init(void) |
| 74 | { |
| 75 | const pnp_devfn_t dev = PNP_DEV(X9SCL_NCT6776_PNP_BASE, 0); |
| 76 | |
| 77 | nuvoton_pnp_enter_conf_state(dev); |
| 78 | for (size_t i = 0; i < ARRAY_SIZE(superio_initvals); i++) |
| 79 | pnp_write_config(dev, superio_initvals[i][0], superio_initvals[i][1]); |
| 80 | nuvoton_pnp_exit_conf_state(dev); |
| 81 | } |
| 82 | |
| 83 | static void bmc_init(void) |
| 84 | { |
| 85 | pnp_devfn_t dev = KCS_DEV; |
| 86 | |
| 87 | pnp_write_config(dev, 0x21, 0x11); |
| 88 | |
| 89 | pnp_set_logical_device(dev); |
| 90 | pnp_set_enable(dev, 0); |
| 91 | pnp_set_iobase(dev, PNP_IDX_IO0, X9SCL_WPCM450_KCS_BASE + 0); |
| 92 | pnp_set_iobase(dev, PNP_IDX_IO1, X9SCL_WPCM450_KCS_BASE + 1); |
| 93 | pnp_set_iobase(dev, PNP_IDX_IRQ0, 0); |
| 94 | pnp_set_enable(dev, 1); |
Jonathan A. Kollasch | 3e4f7a3 | 2020-01-10 13:23:02 -0600 | [diff] [blame] | 95 | } |
| 96 | |
| 97 | void bootblock_mainboard_early_init(void) |
| 98 | { |
| 99 | nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); |
| 100 | superio_init(); |
| 101 | bmc_init(); |
| 102 | } |
| 103 | |
Jonathan A. Kollasch | 3e4f7a3 | 2020-01-10 13:23:02 -0600 | [diff] [blame] | 104 | void mainboard_early_init(int s3resume) |
| 105 | { |
| 106 | /* Disable IGD VGA decode, no GTT or GFX stolen */ |
| 107 | pci_write_config16(PCI_DEV(0, 0, 0), GGC, 2); |
| 108 | } |