Kyösti Mälkki | cb08e16 | 2013-10-15 17:19:41 +0300 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2011 Google Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Kyösti Mälkki | cb08e16 | 2013-10-15 17:19:41 +0300 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | // Use simple device model for this file even in ramstage |
| 17 | #define __SIMPLE_DEVICE__ |
| 18 | |
| 19 | #include <arch/io.h> |
| 20 | #include <cbmem.h> |
| 21 | #include "haswell.h" |
| 22 | |
Kyösti Mälkki | f1e3c76 | 2014-12-22 12:28:07 +0200 | [diff] [blame] | 23 | static uintptr_t smm_region_start(void) |
Kyösti Mälkki | cb08e16 | 2013-10-15 17:19:41 +0300 | [diff] [blame] | 24 | { |
| 25 | /* |
| 26 | * Base of TSEG is top of usable DRAM below 4GiB. The register has |
Martin Roth | 128c104 | 2016-11-18 09:29:03 -0700 | [diff] [blame] | 27 | * 1 MiB alignment. |
Kyösti Mälkki | cb08e16 | 2013-10-15 17:19:41 +0300 | [diff] [blame] | 28 | */ |
Kyösti Mälkki | f1e3c76 | 2014-12-22 12:28:07 +0200 | [diff] [blame] | 29 | uintptr_t tom = pci_read_config32(PCI_DEV(0,0,0), TSEG); |
| 30 | return tom & ~((1 << 20) - 1); |
| 31 | } |
| 32 | |
| 33 | void *cbmem_top(void) |
| 34 | { |
| 35 | return (void *)smm_region_start(); |
Kyösti Mälkki | cb08e16 | 2013-10-15 17:19:41 +0300 | [diff] [blame] | 36 | } |