Angel Pons | 0612b27 | 2020-04-05 15:46:56 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Karthikeyan Ramasubramanian | cc7cdb1 | 2019-03-20 11:38:01 -0600 | [diff] [blame] | 2 | |
| 3 | #include <device/mmio.h> |
| 4 | #include <device/pci_ops.h> |
| 5 | #include <elog.h> |
| 6 | #include <intelblocks/xhci.h> |
| 7 | #include <soc/pci_devs.h> |
| 8 | #include <stdint.h> |
| 9 | |
| 10 | /* Wake on disconnect enable */ |
| 11 | #define XHCI_STATUS_WDE (1 << 26) |
| 12 | /* Wake on connect enable */ |
| 13 | #define XHCI_STATUS_WCE (1 << 25) |
| 14 | /* Port link status change */ |
| 15 | #define XHCI_STATUS_PLC (1 << 22) |
| 16 | /* Connect status change */ |
| 17 | #define XHCI_STATUS_CSC (1 << 17) |
| 18 | /* Port link status */ |
| 19 | #define XHCI_STATUS_PLS_SHIFT (5) |
| 20 | #define XHCI_STATUS_PLS_MASK (0xF << XHCI_STATUS_PLS_SHIFT) |
| 21 | #define XHCI_STATUS_PLS_RESUME (15 << XHCI_STATUS_PLS_SHIFT) |
| 22 | |
Tim Wawrzynczak | 56fcfb5 | 2020-11-10 13:39:37 -0700 | [diff] [blame] | 23 | static bool xhci_csc_set(uint32_t port_status) |
Karthikeyan Ramasubramanian | cc7cdb1 | 2019-03-20 11:38:01 -0600 | [diff] [blame] | 24 | { |
| 25 | return !!(port_status & XHCI_STATUS_CSC); |
| 26 | } |
| 27 | |
Tim Wawrzynczak | 56fcfb5 | 2020-11-10 13:39:37 -0700 | [diff] [blame] | 28 | static bool xhci_wake_capable(uint32_t port_status) |
Karthikeyan Ramasubramanian | cc7cdb1 | 2019-03-20 11:38:01 -0600 | [diff] [blame] | 29 | { |
| 30 | return !!((port_status & XHCI_STATUS_WCE) | |
| 31 | (port_status & XHCI_STATUS_WDE)); |
| 32 | } |
| 33 | |
Tim Wawrzynczak | 56fcfb5 | 2020-11-10 13:39:37 -0700 | [diff] [blame] | 34 | static bool xhci_plc_set(uint32_t port_status) |
Karthikeyan Ramasubramanian | cc7cdb1 | 2019-03-20 11:38:01 -0600 | [diff] [blame] | 35 | { |
| 36 | return !!(port_status & XHCI_STATUS_PLC); |
| 37 | } |
| 38 | |
Tim Wawrzynczak | 56fcfb5 | 2020-11-10 13:39:37 -0700 | [diff] [blame] | 39 | static bool xhci_resume(uint32_t port_status) |
Karthikeyan Ramasubramanian | cc7cdb1 | 2019-03-20 11:38:01 -0600 | [diff] [blame] | 40 | { |
| 41 | return (port_status & XHCI_STATUS_PLS_MASK) == XHCI_STATUS_PLS_RESUME; |
| 42 | } |
| 43 | |
| 44 | /* |
| 45 | * Check if a particular USB port caused wake by: |
| 46 | * 1. Change in connect/disconnect status (if enabled) |
| 47 | * 2. USB device activity |
| 48 | * |
| 49 | * Params: |
| 50 | * base : MMIO address of first port. |
| 51 | * num : Number of ports. |
| 52 | * event : Event that needs to be added in case wake source is found. |
| 53 | * |
| 54 | * Return value: |
| 55 | * true : Wake source was found. |
| 56 | * false : Wake source was not found. |
| 57 | */ |
Tim Wawrzynczak | 56fcfb5 | 2020-11-10 13:39:37 -0700 | [diff] [blame] | 58 | static bool xhci_port_wake_check(uintptr_t base, uint8_t num, uint8_t host_event, uint8_t event) |
Karthikeyan Ramasubramanian | cc7cdb1 | 2019-03-20 11:38:01 -0600 | [diff] [blame] | 59 | { |
| 60 | uint32_t i, port_status; |
| 61 | bool found = false; |
| 62 | |
| 63 | for (i = 0; i < num; i++, base += 0x10) { |
| 64 | /* Read port status and control register for the port. */ |
| 65 | port_status = read32((void *)base); |
| 66 | |
| 67 | /* Ensure that the status is not all 1s. */ |
| 68 | if (port_status == 0xffffffff) |
| 69 | continue; |
| 70 | |
| 71 | /* |
| 72 | * Check if CSC bit is set and port is capable of wake on |
| 73 | * connect/disconnect to identify if the port caused wake |
Elyes HAOUAS | 44f558e | 2020-02-24 13:26:04 +0100 | [diff] [blame] | 74 | * event for USB attach/detach. |
Karthikeyan Ramasubramanian | cc7cdb1 | 2019-03-20 11:38:01 -0600 | [diff] [blame] | 75 | */ |
Tim Wawrzynczak | 56fcfb5 | 2020-11-10 13:39:37 -0700 | [diff] [blame] | 76 | if (xhci_csc_set(port_status) && |
| 77 | xhci_wake_capable(port_status)) { |
| 78 | elog_add_event_wake(host_event, 0); |
Karthikeyan Ramasubramanian | cc7cdb1 | 2019-03-20 11:38:01 -0600 | [diff] [blame] | 79 | elog_add_event_wake(event, i + 1); |
| 80 | found = true; |
| 81 | continue; |
| 82 | } |
| 83 | |
| 84 | /* |
| 85 | * Check if PLC is set and PLS indicates resume to identify if |
Elyes HAOUAS | 44f558e | 2020-02-24 13:26:04 +0100 | [diff] [blame] | 86 | * the port caused wake event for USB activity. |
Karthikeyan Ramasubramanian | cc7cdb1 | 2019-03-20 11:38:01 -0600 | [diff] [blame] | 87 | */ |
Tim Wawrzynczak | 56fcfb5 | 2020-11-10 13:39:37 -0700 | [diff] [blame] | 88 | if (xhci_plc_set(port_status) && |
| 89 | xhci_resume(port_status)) { |
| 90 | elog_add_event_wake(host_event, 0); |
Karthikeyan Ramasubramanian | cc7cdb1 | 2019-03-20 11:38:01 -0600 | [diff] [blame] | 91 | elog_add_event_wake(event, i + 1); |
| 92 | found = true; |
| 93 | } |
| 94 | } |
| 95 | return found; |
| 96 | } |
| 97 | |
Tim Wawrzynczak | 56fcfb5 | 2020-11-10 13:39:37 -0700 | [diff] [blame] | 98 | bool xhci_update_wake_event(const struct xhci_wake_info *wake_info, |
| 99 | size_t wake_info_count) |
Karthikeyan Ramasubramanian | cc7cdb1 | 2019-03-20 11:38:01 -0600 | [diff] [blame] | 100 | { |
Tim Wawrzynczak | 56fcfb5 | 2020-11-10 13:39:37 -0700 | [diff] [blame] | 101 | const struct xhci_usb_info *usb_info; |
Karthikeyan Ramasubramanian | cc7cdb1 | 2019-03-20 11:38:01 -0600 | [diff] [blame] | 102 | uintptr_t mmio_base; |
| 103 | bool event_found = false; |
Tim Wawrzynczak | 56fcfb5 | 2020-11-10 13:39:37 -0700 | [diff] [blame] | 104 | size_t i; |
Karthikeyan Ramasubramanian | cc7cdb1 | 2019-03-20 11:38:01 -0600 | [diff] [blame] | 105 | |
Tim Wawrzynczak | 56fcfb5 | 2020-11-10 13:39:37 -0700 | [diff] [blame] | 106 | for (i = 0; i < wake_info_count; ++i) { |
| 107 | /* Assumes BAR0 is MBAR */ |
Tim Wawrzynczak | 7567890 | 2020-12-21 17:02:18 -0700 | [diff] [blame] | 108 | pci_devfn_t devfn = PCI_DEV(0, PCI_SLOT(wake_info[i].xhci_dev), |
| 109 | PCI_FUNC(wake_info[i].xhci_dev)); |
| 110 | mmio_base = pci_s_read_config32(devfn, PCI_BASE_ADDRESS_0); |
Tim Wawrzynczak | 56fcfb5 | 2020-11-10 13:39:37 -0700 | [diff] [blame] | 111 | mmio_base &= ~PCI_BASE_ADDRESS_MEM_ATTR_MASK; |
| 112 | usb_info = soc_get_xhci_usb_info(wake_info[i].xhci_dev); |
Karthikeyan Ramasubramanian | cc7cdb1 | 2019-03-20 11:38:01 -0600 | [diff] [blame] | 113 | |
Tim Wawrzynczak | 56fcfb5 | 2020-11-10 13:39:37 -0700 | [diff] [blame] | 114 | /* Check USB2 port status & control registers */ |
| 115 | if (xhci_port_wake_check(mmio_base + usb_info->usb2_port_status_reg, |
| 116 | usb_info->num_usb2_ports, |
| 117 | wake_info[i].elog_wake_type_host, |
| 118 | ELOG_WAKE_SOURCE_PME_XHCI_USB_2)) |
| 119 | event_found = true; |
| 120 | |
| 121 | /* Check USB3 port status & control registers */ |
| 122 | if (xhci_port_wake_check(mmio_base + usb_info->usb3_port_status_reg, |
| 123 | usb_info->num_usb3_ports, |
| 124 | wake_info[i].elog_wake_type_host, |
| 125 | ELOG_WAKE_SOURCE_PME_XHCI_USB_3)) |
| 126 | event_found = true; |
| 127 | } |
Karthikeyan Ramasubramanian | cc7cdb1 | 2019-03-20 11:38:01 -0600 | [diff] [blame] | 128 | |
| 129 | return event_found; |
| 130 | } |