blob: b439e308731e4fedbf2f143b8987860d8f877099 [file] [log] [blame]
Angel Pons27123982020-04-05 13:22:30 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Gaggery Tsai7130ca02018-07-31 15:55:54 -07002
3#include <baseboard/variants.h>
4#include <chip.h>
5#include <device/device.h>
6#include <device/pci_ids.h>
7#include <device/pci_ops.h>
Sumeet R Pawnikar97c54642020-05-10 01:24:11 +05308#include <intelblocks/power_limit.h>
Gaggery Tsai7130ca02018-07-31 15:55:54 -07009
10#define PL2_AML 18
11#define PL2_KBL 15
12
13static uint32_t get_pl2(void)
14{
Kyösti Mälkki71756c212019-07-12 13:10:19 +030015 struct device *igd_dev = pcidev_path_on_root(SA_DEVFN_IGD);
Gaggery Tsai7130ca02018-07-31 15:55:54 -070016 uint16_t id;
Kyösti Mälkki71756c212019-07-12 13:10:19 +030017
18 id = pci_read_config16(igd_dev, PCI_DEVICE_ID);
Gaggery Tsai7130ca02018-07-31 15:55:54 -070019 /* Assume we only have KLB-Y and AML-Y SKUs */
Felix Singer43b7f412022-03-07 04:34:52 +010020 if (id == PCI_DID_INTEL_KBL_GT2_SULXM)
Gaggery Tsai7130ca02018-07-31 15:55:54 -070021 return PL2_KBL;
22
23 return PL2_AML;
24}
25
26/* Override dev tree settings per board */
27void variant_devtree_update(void)
28{
Sumeet R Pawnikar97c54642020-05-10 01:24:11 +053029 struct soc_power_limits_config *soc_conf;
Kyösti Mälkkid5f645c2019-09-28 00:20:27 +030030 config_t *cfg = config_of_soc();
Gaggery Tsai7130ca02018-07-31 15:55:54 -070031
Sumeet R Pawnikar97c54642020-05-10 01:24:11 +053032 soc_conf = &cfg->power_limits_config;
Gaggery Tsai7130ca02018-07-31 15:55:54 -070033 /* Update PL2 based on CPU */
Sumeet R Pawnikar97c54642020-05-10 01:24:11 +053034 soc_conf->tdp_pl2_override = get_pl2();
Gaggery Tsai7130ca02018-07-31 15:55:54 -070035}