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Angel Pons0612b272020-04-05 15:46:56 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Aamir Bohra52f29742017-04-19 18:19:14 +05302
3#include <device/device.h>
4#include <device/path.h>
5#include <device/smbus.h>
6#include <device/pci.h>
7#include <device/pci_ids.h>
Aamir Bohra52f29742017-04-19 18:19:14 +05308#include <soc/smbus.h>
Kyösti Mälkki1cae4542020-01-06 12:31:34 +02009#include <device/smbus_host.h>
Aamir Bohra52f29742017-04-19 18:19:14 +053010#include "smbuslib.h"
11
Elyes HAOUAS4a131262018-09-16 17:35:48 +020012static int lsmbus_read_byte(struct device *dev, u8 address)
Aamir Bohra52f29742017-04-19 18:19:14 +053013{
14 u16 device;
15 struct resource *res;
16 struct bus *pbus;
17 device = dev->path.i2c.device;
18 pbus = get_pbus_smbus(dev);
19 res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
Kyösti Mälkki4ae9f1e2020-01-01 17:42:45 +020020 return do_smbus_read_byte(res->base, device, address);
Aamir Bohra52f29742017-04-19 18:19:14 +053021}
22
Elyes HAOUAS4a131262018-09-16 17:35:48 +020023static int lsmbus_write_byte(struct device *dev, u8 address, u8 data)
Aamir Bohra52f29742017-04-19 18:19:14 +053024{
25 u16 device;
26 struct resource *res;
27 struct bus *pbus;
28
29 device = dev->path.i2c.device;
30 pbus = get_pbus_smbus(dev);
31 res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
Kyösti Mälkki4ae9f1e2020-01-01 17:42:45 +020032 return do_smbus_write_byte(res->base, device, address, data);
Aamir Bohra52f29742017-04-19 18:19:14 +053033}
34
35static struct smbus_bus_operations lops_smbus_bus = {
36 .read_byte = lsmbus_read_byte,
37 .write_byte = lsmbus_write_byte,
38};
39
Elyes HAOUAS4a131262018-09-16 17:35:48 +020040static void pch_smbus_init(struct device *dev)
Aamir Bohra52f29742017-04-19 18:19:14 +053041{
42 struct resource *res;
Aamir Bohra52f29742017-04-19 18:19:14 +053043
44 /* Enable clock gating */
Nico Huber62788672017-08-17 16:08:00 +020045 pci_update_config32(dev, 0x80,
46 ~((1 << 8) | (1 << 10) | (1 << 12) | (1 << 14)), 0);
Aamir Bohra52f29742017-04-19 18:19:14 +053047
48 /* Set Receive Slave Address */
Angel Ponsc1bfbe02021-11-03 13:18:53 +010049 res = probe_resource(dev, PCI_BASE_ADDRESS_4);
Aamir Bohra52f29742017-04-19 18:19:14 +053050 if (res)
Kyösti Mälkki73451fd2020-01-06 19:00:31 +020051 smbus_set_slave_addr(res->base, SMBUS_SLAVE_ADDR);
Aamir Bohra52f29742017-04-19 18:19:14 +053052}
53
Elyes HAOUAS4a131262018-09-16 17:35:48 +020054static void smbus_read_resources(struct device *dev)
Aamir Bohra52f29742017-04-19 18:19:14 +053055{
Paul Menzela0815832021-05-25 12:34:16 +020056 pci_dev_read_resources(dev);
57
Aamir Bohra52f29742017-04-19 18:19:14 +053058 struct resource *res = new_resource(dev, PCI_BASE_ADDRESS_4);
59 res->base = SMBUS_IO_BASE;
60 res->size = 32;
61 res->limit = res->base + res->size - 1;
62 res->flags = IORESOURCE_IO | IORESOURCE_FIXED | IORESOURCE_RESERVE |
63 IORESOURCE_STORED | IORESOURCE_ASSIGNED;
Aamir Bohra52f29742017-04-19 18:19:14 +053064}
65
66static struct device_operations smbus_ops = {
Elyes HAOUAS1d191272018-11-27 12:23:48 +010067 .read_resources = smbus_read_resources,
68 .set_resources = pci_dev_set_resources,
69 .enable_resources = pci_dev_enable_resources,
70 .scan_bus = scan_smbus,
71 .init = pch_smbus_init,
Subrata Banik6bbc91a2017-12-07 14:55:51 +053072 .ops_pci = &pci_dev_ops_pci,
Aamir Bohra52f29742017-04-19 18:19:14 +053073 .ops_smbus_bus = &lops_smbus_bus,
74};
75
76static const unsigned short pci_device_ids[] = {
Maxim Polyakov0c5dd9f2020-08-14 19:24:12 +030077 PCI_DEVICE_ID_INTEL_APL_SMBUS,
Lijian Zhaobbedef92017-07-29 16:38:38 -070078 PCI_DEVICE_ID_INTEL_CNL_SMBUS,
Patrick Rudolph2c707082020-10-19 17:40:02 +020079 PCI_DEVICE_ID_INTEL_CNP_H_SMBUS,
Aamir Bohra52f29742017-04-19 18:19:14 +053080 PCI_DEVICE_ID_INTEL_SPT_LP_SMBUS,
81 PCI_DEVICE_ID_INTEL_SPT_H_SMBUS,
Maxim Polyakov571d07d2019-08-22 13:11:32 +030082 PCI_DEVICE_ID_INTEL_LWB_SMBUS_SUPER,
Jonathan Zhangc9ece502019-11-25 12:41:15 -080083 PCI_DEVICE_ID_INTEL_LWB_SMBUS,
Aamir Bohra9eac0392018-06-30 12:07:04 +053084 PCI_DEVICE_ID_INTEL_ICP_LP_SMBUS,
Ronak Kanabarda7ffb482019-02-05 01:51:13 +053085 PCI_DEVICE_ID_INTEL_CMP_SMBUS,
Gaggery Tsai12a651c2019-12-05 11:23:20 -080086 PCI_DEVICE_ID_INTEL_CMP_H_SMBUS,
Ravi Sarawadi6b5bf402019-10-21 22:25:04 -070087 PCI_DEVICE_ID_INTEL_TGP_LP_SMBUS,
Jeremy Soller191a8d72021-08-10 14:06:51 -060088 PCI_DEVICE_ID_INTEL_TGP_H_SMBUS,
Tan, Lean Sheng26136092020-01-20 19:13:56 -080089 PCI_DEVICE_ID_INTEL_MCC_SMBUS,
Meera Ravindranath3f4af0d2020-02-12 16:01:22 +053090 PCI_DEVICE_ID_INTEL_JSP_SMBUS,
Subrata Banikf672f7f2020-08-03 14:29:25 +053091 PCI_DEVICE_ID_INTEL_ADP_P_SMBUS,
92 PCI_DEVICE_ID_INTEL_ADP_S_SMBUS,
Usha Paf5a9d62022-01-17 20:24:31 +053093 PCI_DEVICE_ID_INTEL_ADP_M_N_SMBUS,
Jeff Daly2a81cab2022-01-06 16:32:11 -050094 PCI_DEVICE_ID_INTEL_DNV_SMBUS_LEGACY,
Aamir Bohra52f29742017-04-19 18:19:14 +053095 0
96};
97
98static const struct pci_driver pch_smbus __pci_driver = {
99 .ops = &smbus_ops,
100 .vendor = PCI_VENDOR_ID_INTEL,
101 .devices = pci_device_ids,
102};