Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 1 | ## |
Stefan Reinauer | 7e61e45 | 2008-01-18 10:35:56 +0000 | [diff] [blame] | 2 | ## This file is part of the coreboot project. |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 3 | ## |
| 4 | ## Copyright (C) 2006 AMD |
| 5 | ## Written by Yinghai Lu <yinghailu@gmail.com> for AMD. |
| 6 | ## |
| 7 | ## Copyright (C) 2006 MSI |
| 8 | ## Written by Bingxun Shi <bingxunshi@gmail.com> for MSI. |
| 9 | ## |
| 10 | ## This program is free software; you can redistribute it and/or modify |
| 11 | ## it under the terms of the GNU General Public License as published by |
| 12 | ## the Free Software Foundation; either version 2 of the License, or |
| 13 | ## (at your option) any later version. |
| 14 | ## |
| 15 | ## This program is distributed in the hope that it will be useful, |
| 16 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | ## GNU General Public License for more details. |
| 19 | ## |
| 20 | ## You should have received a copy of the GNU General Public License |
| 21 | ## along with this program; if not, write to the Free Software |
| 22 | ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 23 | ## |
| 24 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 25 | ## CONFIG_XIP_ROM_SIZE must be a power of 2. |
| 26 | default CONFIG_XIP_ROM_SIZE = 64 * 1024 |
Carl-Daniel Hailfinger | b5e10bc | 2009-04-21 00:16:06 +0000 | [diff] [blame] | 27 | include /config/nofailovercalculation.lb |
| 28 | default CONFIG_ROM_PAYLOAD = 1 |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 29 | |
| 30 | arch i386 end |
| 31 | |
| 32 | |
| 33 | ## |
| 34 | ## Build the objects we have code for in this directory. |
| 35 | ## |
| 36 | |
| 37 | driver mainboard.o |
| 38 | |
| 39 | #dir /drivers/ati/ragexl |
| 40 | #needed by irq_tables and mptable and acpi_tables |
| 41 | object get_bus_conf.o |
| 42 | |
| 43 | |
Myles Watson | b8e2027 | 2009-10-15 13:35:47 +0000 | [diff] [blame] | 44 | if CONFIG_GENERATE_MP_TABLE object mptable.o end |
| 45 | if CONFIG_GENERATE_PIRQ_TABLE object irq_tables.o end |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 46 | |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 47 | if CONFIG_USE_INIT |
| 48 | |
| 49 | makerule ./auto.o |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 50 | depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h" |
| 51 | action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -c $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -o $@" |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 52 | end |
| 53 | |
| 54 | else |
| 55 | |
| 56 | makerule ./auto.inc |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 57 | depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h" |
| 58 | action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -c -S $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -o $@" |
Stefan Reinauer | 4ed326b | 2008-11-28 12:09:17 +0000 | [diff] [blame] | 59 | action "perl -e 's/\.rodata/.rom.data/g' -pi $@" |
| 60 | action "perl -e 's/\.text/.section .rom.text/g' -pi $@" |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 61 | end |
| 62 | |
| 63 | end |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 64 | |
| 65 | ## |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 66 | ## Build our 16 bit and 32 bit coreboot entry code |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 67 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 68 | if CONFIG_USE_FALLBACK_IMAGE |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 69 | mainboardinit cpu/x86/16bit/entry16.inc |
| 70 | ldscript /cpu/x86/16bit/entry16.lds |
| 71 | end |
| 72 | |
| 73 | mainboardinit cpu/x86/32bit/entry32.inc |
| 74 | |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 75 | if CONFIG_USE_INIT |
| 76 | ldscript /cpu/x86/32bit/entry32.lds |
| 77 | end |
| 78 | |
| 79 | if CONFIG_USE_INIT |
| 80 | ldscript /cpu/amd/car/cache_as_ram.lds |
| 81 | end |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 82 | |
| 83 | ## |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 84 | ## Build our reset vector (This is where coreboot is entered) |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 85 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 86 | if CONFIG_USE_FALLBACK_IMAGE |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 87 | mainboardinit cpu/x86/16bit/reset16.inc |
| 88 | ldscript /cpu/x86/16bit/reset16.lds |
| 89 | else |
| 90 | mainboardinit cpu/x86/32bit/reset32.inc |
| 91 | ldscript /cpu/x86/32bit/reset32.lds |
| 92 | end |
| 93 | |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 94 | ## |
| 95 | ## Include an id string (For safe flashing) |
| 96 | ## |
Patrick Georgi | 436f99b | 2009-11-27 16:55:13 +0000 | [diff] [blame^] | 97 | mainboardinit arch/i386/lib/id.inc |
| 98 | ldscript /arch/i386/lib/id.lds |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 99 | |
| 100 | ## |
| 101 | ## ROMSTRAP table for MCP55 |
| 102 | ## |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 103 | if CONFIG_USE_FALLBACK_IMAGE |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 104 | mainboardinit southbridge/nvidia/mcp55/romstrap.inc |
| 105 | ldscript /southbridge/nvidia/mcp55/romstrap.lds |
| 106 | end |
| 107 | |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 108 | ## |
| 109 | ## Setup Cache-As-Ram |
| 110 | ## |
| 111 | mainboardinit cpu/amd/car/cache_as_ram.inc |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 112 | |
| 113 | ### |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 114 | ### This is the early phase of coreboot startup |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 115 | ### Things are delicate and we test to see if we should |
| 116 | ### failover to another image. |
| 117 | ### |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 118 | if CONFIG_USE_FALLBACK_IMAGE |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 119 | ldscript /arch/i386/lib/failover.lds |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 120 | end |
| 121 | |
| 122 | ### |
| 123 | ### O.k. We aren't just an intermediary anymore! |
| 124 | ### |
| 125 | |
| 126 | ## |
| 127 | ## Setup RAM |
| 128 | ## |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 129 | if CONFIG_USE_INIT |
| 130 | initobject auto.o |
| 131 | else |
| 132 | mainboardinit ./auto.inc |
| 133 | end |
| 134 | |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 135 | ## |
| 136 | ## Include the secondary Configuration files |
| 137 | ## |
Stefan Reinauer | 3081bdf | 2009-04-01 13:43:21 +0000 | [diff] [blame] | 138 | config chip.h |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 139 | |
| 140 | |
| 141 | # sample config for msi/ms9282 |
| 142 | chip northbridge/amd/amdk8/root_complex |
| 143 | device apic_cluster 0 on |
| 144 | chip cpu/amd/socket_F |
| 145 | device apic 0 on end |
| 146 | end |
| 147 | end |
| 148 | |
| 149 | device pci_domain 0 on |
| 150 | chip northbridge/amd/amdk8 #mc0 |
| 151 | device pci 18.0 on # northbridge |
| 152 | # devices on link 0, link 0 == LDT 0 |
| 153 | chip southbridge/nvidia/mcp55 |
| 154 | device pci 0.0 on end # HT |
| 155 | device pci 1.0 on # LPC |
| 156 | chip superio/winbond/w83627ehg |
| 157 | device pnp 2e.0 on # Floppy |
| 158 | io 0x60 = 0x3f0 |
| 159 | irq 0x70 = 6 |
| 160 | drq 0x74 = 2 |
| 161 | end |
| 162 | device pnp 2e.1 off # Parallel Port |
| 163 | io 0x60 = 0x378 |
| 164 | irq 0x70 = 7 |
| 165 | end |
| 166 | device pnp 2e.2 on # Com1 |
| 167 | io 0x60 = 0x3f8 |
| 168 | irq 0x70 = 4 |
| 169 | end |
| 170 | device pnp 2e.3 off # Com2 |
| 171 | io 0x60 = 0x2f8 |
| 172 | irq 0x70 = 3 |
| 173 | end |
| 174 | device pnp 2e.5 on # Keyboard |
| 175 | io 0x60 = 0x60 |
| 176 | io 0x62 = 0x64 |
| 177 | irq 0x70 = 1 |
| 178 | irq 0x72 = 12 |
| 179 | end |
| 180 | device pnp 2e.6 off # SERIAL_FALSH |
| 181 | io 0x60 = 0x100 |
| 182 | end |
| 183 | device pnp 2e.7 off # GAME_MIDI_GIPO1 |
| 184 | io 0x60 = 0x220 |
| 185 | io 0x62 = 0x300 |
| 186 | irq 0x70 = 9 |
| 187 | end |
| 188 | device pnp 2e.8 off end # WDTO_PLED |
| 189 | device pnp 2e.9 off end # GPIO2_GPIO3_GPIO4_GPIO5 |
| 190 | device pnp 2e.a off end # ACPI |
| 191 | device pnp 2e.b on # HW Monitor |
| 192 | io 0x60 = 0x290 |
| 193 | irq 0x70 = 5 |
| 194 | end |
| 195 | end |
| 196 | end |
| 197 | device pci 1.1 on # SM 0 |
| 198 | chip drivers/i2c/i2cmux2 # pca9554 smbus mux |
| 199 | device i2c 70 on #0 pca9554 1 |
| 200 | chip drivers/generic/generic #dimm 0-0-0 |
| 201 | device i2c 50 on end |
| 202 | end |
| 203 | chip drivers/generic/generic #dimm 0-0-1 |
| 204 | device i2c 51 on end |
| 205 | end |
| 206 | chip drivers/generic/generic #dimm 0-1-0 |
| 207 | device i2c 52 on end |
| 208 | end |
| 209 | chip drivers/generic/generic #dimm 0-1-1 |
| 210 | device i2c 53 on end |
| 211 | end |
| 212 | chip drivers/generic/generic #dimm 0-0-0 |
| 213 | device i2c 54 on end |
| 214 | end |
| 215 | chip drivers/generic/generic #dimm 0-0-1 |
| 216 | device i2c 55 on end |
| 217 | end |
| 218 | chip drivers/generic/generic #dimm 0-1-0 |
| 219 | device i2c 56 on end |
| 220 | end |
| 221 | chip drivers/generic/generic #dimm 0-1-1 |
| 222 | device i2c 57 on end |
| 223 | end |
| 224 | end |
| 225 | device i2c 70 on #0 pca9554 2 |
| 226 | chip drivers/generic/generic #dimm 0-0-0 |
| 227 | device i2c 50 on end |
| 228 | end |
| 229 | chip drivers/generic/generic #dimm 0-0-1 |
| 230 | device i2c 51 on end |
| 231 | end |
| 232 | chip drivers/generic/generic #dimm 0-1-0 |
| 233 | device i2c 52 on end |
| 234 | end |
| 235 | chip drivers/generic/generic #dimm 0-1-1 |
| 236 | device i2c 53 on end |
| 237 | end |
| 238 | chip drivers/generic/generic #dimm 0-0-0 |
| 239 | device i2c 54 on end |
| 240 | end |
| 241 | chip drivers/generic/generic #dimm 0-0-1 |
| 242 | device i2c 55 on end |
| 243 | end |
| 244 | chip drivers/generic/generic #dimm 0-1-0 |
| 245 | device i2c 56 on end |
| 246 | end |
| 247 | chip drivers/generic/generic #dimm 0-1-1 |
| 248 | device i2c 57 on end |
| 249 | end |
| 250 | end |
| 251 | end |
| 252 | end |
| 253 | device pci 1.1 on # SM 1 |
| 254 | chip drivers/i2c/i2cmux2 # pca9554 smbus mux |
| 255 | device i2c 72 on #pca9554 channle1 |
| 256 | chip drivers/i2c/adm1027 #HWM ADT7476 1 |
| 257 | device i2c 2e on end |
| 258 | end |
| 259 | end |
| 260 | device i2c 72 on #pca9545 channel 2 |
| 261 | chip drivers/i2c/adm1027 #HWM ADT7463 |
| 262 | device i2c 2e on end |
| 263 | end |
| 264 | end |
| 265 | device i2c 72 on end #pca9545 channel 3 |
| 266 | device i2c 72 on #pca9545 channel 4 |
| 267 | chip drivers/i2c/adm1027 #HWM ADT7476 2 |
| 268 | device i2c 2e on end |
| 269 | end |
| 270 | end |
| 271 | end |
| 272 | end |
| 273 | |
| 274 | device pci 2.0 on end # USB 1.1 |
| 275 | device pci 2.1 on end # USB 2 |
| 276 | device pci 4.0 on end # IDE |
| 277 | device pci 5.0 on end # SATA 0 |
| 278 | device pci 5.1 on end # SATA 1 |
| 279 | device pci 5.2 on end # SATA 2 |
| 280 | device pci 6.0 on #P2P |
Myles Watson | d27c08c | 2009-11-06 23:42:26 +0000 | [diff] [blame] | 281 | device pci 4.0 on end |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 282 | end # P2P |
| 283 | device pci 7.0 on end # reserve |
| 284 | device pci 8.0 on end # MAC0 |
| 285 | device pci 9.0 on end # MAC1 |
| 286 | device pci a.0 on |
| 287 | device pci 0.0 on |
Myles Watson | d27c08c | 2009-11-06 23:42:26 +0000 | [diff] [blame] | 288 | device pci 4.0 on end #pci_E lan1 |
| 289 | device pci 4.1 on end #pci_E lan2 |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 290 | end |
| 291 | end # 0x376 |
| 292 | device pci b.0 on end # PCI E 0x374 |
| 293 | device pci c.0 on end |
| 294 | device pci d.0 on #SAS |
Myles Watson | d27c08c | 2009-11-06 23:42:26 +0000 | [diff] [blame] | 295 | device pci 0.0 on end |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 296 | end # PCI E 1 0x378 |
| 297 | device pci e.0 on end # PCI E 0 0x375 |
| 298 | device pci f.0 on end #PCI E 0x377 pci_E slot |
| 299 | register "ide0_enable" = "1" |
| 300 | register "ide1_enable" = "1" |
| 301 | register "sata0_enable" = "1" |
| 302 | register "sata1_enable" = "1" |
| 303 | end |
| 304 | end # device pci 18.0 |
| 305 | device pci 18.0 on end # Link 1 |
| 306 | device pci 18.0 on end |
| 307 | device pci 18.1 on end |
| 308 | device pci 18.2 on end |
| 309 | device pci 18.3 on end |
| 310 | end #mc0 |
| 311 | |
| 312 | end # pci_domain |
| 313 | |
| 314 | # chip drivers/generic/debug |
| 315 | # device pnp 0.0 off end |
| 316 | # device pnp 0.1 off end |
| 317 | # device pnp 0.2 off end |
| 318 | # device pnp 0.3 off end |
| 319 | # device pnp 0.4 off end |
| 320 | # device pnp 0.5 on end |
| 321 | # end |
| 322 | end # root_complex |