blob: 214f76d8126ad77b0c889cd03883fdf8ae4ca102 [file] [log] [blame]
Felix Held4a8cd722020-04-18 22:26:39 +02001# SPDX-License-Identifier: BSD-3-Clause
Felix Held4a8cd722020-04-18 22:26:39 +02002
Martin Roth1f337622019-04-22 16:08:31 -06003ifeq ($(CONFIG_SOC_AMD_PICASSO),y)
Martin Roth5c354b92019-04-22 14:55:16 -06004
Martin Roth5c354b92019-04-22 14:55:16 -06005subdirs-y += ../../../cpu/x86/lapic
6subdirs-y += ../../../cpu/x86/cache
7subdirs-y += ../../../cpu/x86/mtrr
8subdirs-y += ../../../cpu/x86/pae
Martin Rothc7acf162020-05-28 00:44:50 -06009subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage
Kangheui Wone20bc462021-04-06 16:55:48 +100010subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += ../common/psp_verstage
Martin Roth5c354b92019-04-22 14:55:16 -060011
Felix Helde7a02022020-12-10 02:05:47 +010012# Beware that all-y also adds the compilation unit to verstage on PSP
Felix Held1a341af2020-12-05 01:18:10 +010013all-y += config.c
Felix Held40744592020-12-09 16:12:41 +010014all-y += aoac.c
Felix Held1a341af2020-12-05 01:18:10 +010015
Felix Held0aada3c2020-11-24 22:55:53 +010016bootblock-y += bootblock.c
Felix Held187f59a2020-12-08 02:25:05 +010017bootblock-y += early_fch.c
Felix Held46673222020-04-04 02:37:04 +020018bootblock-y += i2c.c
Furquan Shaikhca481ee2020-06-13 00:16:26 -070019bootblock-y += uart.c
Felix Held46673222020-04-04 02:37:04 +020020bootblock-y += gpio.c
Martin Roth50cca762020-08-13 11:06:18 -060021bootblock-y += reset.c
Felix Held46673222020-04-04 02:37:04 +020022
Felix Helddd737142021-03-26 00:44:35 +010023romstage-y += fsp_m_params.c
Martin Roth5c354b92019-04-22 14:55:16 -060024romstage-y += i2c.c
25romstage-y += romstage.c
Martin Roth5c354b92019-04-22 14:55:16 -060026romstage-y += gpio.c
Martin Rothc7acf162020-05-28 00:44:50 -060027romstage-y += reset.c
Furquan Shaikhca481ee2020-06-13 00:16:26 -070028romstage-y += uart.c
Martin Roth5c354b92019-04-22 14:55:16 -060029
Martin Roth5c354b92019-04-22 14:55:16 -060030verstage-y += i2c.c
Martin Rothc7acf162020-05-28 00:44:50 -060031verstage_x86-y += gpio.c
32verstage_x86-y += uart.c
Martin Rothc7acf162020-05-28 00:44:50 -060033verstage_x86-y += reset.c
Martin Roth5c354b92019-04-22 14:55:16 -060034
Martin Roth5c354b92019-04-22 14:55:16 -060035ramstage-y += i2c.c
36ramstage-y += chip.c
37ramstage-y += cpu.c
Furquan Shaikh0c707d42020-07-08 16:54:40 -070038ramstage-y += data_fabric.c
Marshall Dawsoneb724872019-07-16 15:46:35 -060039ramstage-y += root_complex.c
Martin Roth5c354b92019-04-22 14:55:16 -060040ramstage-y += mca.c
Martin Roth5c354b92019-04-22 14:55:16 -060041ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
Matt Papageorgea21eae02019-11-13 17:00:12 -060042ramstage-$(CONFIG_HAVE_ACPI_TABLES) += agesa_acpi.c
Martin Roth5c354b92019-04-22 14:55:16 -060043ramstage-y += gpio.c
Felix Held187f59a2020-12-08 02:25:05 +010044ramstage-y += fch.c
Martin Rothc7acf162020-05-28 00:44:50 -060045ramstage-y += reset.c
Martin Roth5c354b92019-04-22 14:55:16 -060046ramstage-y += sata.c
Furquan Shaikhca481ee2020-06-13 00:16:26 -070047ramstage-y += uart.c
Martin Roth97bd2a72020-02-17 13:17:19 -070048ramstage-y += soc_util.c
Felix Held793f3712021-03-26 00:13:51 +010049ramstage-y += fsp_s_params.c
Martin Roth86ba0d72020-02-05 16:46:30 -070050ramstage-y += graphics.c
Furquan Shaikhcff479e2020-07-08 15:47:19 -070051ramstage-y += pcie_gpp.c
Raul E Rangel0357ab72020-07-09 12:08:58 -060052ramstage-y += xhci.c
Rob Barnes009a23d2020-04-13 01:27:12 -060053ramstage-y += dmi.c
Martin Roth5c354b92019-04-22 14:55:16 -060054
Martin Roth5c354b92019-04-22 14:55:16 -060055smm-y += smihandler.c
Felix Held9412b3e2020-06-18 15:54:43 +020056ifeq ($(CONFIG_DEBUG_SMI),y)
57smm-y += uart.c
Felix Held9412b3e2020-06-18 15:54:43 +020058endif
Martin Roth5c354b92019-04-22 14:55:16 -060059smm-y += gpio.c
Marshall Dawson5c5049e2020-04-23 06:43:44 -060060smm-y += smu.c
Martin Roth5c354b92019-04-22 14:55:16 -060061
Martin Rothd7e3ead2019-04-22 16:32:58 -060062CPPFLAGS_common += -I$(src)/soc/amd/picasso
63CPPFLAGS_common += -I$(src)/soc/amd/picasso/include
64CPPFLAGS_common += -I$(src)/soc/amd/picasso/acpi
Marshall Dawson00a22082020-01-20 23:05:31 -070065CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso
Martin Roth0f3ef702020-10-06 18:11:12 -060066CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso/include
Martin Roth5c354b92019-04-22 14:55:16 -060067
Raul E Rangelcbaa8352020-05-13 14:01:09 -060068MAINBOARD_BLOBS_DIR:=$(top)/3rdparty/blobs/mainboard/$(MAINBOARDDIR)
69
Martin Roth5c354b92019-04-22 14:55:16 -060070# ROMSIG Normally At ROMBASE + 0x20000
71# Overridden by CONFIG_AMD_FWM_POSITION_INDEX
72# +-----------+---------------+----------------+------------+
Marshall Dawson62611412019-06-19 11:46:06 -060073# |0x55AA55AA | | | |
Martin Roth5c354b92019-04-22 14:55:16 -060074# +-----------+---------------+----------------+------------+
Marshall Dawson62611412019-06-19 11:46:06 -060075# | | PSPDIR ADDR | BIOSDIR ADDR |
76# +-----------+---------------+----------------+
77
Zheng Bao8516c212021-01-23 10:09:00 +080078$(if $(CONFIG_AMD_FWM_POSITION_INDEX), ,\
79 $(error Invalid AMD firmware position index. Check if the board sets a valid ROM size))
80
Marshall Dawsonbc4c9032019-06-11 12:18:20 -060081PICASSO_FWM_POSITION=$(call int-add, \
Martin Roth5c354b92019-04-22 14:55:16 -060082 $(call int-subtract, 0xffffffff \
83 $(call int-shift-left, \
84 0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000 1)
85
Marshall Dawson62611412019-06-19 11:46:06 -060086#
87# PSP Directory Table items
88#
89# Certain ordering requirements apply, however these are ensured by amdfwtool.
90# For more information see "AMD Platform Security Processor BIOS Architecture
91# Design Guide for AMD Family 17h Processors" (PID #55758, NDA only).
92#
93
Zheng Bao3384e4a2020-10-06 12:03:11 +080094FIRMWARE_LOCATION=$(shell grep -e FIRMWARE_LOCATION $(CONFIG_AMDFW_CONFIG_FILE) | awk '{print $$2}')
Martin Roth5c354b92019-04-22 14:55:16 -060095
Furquan Shaikh577db022020-04-24 15:52:04 -070096ifeq ($(CONFIG_PSP_UNLOCK_SECURE_DEBUG),y)
Furquan Shaikh318e5832020-04-24 14:04:07 -070097# Enable secure debug unlock
98PSP_SOFTFUSE_BITS += 0
Zheng Baoc5e28ab2020-10-28 11:38:09 +080099OPT_TOKEN_UNLOCK="--token-unlock"
Furquan Shaikh577db022020-04-24 15:52:04 -0700100endif
Martin Roth5c354b92019-04-22 14:55:16 -0600101
Marshall Dawson62611412019-06-19 11:46:06 -0600102ifeq ($(CONFIG_PSP_LOAD_MP2_FW),y)
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800103OPT_PSP_LOAD_MP2_FW="--load-mp2-fw"
Marshall Dawson62611412019-06-19 11:46:06 -0600104else
Furquan Shaikh318e5832020-04-24 14:04:07 -0700105# Disable MP2 firmware loading
106PSP_SOFTFUSE_BITS += 29
Martin Roth5c354b92019-04-22 14:55:16 -0600107endif
108
Martin Rothfdad5ad2021-04-16 11:36:01 -0600109# Use additional Soft Fuse bits specified in Kconfig
Zheng Bao17022bb2021-05-13 22:38:05 +0800110PSP_SOFTFUSE_BITS += $(call strip_quotes, $(CONFIG_PSP_SOFTFUSE_BITS))
Martin Rothfdad5ad2021-04-16 11:36:01 -0600111
Marshall Dawson62611412019-06-19 11:46:06 -0600112ifeq ($(CONFIG_PSP_LOAD_S0I3_FW),y)
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800113OPT_PSP_LOAD_S0I3_FW="--load-s0i3"
Marshall Dawson62611412019-06-19 11:46:06 -0600114endif
115
Marshall Dawson62611412019-06-19 11:46:06 -0600116# type = 0x3a
117ifeq ($(CONFIG_HAVE_PSP_WHITELIST_FILE),y)
118PSP_WHITELIST_FILE=$(CONFIG_PSP_WHITELIST_FILE)
119endif
Marshall Dawson62611412019-06-19 11:46:06 -0600120#
121# BIOS Directory Table items - proper ordering is managed by amdfwtool
122#
123
124# type = 0x60
Rob Barnesb2545cc2020-09-09 13:19:09 -0600125PSP_APCB_FILES=$(APCB_SOURCES)
Marshall Dawson62611412019-06-19 11:46:06 -0600126
127# type = 0x61
Marshall Dawsonb7687232020-01-20 19:56:30 -0700128PSP_APOB_BASE=$(CONFIG_PSP_APOB_DRAM_ADDRESS)
Marshall Dawson62611412019-06-19 11:46:06 -0600129
130# type = 0x62
131PSP_BIOSBIN_FILE=$(obj)/amd_biospsp.img
Felix Held46673222020-04-04 02:37:04 +0200132PSP_ELF_FILE=$(objcbfs)/bootblock.elf
Zheng Bao944d00b2020-08-17 11:11:48 +0800133PSP_BIOSBIN_SIZE=$(shell $(READELF_bootblock) -l $(PSP_ELF_FILE) | grep LOAD | awk '{print $$5}')
134PSP_BIOSBIN_DEST=$(shell $(READELF_bootblock) -l $(PSP_ELF_FILE) | grep LOAD | awk '{print $$3}')
Marshall Dawsonb7687232020-01-20 19:56:30 -0700135# type = 0x63 - construct APOB NV base/size from flash map
Felix Held77a63ef2020-09-22 01:23:54 +0200136# The flashmap section used for this is expected to be named RW_MRC_CACHE
Felix Held8ea26ae2021-03-08 16:42:11 +0100137APOB_NV_SIZE=$(shell awk '$$2 == "FMAP_SECTION_RW_MRC_CACHE_SIZE" {print $$3}' $(obj)/fmap_config.h)
138APOB_NV_BASE=$(shell awk '$$2 == "FMAP_SECTION_RW_MRC_CACHE_START" {print $$3}' $(obj)/fmap_config.h)
Marshall Dawson62611412019-06-19 11:46:06 -0600139
Martin Roth362eaf32020-06-14 10:38:32 -0600140ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y)
141# type = 0x6B - PSP Shared memory location
142ifneq ($(CONFIG_PSP_SHAREDMEM_SIZE),0x0)
143PSP_SHAREDMEM_SIZE=$(CONFIG_PSP_SHAREDMEM_SIZE)
Raul E Rangel42c5b012021-03-05 11:17:13 -0700144PSP_SHAREDMEM_BASE=$(shell awk '$$3 == "_psp_sharedmem_dram" {printf "0x" $$1}' $(objcbfs)/bootblock.map)
Martin Roth362eaf32020-06-14 10:38:32 -0600145endif
146
147# type = 0x52 - PSP Bootloader Userspace Application (verstage)
Martin Rothde498332020-09-01 11:00:28 -0600148PSP_VERSTAGE_FILE=$(call strip_quotes,$(CONFIG_PSP_VERSTAGE_FILE))
Martin Rothfe87d762020-09-01 11:04:21 -0600149PSP_VERSTAGE_SIG_FILE=$(call strip_quotes,$(CONFIG_PSP_VERSTAGE_SIGNING_TOKEN))
Martin Roth362eaf32020-06-14 10:38:32 -0600150endif # CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK
151
Furquan Shaikh318e5832020-04-24 14:04:07 -0700152
153# Helper function to return a value with given bit set
Martin Rothfdad5ad2021-04-16 11:36:01 -0600154# Soft Fuse type = 0xb - See #55758 (NDA) for bit definitions.
Furquan Shaikh318e5832020-04-24 14:04:07 -0700155set-bit=$(call int-shift-left, 1 $(call _toint,$1))
156PSP_SOFTFUSE=$(shell A=$(call int-add, \
157 $(foreach bit,$(PSP_SOFTFUSE_BITS),$(call set-bit,$(bit)))); printf "0x%x" $$A)
158
Marshall Dawson62611412019-06-19 11:46:06 -0600159#
160# Build the arguments to amdfwtool (order is unimportant). Missing file names
161# result in empty OPT_ variables, i.e. the argument is not passed to amdfwtool.
162#
163
Martin Roth5c354b92019-04-22 14:55:16 -0600164add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), )
165
Martin Roth362eaf32020-06-14 10:38:32 -0600166OPT_VERSTAGE_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_FILE), --verstage)
Martin Rothfe87d762020-09-01 11:04:21 -0600167OPT_VERSTAGE_SIG_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_SIG_FILE), --verstage_sig)
Marshall Dawson62611412019-06-19 11:46:06 -0600168
Raul E Rangelcbaa8352020-05-13 14:01:09 -0600169OPT_PSP_APCB_FILES=$(foreach i, $(shell seq $(words $(PSP_APCB_FILES))), \
170 $(call add_opt_prefix, $(word $(i), $(PSP_APCB_FILES)), \
Zheng Bao5caca942020-12-04 16:39:38 +0800171 --instance $(shell printf "%x" $$(($(i)-1))) --apcb ) )
172OPT_PSP_APCB_FILES_BK=$(foreach i, $(shell seq $(words $(PSP_APCB_FILES))), \
173 $(call add_opt_prefix, $(word $(i), $(PSP_APCB_FILES)), \
174 --instance $(shell printf "1%x" $$(($(i)-1))) --apcb ) )
Raul E Rangelcbaa8352020-05-13 14:01:09 -0600175
Marshall Dawson62611412019-06-19 11:46:06 -0600176OPT_APOB_ADDR=$(call add_opt_prefix, $(PSP_APOB_BASE), --apob-base)
177OPT_PSP_BIOSBIN_FILE=$(call add_opt_prefix, $(PSP_BIOSBIN_FILE), --bios-bin)
178OPT_PSP_BIOSBIN_DEST=$(call add_opt_prefix, $(PSP_BIOSBIN_DEST), --bios-bin-dest)
179OPT_PSP_BIOSBIN_SIZE=$(call add_opt_prefix, $(PSP_BIOSBIN_SIZE), --bios-uncomp-size)
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800180
Martin Roth362eaf32020-06-14 10:38:32 -0600181OPT_PSP_SHAREDMEM_BASE=$(call add_opt_prefix, $(PSP_SHAREDMEM_BASE), --sharedmem)
182OPT_PSP_SHAREDMEM_SIZE=$(call add_opt_prefix, $(PSP_SHAREDMEM_SIZE), --sharedmem-size)
Martin Roth6e5f9092020-06-25 17:31:54 -0600183OPT_APOB_NV_SIZE=$(call add_opt_prefix, $(APOB_NV_SIZE), --apob-nv-size)
184OPT_APOB_NV_BASE=$(call add_opt_prefix, $(APOB_NV_BASE),--apob-nv-base)
Matt Papageorge95c42c32020-07-08 11:33:48 -0500185OPT_EFS_SPI_READ_MODE=$(call add_opt_prefix, $(CONFIG_EFS_SPI_READ_MODE), --spi-read-mode)
186OPT_EFS_SPI_SPEED=$(call add_opt_prefix, $(CONFIG_EFS_SPI_SPEED), --spi-speed)
187OPT_EFS_SPI_MICRON_FLAG=$(call add_opt_prefix, $(CONFIG_EFS_SPI_MICRON_FLAG), --spi-micron-flag)
Martin Roth5c354b92019-04-22 14:55:16 -0600188
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800189OPT_PSP_SOFTFUSE=$(call add_opt_prefix, $(PSP_SOFTFUSE), --soft-fuse)
190
Martin Rothe2d0ba02020-07-29 16:37:57 -0600191ifeq ($(CONFIG_VBOOT),)
192OPT_APOB0_NV_SIZE=$(OPT_APOB_NV_SIZE)
193OPT_APOB0_NV_BASE=$(OPT_APOB_NV_BASE)
194endif
195
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800196OPT_WHITELIST_FILE=$(call add_opt_prefix, $(PSP_WHITELIST_FILE), --whitelist)
197
198# Add all the files listed in the config file
Zheng Baoaf2efbb2020-11-05 18:26:10 +0800199POUND_SIGN=$(call strip_quotes, "\#")
200DEP_FILES= $(patsubst %,$(FIRMWARE_LOCATION)/%, $(shell sed -e /^$(POUND_SIGN)/d -e /^FIRMWARE_LOCATION/d $(CONFIG_AMDFW_CONFIG_FILE) | awk '{print $$2}' ))
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800201
202AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \
Zheng Bao5caca942020-12-04 16:39:38 +0800203 $(OPT_PSP_APCB_FILES_BK) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600204 $(OPT_APOB_ADDR) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600205 $(OPT_PSP_BIOSBIN_FILE) \
206 $(OPT_PSP_BIOSBIN_DEST) \
207 $(OPT_PSP_BIOSBIN_SIZE) \
208 $(OPT_PSP_SOFTFUSE) \
Felix Heldb03dc9c2021-02-12 21:59:47 +0100209 --use-pspsecureos \
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800210 $(OPT_PSP_LOAD_MP2_FW) \
211 $(OPT_PSP_LOAD_S0I3_FW) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600212 $(OPT_WHITELIST_FILE) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600213 $(OPT_PSP_SHAREDMEM_BASE) \
214 $(OPT_PSP_SHAREDMEM_SIZE) \
215 --combo-capable \
216 $(OPT_TOKEN_UNLOCK) \
Matt Papageorge95c42c32020-07-08 11:33:48 -0500217 $(OPT_EFS_SPI_READ_MODE) \
218 $(OPT_EFS_SPI_SPEED) \
219 $(OPT_EFS_SPI_MICRON_FLAG) \
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800220 --config $(CONFIG_AMDFW_CONFIG_FILE) \
Matt Papageorge95c42c32020-07-08 11:33:48 -0500221 --soc-name "Picasso" \
Martin Roth9aa8d112020-06-04 21:31:41 -0600222 --flashsize $(CONFIG_ROM_SIZE)
223
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800224$(obj)/amdfw.rom: $(call strip_quotes, $(PSP_BIOSBIN_FILE)) \
Martin Roth362eaf32020-06-14 10:38:32 -0600225 $(PSP_VERSTAGE_FILE) \
Martin Rothfe87d762020-09-01 11:04:21 -0600226 $(PSP_VERSTAGE_SIG_FILE) \
Raul E Rangelcbaa8352020-05-13 14:01:09 -0600227 $$(PSP_APCB_FILES) \
Zheng Baoc5e28ab2020-10-28 11:38:09 +0800228 $(DEP_FILES) \
Marshall Dawsonb7687232020-01-20 19:56:30 -0700229 $(AMDFWTOOL) \
Raul E Rangel42c5b012021-03-05 11:17:13 -0700230 $(obj)/fmap_config.h \
231 $(objcbfs)/bootblock.elf # this target also creates the .map file
Rob Barnesb2545cc2020-09-09 13:19:09 -0600232 $(if $(PSP_APCB_FILES), ,$(error APCB_SOURCES is not set))
Martin Roth5c354b92019-04-22 14:55:16 -0600233 rm -f $@
234 @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
235 $(AMDFWTOOL) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600236 $(AMDFW_COMMON_ARGS) \
Martin Rothe2d0ba02020-07-29 16:37:57 -0600237 $(OPT_APOB0_NV_SIZE) \
238 $(OPT_APOB0_NV_BASE) \
Martin Roth7c4956d2020-09-01 11:05:53 -0600239 $(OPT_VERSTAGE_FILE) \
Martin Rothfe87d762020-09-01 11:04:21 -0600240 $(OPT_VERSTAGE_SIG_FILE) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600241 --location $(shell printf "%#x" $(PICASSO_FWM_POSITION)) \
242 --output $@
Martin Roth5c354b92019-04-22 14:55:16 -0600243
Felix Held46673222020-04-04 02:37:04 +0200244$(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS)
Marshall Dawson62611412019-06-19 11:46:06 -0600245 rm -f $@
246 @printf " AMDCOMPRS $(subst $(obj)/,,$(@))\n"
Felix Held46673222020-04-04 02:37:04 +0200247 $(AMDCOMPRESS) --infile $(PSP_ELF_FILE) --outfile $@ --compress \
Marshall Dawson62611412019-06-19 11:46:06 -0600248 --maxsize $(PSP_BIOSBIN_SIZE)
249
Martin Roth9aa8d112020-06-04 21:31:41 -0600250$(obj)/amdfw_a.rom: $(obj)/amdfw.rom
251 rm -f $@
252 @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
253 $(AMDFWTOOL) \
254 $(AMDFW_COMMON_ARGS) \
Martin Rothe2d0ba02020-07-29 16:37:57 -0600255 $(OPT_APOB_NV_SIZE) \
256 $(OPT_APOB_NV_BASE) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600257 --location $(shell printf "%#x" $(CONFIG_PICASSO_FW_A_POSITION)) \
258 --anywhere \
259 --output $@
260
261$(obj)/amdfw_b.rom: $(obj)/amdfw.rom
262 rm -f $@
263 @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
264 $(AMDFWTOOL) \
265 $(AMDFW_COMMON_ARGS) \
Martin Rothe2d0ba02020-07-29 16:37:57 -0600266 $(OPT_APOB_NV_SIZE) \
267 $(OPT_APOB_NV_BASE) \
Martin Roth9aa8d112020-06-04 21:31:41 -0600268 --location $(shell printf "%#x" $(CONFIG_PICASSO_FW_B_POSITION)) \
269 --anywhere \
270 --output $@
271
Martin Roth5c354b92019-04-22 14:55:16 -0600272cbfs-files-y += apu/amdfw
273apu/amdfw-file := $(obj)/amdfw.rom
Marshall Dawsonbc4c9032019-06-11 12:18:20 -0600274apu/amdfw-position := $(PICASSO_FWM_POSITION)
Martin Roth5c354b92019-04-22 14:55:16 -0600275apu/amdfw-type := raw
276
Martin Roth9aa8d112020-06-04 21:31:41 -0600277ifeq ($(CONFIG_VBOOT_SLOTS_RW_AB)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy)
278cbfs-files-y += apu/amdfw_a
279apu/amdfw_a-file := $(obj)/amdfw_a.rom
280apu/amdfw_a-position := $(call strip_quotes, $(CONFIG_PICASSO_FW_A_POSITION))
281apu/amdfw_a-type := raw
282
283cbfs-files-y += apu/amdfw_b
284apu/amdfw_b-file := $(obj)/amdfw_b.rom
285apu/amdfw_b-position := $(call strip_quotes, $(CONFIG_PICASSO_FW_B_POSITION))
286apu/amdfw_b-type := raw
287endif
288
Furquan Shaikhc6d89fb2020-05-28 11:21:26 -0700289$(call strip_quotes,$(CONFIG_FSP_M_CBFS))-options := -b $(CONFIG_FSP_M_ADDR)
290
Zheng Bao13d6a462021-01-20 11:05:38 +0800291cpu_microcode_bins += $(wildcard ${FIRMWARE_LOCATION}/UcodePatch_*.bin)
Zheng Bao6ba591b2020-06-09 09:47:06 +0800292
Martin Roth1f337622019-04-22 16:08:31 -0600293endif # ($(CONFIG_SOC_AMD_PICASSO),y)