Patrick Georgi | 11f0079 | 2020-03-04 15:10:45 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Aaron Durbin | 956c4f2 | 2015-09-05 13:31:14 -0500 | [diff] [blame] | 2 | |
| 3 | #include <memlayout.h> |
| 4 | #include <arch/header.ld> |
| 5 | |
Jeremy Compostella | b7832de | 2023-08-30 15:42:09 -0700 | [diff] [blame] | 6 | /* |
| 7 | * The bootblock linker script should be included before the Cache-As-RAM linker |
| 8 | * script. Indeed, if it is included after and Cache-As-RAM .data section |
| 9 | * support is enabled, the definition order of the sections makes the linker |
| 10 | * create an image with an almost 4 GB hole. |
| 11 | */ |
| 12 | #if ENV_BOOTBLOCK |
| 13 | INCLUDE "bootblock/arch/x86/bootblock.ld" |
| 14 | #endif /* ENV_BOOTBLOCK */ |
| 15 | |
Aaron Durbin | 956c4f2 | 2015-09-05 13:31:14 -0500 | [diff] [blame] | 16 | SECTIONS |
| 17 | { |
| 18 | /* |
| 19 | * It would be good to lay down RAMSTAGE, ROMSTAGE, etc consecutively |
| 20 | * like other architectures/chipsets it's not possible because of |
| 21 | * the linking games played during romstage creation by trying |
| 22 | * to find the final landing place in CBFS for XIP. Therefore, |
| 23 | * conditionalize with macros. |
| 24 | */ |
| 25 | #if ENV_RAMSTAGE |
Arthur Heymans | 0c62987 | 2022-03-30 19:34:10 +0200 | [diff] [blame] | 26 | /* Relocated at runtime in cbmem so the address does not matter. */ |
| 27 | RAMSTAGE(64M, 8M) |
Aaron Durbin | 956c4f2 | 2015-09-05 13:31:14 -0500 | [diff] [blame] | 28 | |
Arthur Heymans | a2bc254 | 2021-05-29 08:10:49 +0200 | [diff] [blame] | 29 | #elif ENV_SEPARATE_ROMSTAGE |
Aaron Durbin | 294ce85 | 2015-09-15 17:04:13 -0500 | [diff] [blame] | 30 | /* The 1M size is not allocated. It's just for basic size checking. |
| 31 | * Link at 32MiB address and rely on cbfstool to relocate to XIP. */ |
Andrey Petrov | ccd300b | 2016-02-28 22:04:51 -0800 | [diff] [blame] | 32 | ROMSTAGE(CONFIG_ROMSTAGE_ADDR, 1M) |
Aaron Durbin | 956c4f2 | 2015-09-05 13:31:14 -0500 | [diff] [blame] | 33 | |
Arthur Heymans | 28de28d | 2022-05-15 21:46:44 +0200 | [diff] [blame] | 34 | INCLUDE "romstage/arch/x86/car.ld" |
Julius Werner | 21a4053 | 2020-04-21 16:03:53 -0700 | [diff] [blame] | 35 | #elif ENV_SEPARATE_VERSTAGE |
Aaron Durbin | 75c51d9 | 2015-09-29 16:31:20 -0500 | [diff] [blame] | 36 | /* The 1M size is not allocated. It's just for basic size checking. |
| 37 | * Link at 32MiB address and rely on cbfstool to relocate to XIP. */ |
Andrey Petrov | ccd300b | 2016-02-28 22:04:51 -0800 | [diff] [blame] | 38 | VERSTAGE(CONFIG_VERSTAGE_ADDR, 1M) |
Aaron Durbin | 75c51d9 | 2015-09-29 16:31:20 -0500 | [diff] [blame] | 39 | |
Arthur Heymans | 28de28d | 2022-05-15 21:46:44 +0200 | [diff] [blame] | 40 | INCLUDE "verstage/arch/x86/car.ld" |
Aaron Durbin | eb907b3 | 2016-01-21 00:08:17 -0600 | [diff] [blame] | 41 | #elif ENV_BOOTBLOCK |
Aaron Durbin | eb907b3 | 2016-01-21 00:08:17 -0600 | [diff] [blame] | 42 | |
Arthur Heymans | 28de28d | 2022-05-15 21:46:44 +0200 | [diff] [blame] | 43 | INCLUDE "bootblock/arch/x86/car.ld" |
Aaron Durbin | eb907b3 | 2016-01-21 00:08:17 -0600 | [diff] [blame] | 44 | |
Aaron Durbin | 7f8afe0 | 2016-03-18 12:21:23 -0500 | [diff] [blame] | 45 | #elif ENV_POSTCAR |
| 46 | POSTCAR(32M, 1M) |
Aaron Durbin | 956c4f2 | 2015-09-05 13:31:14 -0500 | [diff] [blame] | 47 | #endif |
| 48 | } |