Blame - src/arch/x86/Kconfig - coreboot

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Stefan Reinauer	1b34226	2011-01-05 02:27:53 +0000	[diff] [blame]	1	menu "Architecture (x86)"
				2
Uwe Hermann	168b11b	2009-10-07 16:15:40 +0000	[diff] [blame]	3	# This is an SMP option. It relates to starting up APs.
				4	# It is usually set in mainboard/*/Kconfig.
				5	# TODO: Improve description.
Sven Schnelle	51676b1	2012-07-29 19:18:03 +0200	[diff] [blame]	6	config AP_IN_SIPI_WAIT
				7	bool
				8	default n
Stefan Reinauer	2a6f390	2012-10-15 13:38:09 -0700	[diff] [blame]	9	depends on ARCH_X86 && SMP
Ronald G. Minnich	6ed39d9	2009-08-29 02:59:35 +0000	[diff] [blame]	10
Kyösti Mälkki	f8c7c23	2012-04-06 04:03:50 +0300	[diff] [blame]	11	# Aligns 16bit entry code in bootblock so that hyper-threading CPUs
				12	# can boot AP CPUs to enable their shared caches.
				13	config SIPI_VECTOR_IN_ROM
				14	bool
				15	default n
				16	depends on ARCH_X86
				17
Patrick Georgi	0588d19	2009-08-12 15:00:51 +0000	[diff] [blame]	18	config RAMBASE
				19	hex
				20	default 0x100000
				21
Stefan Reinauer	523ebd9	2010-04-14 18:59:42 +0000	[diff] [blame]	22	config RAMTOP
				23	hex
				24	default 0x200000
				25
Patrick Georgi	0588d19	2009-08-12 15:00:51 +0000	[diff] [blame]	26	config STACK_SIZE
				27	hex
Stefan Reinauer	9c03957	2012-10-15 13:39:00 -0700	[diff] [blame]	28	default 0x1000
Patrick Georgi	0588d19	2009-08-12 15:00:51 +0000	[diff] [blame]	29
Uwe Hermann	168b11b	2009-10-07 16:15:40 +0000	[diff] [blame]	30	# Maximum reboot count
				31	# TODO: Improve description.
Patrick Georgi	0588d19	2009-08-12 15:00:51 +0000	[diff] [blame]	32	config MAX_REBOOT_CNT
Uwe Hermann	168b11b	2009-10-07 16:15:40 +0000	[diff] [blame]	33	int
Patrick Georgi	0588d19	2009-08-12 15:00:51 +0000	[diff] [blame]	34	default 3
				35
Stefan Reinauer	8aedcbc	2010-12-16 23:37:17 +0000	[diff] [blame]	36	# We had to rename the choice options under arch/ because otherwise
				37	# the options would conflict between different architectures despite
				38	# the if ARCH_xxx guarding the arch/xxx/Kconfig sourcing.
Patrick Georgi	c9fa96d	2010-02-24 13:58:23 +0000	[diff] [blame]	39	choice
				40	prompt "Bootblock behaviour"
Stefan Reinauer	8aedcbc	2010-12-16 23:37:17 +0000	[diff] [blame]	41	default X86_BOOTBLOCK_SIMPLE
Patrick Georgi	c9fa96d	2010-02-24 13:58:23 +0000	[diff] [blame]	42
Stefan Reinauer	8aedcbc	2010-12-16 23:37:17 +0000	[diff] [blame]	43	config X86_BOOTBLOCK_SIMPLE
Patrick Georgi	c9fa96d	2010-02-24 13:58:23 +0000	[diff] [blame]	44	bool "Always load fallback"
				45
Stefan Reinauer	8aedcbc	2010-12-16 23:37:17 +0000	[diff] [blame]	46	config X86_BOOTBLOCK_NORMAL
Patrick Georgi	c9fa96d	2010-02-24 13:58:23 +0000	[diff] [blame]	47	bool "Switch to normal if CMOS says so"
				48
				49	endchoice
				50
				51	config BOOTBLOCK_SOURCE
				52	string
Stefan Reinauer	8aedcbc	2010-12-16 23:37:17 +0000	[diff] [blame]	53	default "bootblock_simple.c" if X86_BOOTBLOCK_SIMPLE
				54	default "bootblock_normal.c" if X86_BOOTBLOCK_NORMAL
Patrick Georgi	c9fa96d	2010-02-24 13:58:23 +0000	[diff] [blame]	55
Patrick Georgi	967952a	2010-02-09 19:41:11 +0000	[diff] [blame]	56	config UPDATE_IMAGE
				57	bool "Update existing coreboot.rom image"
				58	default n
Patrick Georgi	967952a	2010-02-09 19:41:11 +0000	[diff] [blame]	59	help
Uwe Hermann	16db6c3	2010-09-23 18:48:27 +0000	[diff] [blame]	60	If this option is enabled, no new coreboot.rom file
				61	is created. Instead it is expected that there already
				62	is a suitable file for further processing.
				63	The bootblock will not be modified.
Patrick Georgi	967952a	2010-02-09 19:41:11 +0000	[diff] [blame]	64
Patrick Georgi	2063197a	2010-02-09 12:21:10 +0000	[diff] [blame]	65	config ROMCC
				66	bool
				67	default n
				68
Stefan Reinauer	8aedcbc	2010-12-16 23:37:17 +0000	[diff] [blame]	69	config PC80_SYSTEM
				70	bool
				71	default y
				72
Kyösti Mälkki	48e21ec	2012-11-14 08:08:50 +0200	[diff] [blame]	73	config BOOTBLOCK_MAINBOARD_INIT
				74	string
				75
Patrick Georgi	1bb6828	2009-12-31 12:56:53 +0000	[diff] [blame]	76	config BOOTBLOCK_NORTHBRIDGE_INIT
				77	string
				78
Patrick Georgi	a865b17	2011-01-14 07:40:24 +0000	[diff] [blame]	79	config HAVE_CMOS_DEFAULT
				80	def_bool n
				81
				82	config CMOS_DEFAULT_FILE
				83	string
				84	depends on HAVE_CMOS_DEFAULT
				85
Patrick Georgi	1bb6828	2009-12-31 12:56:53 +0000	[diff] [blame]	86	config BOOTBLOCK_SOUTHBRIDGE_INIT
				87	string
Stefan Reinauer	1b34226	2011-01-05 02:27:53 +0000	[diff] [blame]	88
Stefan Reinauer	1afe51a	2011-10-26 22:11:52 +0000	[diff] [blame]	89	config HAVE_ARCH_MEMSET
				90	bool
				91	default y
				92
Stefan Reinauer	0054afa	2011-10-25 23:43:34 +0000	[diff] [blame]	93	config HAVE_ARCH_MEMCPY
				94	bool
				95	default y
				96
Stefan Reinauer	3e4fb9d	2011-04-21 21:26:58 +0000	[diff] [blame]	97	config BIG_ENDIAN
				98	bool
				99	default n
				100
				101	config LITTLE_ENDIAN
				102	bool
				103	default !BIG_ENDIAN
				104
Patrick Georgi	d4d5e4d	2012-03-16 19:28:15 +0100	[diff] [blame]	105	config IOAPIC_INTERRUPTS_ON_FSB
				106	bool
				107	default y if !IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
				108
				109	config IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
				110	bool
				111	default n
				112
Stefan Reinauer	5e02bc6	2011-11-17 13:05:31 -0800	[diff] [blame]	113	config PCI_CONF2
				114	bool
				115	default n
				116
Patrick Georgi	9aeb694	2012-10-05 21:54:38 +0200	[diff] [blame]	117	config HPET_ADDRESS
				118	hex
				119	default 0xfed00000 if !HPET_ADDRESS_OVERRIDE
				120
Stefan Reinauer	8483344	2012-11-13 15:04:12 -0800	[diff] [blame]	121	config ID_SECTION_OFFSET
				122	hex
				123	default 0x80
				124
Stefan Reinauer	1b34226	2011-01-05 02:27:53 +0000	[diff] [blame]	125	endmenu