Angel Pons | 4b42983 | 2020-04-02 23:48:50 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Martin Roth | 5474eb1 | 2018-05-26 19:22:33 -0600 | [diff] [blame] | 2 | |
Richard Smith | cb8eab4 | 2006-07-24 04:25:47 +0000 | [diff] [blame] | 3 | #include <console/console.h> |
Arthur Heymans | 46e93f9 | 2021-11-26 14:53:13 +0100 | [diff] [blame] | 4 | #include <cpu/x86/mp.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 5 | #include <device/pci_ops.h> |
Richard Smith | cb8eab4 | 2006-07-24 04:25:47 +0000 | [diff] [blame] | 6 | #include <device/device.h> |
| 7 | #include <device/pci.h> |
| 8 | #include <device/pci_ids.h> |
Arthur Heymans | 46e93f9 | 2021-11-26 14:53:13 +0100 | [diff] [blame] | 9 | #include <stdint.h> |
Uwe Hermann | 1a9c892 | 2007-04-01 17:24:03 +0000 | [diff] [blame] | 10 | #include "i440bx.h" |
Richard Smith | cb8eab4 | 2006-07-24 04:25:47 +0000 | [diff] [blame] | 11 | |
Elyes HAOUAS | 64d2d10 | 2018-02-09 08:43:01 +0100 | [diff] [blame] | 12 | static void northbridge_init(struct device *dev) |
Richard Smith | cb8eab4 | 2006-07-24 04:25:47 +0000 | [diff] [blame] | 13 | { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 14 | printk(BIOS_SPEW, "Northbridge Init\n"); |
Richard Smith | cb8eab4 | 2006-07-24 04:25:47 +0000 | [diff] [blame] | 15 | } |
| 16 | |
Richard Smith | cb8eab4 | 2006-07-24 04:25:47 +0000 | [diff] [blame] | 17 | static struct device_operations northbridge_operations = { |
| 18 | .read_resources = pci_dev_read_resources, |
| 19 | .set_resources = pci_dev_set_resources, |
| 20 | .enable_resources = pci_dev_enable_resources, |
| 21 | .init = northbridge_init, |
Richard Smith | cb8eab4 | 2006-07-24 04:25:47 +0000 | [diff] [blame] | 22 | }; |
| 23 | |
Stefan Reinauer | f1cf1f7 | 2007-10-24 09:08:58 +0000 | [diff] [blame] | 24 | static const struct pci_driver northbridge_driver __pci_driver = { |
Richard Smith | cb8eab4 | 2006-07-24 04:25:47 +0000 | [diff] [blame] | 25 | .ops = &northbridge_operations, |
Felix Singer | 43b7f41 | 2022-03-07 04:34:52 +0100 | [diff] [blame] | 26 | .vendor = PCI_VID_INTEL, |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 27 | .device = 0x7190, |
Richard Smith | cb8eab4 | 2006-07-24 04:25:47 +0000 | [diff] [blame] | 28 | }; |
| 29 | |
Furquan Shaikh | ffa5e8d | 2020-05-13 13:00:49 -0700 | [diff] [blame] | 30 | static void i440bx_domain_read_resources(struct device *dev) |
Richard Smith | cb8eab4 | 2006-07-24 04:25:47 +0000 | [diff] [blame] | 31 | { |
Elyes HAOUAS | 322fa32 | 2018-05-09 17:49:56 +0200 | [diff] [blame] | 32 | struct device *mc_dev; |
Uwe Hermann | f5a6fd2 | 2007-05-27 23:31:31 +0000 | [diff] [blame] | 33 | uint32_t pci_tolm; |
Richard Smith | cb8eab4 | 2006-07-24 04:25:47 +0000 | [diff] [blame] | 34 | |
Furquan Shaikh | ffa5e8d | 2020-05-13 13:00:49 -0700 | [diff] [blame] | 35 | pci_domain_read_resources(dev); |
| 36 | |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 37 | pci_tolm = find_pci_tolm(dev->link_list); |
| 38 | mc_dev = dev->link_list->children; |
Richard Smith | cb8eab4 | 2006-07-24 04:25:47 +0000 | [diff] [blame] | 39 | if (mc_dev) { |
| 40 | unsigned long tomk, tolmk; |
Uwe Hermann | 1a9c892 | 2007-04-01 17:24:03 +0000 | [diff] [blame] | 41 | int idx; |
Richard Smith | cb8eab4 | 2006-07-24 04:25:47 +0000 | [diff] [blame] | 42 | |
Uwe Hermann | f5a6fd2 | 2007-05-27 23:31:31 +0000 | [diff] [blame] | 43 | /* Figure out which areas are/should be occupied by RAM. The |
| 44 | * value of the highest DRB denotes the end of the physical |
| 45 | * memory (in units of 8MB). |
Uwe Hermann | 1a9c892 | 2007-04-01 17:24:03 +0000 | [diff] [blame] | 46 | */ |
Uwe Hermann | f5a6fd2 | 2007-05-27 23:31:31 +0000 | [diff] [blame] | 47 | tomk = ((unsigned long)pci_read_config8(mc_dev, DRB7)); |
Uwe Hermann | f03e4e9 | 2007-05-10 23:59:20 +0000 | [diff] [blame] | 48 | |
Uwe Hermann | f5a6fd2 | 2007-05-27 23:31:31 +0000 | [diff] [blame] | 49 | /* Convert to KB. */ |
| 50 | tomk *= (8 * 1024); |
| 51 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 52 | printk(BIOS_DEBUG, "Setting RAM size to %ld MB\n", tomk / 1024); |
Uwe Hermann | f5a6fd2 | 2007-05-27 23:31:31 +0000 | [diff] [blame] | 53 | |
| 54 | /* Compute the top of low memory. */ |
| 55 | tolmk = pci_tolm / 1024; |
| 56 | |
Richard Smith | cb8eab4 | 2006-07-24 04:25:47 +0000 | [diff] [blame] | 57 | if (tolmk >= tomk) { |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 58 | /* The PCI hole does not overlap the memory. */ |
Richard Smith | cb8eab4 | 2006-07-24 04:25:47 +0000 | [diff] [blame] | 59 | tolmk = tomk; |
| 60 | } |
Uwe Hermann | 1a9c892 | 2007-04-01 17:24:03 +0000 | [diff] [blame] | 61 | |
Uwe Hermann | f5a6fd2 | 2007-05-27 23:31:31 +0000 | [diff] [blame] | 62 | /* Report the memory regions. */ |
Richard Smith | cb8eab4 | 2006-07-24 04:25:47 +0000 | [diff] [blame] | 63 | idx = 10; |
Uwe Hermann | 1a9c892 | 2007-04-01 17:24:03 +0000 | [diff] [blame] | 64 | ram_resource(dev, idx++, 0, 640); |
Uwe Hermann | f5a6fd2 | 2007-05-27 23:31:31 +0000 | [diff] [blame] | 65 | ram_resource(dev, idx++, 768, tolmk - 768); |
Richard Smith | cb8eab4 | 2006-07-24 04:25:47 +0000 | [diff] [blame] | 66 | } |
Richard Smith | cb8eab4 | 2006-07-24 04:25:47 +0000 | [diff] [blame] | 67 | } |
| 68 | |
Richard Smith | cb8eab4 | 2006-07-24 04:25:47 +0000 | [diff] [blame] | 69 | static struct device_operations pci_domain_ops = { |
Furquan Shaikh | ffa5e8d | 2020-05-13 13:00:49 -0700 | [diff] [blame] | 70 | .read_resources = i440bx_domain_read_resources, |
| 71 | .set_resources = pci_domain_set_resources, |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 72 | .scan_bus = pci_domain_scan_bus, |
| 73 | }; |
Richard Smith | cb8eab4 | 2006-07-24 04:25:47 +0000 | [diff] [blame] | 74 | |
Arthur Heymans | 46e93f9 | 2021-11-26 14:53:13 +0100 | [diff] [blame] | 75 | static int get_cpu_count(void) |
Richard Smith | cb8eab4 | 2006-07-24 04:25:47 +0000 | [diff] [blame] | 76 | { |
Arthur Heymans | 46e93f9 | 2021-11-26 14:53:13 +0100 | [diff] [blame] | 77 | return CONFIG_MAX_CPUS; |
| 78 | } |
| 79 | |
| 80 | static const struct mp_ops mp_ops = { |
| 81 | .get_cpu_count = get_cpu_count, |
| 82 | }; |
| 83 | |
| 84 | void mp_init_cpus(struct bus *cpu_bus) |
| 85 | { |
| 86 | /* TODO: Handle mp_init_with_smm failure? */ |
| 87 | mp_init_with_smm(cpu_bus, &mp_ops); |
Richard Smith | cb8eab4 | 2006-07-24 04:25:47 +0000 | [diff] [blame] | 88 | } |
| 89 | |
Richard Smith | cb8eab4 | 2006-07-24 04:25:47 +0000 | [diff] [blame] | 90 | static struct device_operations cpu_bus_ops = { |
Nico Huber | 2f8ba69 | 2020-04-05 14:05:24 +0200 | [diff] [blame] | 91 | .read_resources = noop_read_resources, |
| 92 | .set_resources = noop_set_resources, |
Arthur Heymans | 46e93f9 | 2021-11-26 14:53:13 +0100 | [diff] [blame] | 93 | .init = mp_cpu_bus_init, |
Richard Smith | cb8eab4 | 2006-07-24 04:25:47 +0000 | [diff] [blame] | 94 | }; |
| 95 | |
| 96 | static void enable_dev(struct device *dev) |
| 97 | { |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 98 | /* Set the operations if it is a special bus type */ |
Stefan Reinauer | 4aff445 | 2013-02-12 14:17:15 -0800 | [diff] [blame] | 99 | if (dev->path.type == DEVICE_PATH_DOMAIN) { |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 100 | dev->ops = &pci_domain_ops; |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 101 | } |
Stefan Reinauer | 0aa37c4 | 2013-02-12 15:20:54 -0800 | [diff] [blame] | 102 | else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 103 | dev->ops = &cpu_bus_ops; |
| 104 | } |
Richard Smith | cb8eab4 | 2006-07-24 04:25:47 +0000 | [diff] [blame] | 105 | } |
| 106 | |
| 107 | struct chip_operations northbridge_intel_i440bx_ops = { |
Uwe Hermann | f5a6fd2 | 2007-05-27 23:31:31 +0000 | [diff] [blame] | 108 | CHIP_NAME("Intel 82443BX (440BX) Northbridge") |
Uwe Hermann | 1a9c892 | 2007-04-01 17:24:03 +0000 | [diff] [blame] | 109 | .enable_dev = enable_dev, |
Richard Smith | cb8eab4 | 2006-07-24 04:25:47 +0000 | [diff] [blame] | 110 | }; |