blob: dab0b61919610ea0607207cd1b6bf5f151f6e62c [file] [log] [blame]
Stefan Reinauere1ae4b22012-04-27 23:20:58 +02001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2007-2009 coresystems GmbH
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
20#include <types.h>
21#include <string.h>
22#include <cbmem.h>
23#include <console/console.h>
24#include <arch/acpi.h>
25#include <arch/ioapic.h>
26#include <arch/acpigen.h>
27#include <arch/smp/mpspec.h>
28#include <device/device.h>
29#include <device/pci.h>
30#include <device/pci_ids.h>
31#include <cpu/x86/msr.h>
32#include <vendorcode/google/chromeos/gnvs.h>
33
Stefan Reinauere1ae4b22012-04-27 23:20:58 +020034#include "southbridge/intel/bd82x6x/nvs.h"
35#include "thermal.h"
36
37static global_nvs_t *gnvs_;
38
39static void acpi_update_thermal_table(global_nvs_t *gnvs)
40{
41 gnvs->f4of = FAN4_THRESHOLD_OFF;
42 gnvs->f4on = FAN4_THRESHOLD_ON;
43 gnvs->f4pw = FAN4_PWM;
44
45 gnvs->f3of = FAN3_THRESHOLD_OFF;
46 gnvs->f3on = FAN3_THRESHOLD_ON;
47 gnvs->f3pw = FAN3_PWM;
48
49 gnvs->f2of = FAN2_THRESHOLD_OFF;
50 gnvs->f2on = FAN2_THRESHOLD_ON;
51 gnvs->f2pw = FAN2_PWM;
52
53 gnvs->f1of = FAN1_THRESHOLD_OFF;
54 gnvs->f1on = FAN1_THRESHOLD_ON;
55 gnvs->f1pw = FAN1_PWM;
56
57 gnvs->f0of = FAN0_THRESHOLD_OFF;
58 gnvs->f0on = FAN0_THRESHOLD_ON;
59 gnvs->f0pw = FAN0_PWM;
60
61 gnvs->tcrt = CRITICAL_TEMPERATURE;
62 gnvs->tpsv = PASSIVE_TEMPERATURE;
63 gnvs->tmax = MAX_TEMPERATURE;
64 gnvs->flvl = 5;
65}
66
Vladimir Serbinenko35c0f432014-09-02 22:25:36 +020067void acpi_create_gnvs(global_nvs_t *gnvs)
Stefan Reinauere1ae4b22012-04-27 23:20:58 +020068{
69 gnvs_ = gnvs;
70 memset((void *)gnvs, 0, sizeof(*gnvs));
71 gnvs->apic = 1;
72 gnvs->mpen = 1; /* Enable Multi Processing */
73 gnvs->pcnt = dev_count_cpu();
74
75 /* Enable Front USB ports in S3 by default */
76 gnvs->s3u0 = 1;
77 gnvs->s3u1 = 1;
78
79 /*
80 * Enable Front USB ports in S5 by default
81 * to be consistent with back port behavior
82 */
83 gnvs->s5u0 = 1;
84 gnvs->s5u1 = 1;
85
Stefan Reinauere1ae4b22012-04-27 23:20:58 +020086 /* IGD Displays */
87 gnvs->ndid = 3;
88 gnvs->did[0] = 0x80000100;
89 gnvs->did[1] = 0x80000240;
90 gnvs->did[2] = 0x80000410;
91 gnvs->did[3] = 0x80000410;
92 gnvs->did[4] = 0x00000005;
93
94#if CONFIG_CHROMEOS
95 // TODO(reinauer) this could move elsewhere?
96 chromeos_init_vboot(&(gnvs->chromeos));
97#endif
98
99 acpi_update_thermal_table(gnvs);
100
101 // Stumpy has no arms^H^H^H^HEC.
102 gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO;
103}
104
Stefan Reinauere1ae4b22012-04-27 23:20:58 +0200105unsigned long acpi_fill_madt(unsigned long current)
106{
107 /* Local APICs */
108 current = acpi_create_madt_lapics(current);
109
110 /* IOAPIC */
111 current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
112 2, IO_APIC_ADDR, 0);
113
114 /* INT_SRC_OVR */
115 current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
116 current, 0, 0, 2, 0);
117 current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
118 current, 0, 9, 9, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_HIGH);
119
120 return current;
121}
122
Stefan Reinauere1ae4b22012-04-27 23:20:58 +0200123unsigned long acpi_fill_slit(unsigned long current)
124{
125 // Not implemented
126 return current;
127}
128
129unsigned long acpi_fill_srat(unsigned long current)
130{
131 /* No NUMA, no SRAT */
132 return current;
133}