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Martin Roth19081102024-02-16 10:31:30 -07001## SPDX-License-Identifier: GPL-2.0-only
2
Stefan Reinauer9fe20cb2012-12-07 17:18:43 -08003# Warning: This file is included whether or not the if is here.
4# The if controls how the evaluation occurs.
5# (See also src/Kconfig)
Stefan Reinauer9fe20cb2012-12-07 17:18:43 -08006
Stefan Reinauera48ca842015-04-04 01:58:28 +02007source "src/cpu/*/Kconfig"
Patrick Georgi0588d192009-08-12 15:00:51 +00008
Furquan Shaikhfd337812014-04-22 15:16:54 -07009if ARCH_X86
10
Patrick Georgi0588d192009-08-12 15:00:51 +000011config DCACHE_RAM_BASE
12 hex
Patrick Georgi0588d192009-08-12 15:00:51 +000013
14config DCACHE_RAM_SIZE
15 hex
Patrick Georgi0588d192009-08-12 15:00:51 +000016
Timothy Pearsonb5e46552015-06-02 13:47:36 -050017config DCACHE_BSP_STACK_SIZE
18 hex
19
Felix Heldca928c62020-04-04 01:47:37 +020020config EARLYRAM_BSP_STACK_SIZE
21 depends on RESET_VECTOR_IN_RAM
22 hex
23
Patrick Georgi0588d192009-08-12 15:00:51 +000024config SMP
25 bool
Myles Watson45bb25f2009-09-22 18:49:08 +000026 default y if MAX_CPUS != 1
Patrick Georgi892b0912009-09-24 09:03:06 +000027 default n
Uwe Hermanna29ad5c2009-10-18 18:35:50 +000028 help
29 This option is used to enable certain functions to make coreboot
30 work correctly on symmetric multi processor (SMP) systems.
Ronald G. Minnich149d6752009-10-01 23:22:50 +000031
Ronald G. Minnich149d6752009-10-01 23:22:50 +000032config SSE
33 bool
Stefan Reinauera7acc512010-02-25 13:40:49 +000034 help
35 Select SSE in your socket or model Kconfig if your CPU has SSE
Elyes HAOUAS32fecd62020-02-22 10:15:33 +010036 streaming SIMD instructions.
Stefan Reinauera7acc512010-02-25 13:40:49 +000037
38config SSE2
39 bool
Myles Watson34261952010-03-19 02:33:40 +000040 default n
Aaron Durbinb1aa6112017-06-16 15:20:57 -050041 select SSE
Stefan Reinauera7acc512010-02-25 13:40:49 +000042 help
43 Select SSE2 in your socket or model Kconfig if your CPU has SSE2
44 streaming SIMD instructions. Some parts of coreboot can be built
45 with more efficient code if SSE2 instructions are available.
Patrick Georgi0e9a9252009-10-06 20:48:07 +000046
Stefan Reinauer8aedcbc2010-12-16 23:37:17 +000047endif # ARCH_X86
Alexandru Gagniuc00b579a2012-07-20 00:11:21 -050048
Alexandru Gagniuc66e0c4c2013-12-04 22:21:15 -060049config SUPPORT_CPU_UCODE_IN_CBFS
Alexandru Gagniuc00b579a2012-07-20 00:11:21 -050050 bool
51 default n
52
Martin Roth4c502692015-11-05 08:03:45 -070053config USES_MICROCODE_HEADER_FILES
54 def_bool n
55 select SUPPORT_CPU_UCODE_IN_CBFS
56 help
57 This is selected by a board or chipset to set the default for the
58 microcode source choice to a list of external microcode headers
59
Nico Huberf5ca9222018-11-29 17:05:32 +010060config MICROCODE_BLOB_NOT_IN_BLOB_REPO
61 bool
62 help
63 Selected by platforms that don't maintain microcode updates in the
64 blobs repo yet.
65
66config MICROCODE_BLOB_NOT_HOOKED_UP
67 bool
68 help
69 Selected by platforms that haven't hooked microcode updates up yet.
70
71config MICROCODE_BLOB_UNDISCLOSED
72 bool
73 help
74 Selected by work-in-progress platforms that don't have microcode
75 updates available yet.
76
77config USE_CPU_MICROCODE_CBFS_BINS
78 bool
79 help
80 Automatically selected below to add binary microcode files
81 (`cpu_microcode_bins` in the makefiles) to CBFS.
82
Alexandru Gagniuc00b579a2012-07-20 00:11:21 -050083choice
Stefan Reinauer9c29cfa2013-02-27 20:24:11 +010084 prompt "Include CPU microcode in CBFS" if ARCH_X86
Martin Roth4c502692015-11-05 08:03:45 -070085 default CPU_MICROCODE_CBFS_EXTERNAL_HEADER if USES_MICROCODE_HEADER_FILES
Nico Huberf5ca9222018-11-29 17:05:32 +010086 default CPU_MICROCODE_CBFS_NONE if MICROCODE_BLOB_NOT_IN_BLOB_REPO || \
87 MICROCODE_BLOB_NOT_HOOKED_UP || \
88 MICROCODE_BLOB_UNDISCLOSED
Subrata Banik3c1b7b42023-05-20 16:28:18 +053089 depends on SUPPORT_CPU_UCODE_IN_CBFS && !CPU_INTEL_MICROCODE_CBFS_SPLIT_BINS
Alexandru Gagniuc00b579a2012-07-20 00:11:21 -050090
Nico Huberf5ca9222018-11-29 17:05:32 +010091config CPU_MICROCODE_CBFS_DEFAULT_BINS
Alexandru Gagniuc00b579a2012-07-20 00:11:21 -050092 bool "Generate from tree"
Nico Huberf5ca9222018-11-29 17:05:32 +010093 select USE_CPU_MICROCODE_CBFS_BINS
94 depends on !(MICROCODE_BLOB_NOT_IN_BLOB_REPO || \
95 MICROCODE_BLOB_NOT_HOOKED_UP || \
96 MICROCODE_BLOB_UNDISCLOSED)
Alexandru Gagniuc00b579a2012-07-20 00:11:21 -050097 help
98 Select this option if you want microcode updates to be assembled when
99 building coreboot and included in the final image as a separate CBFS
100 file. Microcode will not be hard-coded into ramstage.
101
Stefan Tauner0ce2b432013-04-01 13:45:44 +0200102 The microcode file may be removed from the ROM image at a later
Alexandru Gagniuc00b579a2012-07-20 00:11:21 -0500103 time with cbfstool, if desired.
104
105 If unsure, select this option.
106
Nico Huberf5ca9222018-11-29 17:05:32 +0100107config CPU_MICROCODE_CBFS_EXTERNAL_BINS
108 bool "Include external microcode binary"
109 select USE_CPU_MICROCODE_CBFS_BINS
Nico Huberf5ca9222018-11-29 17:05:32 +0100110 help
111 Select this option if you want to include external binary files
112 in the CPUs native format. They will be included as a separate
113 file in CBFS.
114
115 A word of caution: only select this option if you are sure the
116 microcode that you have is newer than the microcode shipping with
117 coreboot.
118
119 The microcode file may be removed from the ROM image at a later
120 time with cbfstool, if desired.
121
122 If unsure, and applicable, select "Generate from tree"
123
Martin Roth4c502692015-11-05 08:03:45 -0700124config CPU_MICROCODE_CBFS_EXTERNAL_HEADER
125 bool "Include external microcode header files"
126 help
127 Select this option if you want to include external c header files
128 containing the CPU microcode. This will be included as a separate
129 file in CBFS.
130
131 A word of caution: only select this option if you are sure the
132 microcode that you have is newer than the microcode shipping with
133 coreboot.
134
135 The microcode file may be removed from the ROM image at a later
136 time with cbfstool, if desired.
137
Nico Huberf5ca9222018-11-29 17:05:32 +0100138 If unsure, and applicable, select "Generate from tree"
Martin Roth4c502692015-11-05 08:03:45 -0700139
Alexandru Gagniuc00b579a2012-07-20 00:11:21 -0500140config CPU_MICROCODE_CBFS_NONE
141 bool "Do not include microcode updates"
142 help
143 Select this option if you do not want CPU microcode included in CBFS.
Alexandru Gagniuc00b579a2012-07-20 00:11:21 -0500144
145 Microcode may be added to the ROM image at a later time with cbfstool,
146 if desired.
147
Nico Huberf5ca9222018-11-29 17:05:32 +0100148 If unsure, and applicable, select "Generate from tree"
Alexandru Gagniuc00b579a2012-07-20 00:11:21 -0500149
150 The GOOD:
151 Microcode updates intend to solve issues that have been discovered
152 after CPU production. The expected effect is that systems work as
153 intended with the updated microcode, but we have also seen cases where
154 issues were solved by not applying microcode updates.
155
156 The BAD:
157 Note that some operating system include these same microcode patches,
158 so you may need to also disable microcode updates in your operating
159 system for this option to have an effect.
160
161 The UGLY:
162 A word of CAUTION: some CPUs depend on microcode updates to function
163 correctly. Not updating the microcode may leave the CPU operating at
164 less than optimal performance, or may cause outright hangups.
165 There are CPUs where coreboot cannot properly initialize the CPU
166 without microcode updates
167 For example, if running with the factory microcode, some Intel
168 SandyBridge CPUs may hang when enabling CAR, or some VIA Nano CPUs
169 will hang when changing the frequency.
170
171 Make sure you have a way of flashing the ROM externally before
172 selecting this option.
173
174endchoice
Jens Rottmann686dc0d2013-02-18 17:26:01 +0100175
Martin Roth4c502692015-11-05 08:03:45 -0700176config CPU_MICROCODE_HEADER_FILES
177 string "List of space separated microcode header files with the path"
178 depends on CPU_MICROCODE_CBFS_EXTERNAL_HEADER
179 help
180 A list of one or more microcode header files with path from the
181 coreboot directory. These should be separated by spaces.
Martin Roth3eb65ec2016-08-30 16:21:53 -0600182
183config CPU_UCODE_BINARIES
184 string "Microcode binary path and filename"
Nico Huberf5ca9222018-11-29 17:05:32 +0100185 depends on CPU_MICROCODE_CBFS_EXTERNAL_BINS
Martin Roth3eb65ec2016-08-30 16:21:53 -0600186 default ""
187 help
188 Some platforms have microcode in the blobs directory, and these can
189 be hardcoded in the makefiles. For platforms with microcode
190 binaries that aren't in the makefile, set this option to pull
191 in the microcode.
192
193 This should contain the full path of the file for one or more
194 microcode binary files to include, separated by spaces.
195
196 If unsure, leave this blank.