Angel Pons | 60ec365 | 2020-04-03 01:22:13 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Naresh G Solanki | ab5d690 | 2016-10-15 18:13:55 +0530 | [diff] [blame] | 2 | |
| 3 | #ifndef MAINBOARD_GPIO_H |
| 4 | #define MAINBOARD_GPIO_H |
| 5 | |
| 6 | #include <soc/gpe.h> |
| 7 | #include <soc/gpio.h> |
| 8 | |
Naresh G Solanki | 5a08fb2 | 2016-11-09 18:53:53 +0530 | [diff] [blame] | 9 | /* TCA6424A I/O Expander */ |
| 10 | #define IO_EXPANDER_BUS 4 |
| 11 | #define IO_EXPANDER_0_ADDR 0x22 |
| 12 | #define IO_EXPANDER_P0CONF 0x0C /* Port 0 conf offset */ |
| 13 | #define IO_EXPANDER_P0DOUT 0x04 /* Port 0 data offset */ |
| 14 | #define IO_EXPANDER_P1CONF 0x0D |
| 15 | #define IO_EXPANDER_P1DOUT 0x05 |
| 16 | #define IO_EXPANDER_P2CONF 0x0E |
| 17 | #define IO_EXPANDER_P2DOUT 0x06 |
| 18 | #define IO_EXPANDER_1_ADDR 0x23 |
| 19 | |
Naresh G Solanki | ab5d690 | 2016-10-15 18:13:55 +0530 | [diff] [blame] | 20 | /* EC wake is LAN_WAKE# which is a special DeepSX wake pin */ |
| 21 | #define GPE_EC_WAKE GPE0_LAN_WAK |
| 22 | |
Naresh G Solanki | ab5d690 | 2016-10-15 18:13:55 +0530 | [diff] [blame] | 23 | /* GPP_E16 is EC_SCI_L. GPP_E group is routed to DW2 in the GPE0 block */ |
| 24 | #define EC_SCI_GPI GPE0_DW2_16 |
| 25 | #define EC_SMI_GPI GPP_E15 |
| 26 | |
Naresh G Solanki | ab5d690 | 2016-10-15 18:13:55 +0530 | [diff] [blame] | 27 | #ifndef __ACPI__ |
| 28 | /* Pad configuration in ramstage. */ |
| 29 | static const struct pad_config gpio_table[] = { |
Naresh G Solanki | cebf645 | 2016-10-27 20:28:23 +0530 | [diff] [blame] | 30 | /* PCH_RCIN */ PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1), |
Michael Niewöhner | f50ea98 | 2020-10-19 12:31:21 +0200 | [diff] [blame] | 31 | /* LPC_LAD_0 */ PAD_CFG_NF(GPP_A1, DN_20K, DEEP, NF1), |
| 32 | /* LPC_LAD_1 */ PAD_CFG_NF(GPP_A2, DN_20K, DEEP, NF1), |
| 33 | /* LPC_LAD_2 */ PAD_CFG_NF(GPP_A3, DN_20K, DEEP, NF1), |
| 34 | /* LPC_LAD_3 */ PAD_CFG_NF(GPP_A4, DN_20K, DEEP, NF1), |
Naresh G Solanki | ab5d690 | 2016-10-15 18:13:55 +0530 | [diff] [blame] | 35 | /* LPC_FRAME */ PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1), |
| 36 | /* LPC_SERIRQ */ PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1), |
Michael Niewöhner | f50ea98 | 2020-10-19 12:31:21 +0200 | [diff] [blame] | 37 | /* PM_SLP_S0ix_N */ PAD_CFG_GPI_GPIO_DRIVER(GPP_A7, UP_20K, DEEP), |
Naresh G Solanki | ab5d690 | 2016-10-15 18:13:55 +0530 | [diff] [blame] | 38 | /* LPC_CLKRUN */ PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1), |
Michael Niewöhner | f50ea98 | 2020-10-19 12:31:21 +0200 | [diff] [blame] | 39 | /* LPC_CLK */ PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1), |
| 40 | /* PCH_LPC_CLK */ PAD_CFG_NF(GPP_A10, DN_20K, DEEP, NF1), |
| 41 | /* EC_HID_INT */ PAD_NC(GPP_A11, NONE), |
| 42 | /* ISH_KB_PROX_INT */ PAD_NC(GPP_A12, NONE), |
Naresh G Solanki | ab5d690 | 2016-10-15 18:13:55 +0530 | [diff] [blame] | 43 | /* PCH_SUSPWRACB */ PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1), |
Michael Niewöhner | f50ea98 | 2020-10-19 12:31:21 +0200 | [diff] [blame] | 44 | /* PM_SUS_STAT */ PAD_NC(GPP_A14, NONE), |
| 45 | /* SUSACK_R_N */ PAD_CFG_NF(GPP_A15, DN_20K, DEEP, NF1), |
Naresh G Solanki | ab5d690 | 2016-10-15 18:13:55 +0530 | [diff] [blame] | 46 | /* SD_1P8_SEL */ PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1), |
| 47 | /* SD_PWR_EN */ PAD_CFG_NF(GPP_A17, NONE, DEEP, NF1), |
Michael Niewöhner | f50ea98 | 2020-10-19 12:31:21 +0200 | [diff] [blame] | 48 | /* ISH_GP0 */ PAD_NC(GPP_A18, NONE), |
| 49 | /* ISH_GP1 */ PAD_NC(GPP_A19, NONE), |
| 50 | /* ISH_GP2 */ PAD_NC(GPP_A20, NONE), |
| 51 | /* ISH_GP3 */ PAD_NC(GPP_A21, NONE), |
| 52 | /* ISH_GP4 */ PAD_NC(GPP_A22, NONE), |
| 53 | /* ISH_GP5 */ PAD_NC(GPP_A23, NONE), |
| 54 | /* V0.85A_VID0 */ PAD_NC(GPP_B0, NONE), |
| 55 | /* V0.85A_VID1 */ PAD_NC(GPP_B1, NONE), |
Furquan Shaikh | 219ebb9 | 2017-10-06 17:05:50 -0700 | [diff] [blame] | 56 | /* GP_VRALERTB */ PAD_CFG_GPI_GPIO_DRIVER(GPP_B2, NONE, DEEP), |
Michael Niewöhner | f50ea98 | 2020-10-19 12:31:21 +0200 | [diff] [blame] | 57 | /* TCH_PAD_INTR */ PAD_CFG_GPI_APIC_HIGH(GPP_B3, NONE, PLTRST), |
Naresh G Solanki | cebf645 | 2016-10-27 20:28:23 +0530 | [diff] [blame] | 58 | /* BT_RF_KILL */ PAD_CFG_GPO(GPP_B4, 1, DEEP), |
Michael Niewöhner | f50ea98 | 2020-10-19 12:31:21 +0200 | [diff] [blame] | 59 | /* CLK_REQ_SLOT0 */ PAD_NC(GPP_B5, NONE), |
Naresh G Solanki | cebf645 | 2016-10-27 20:28:23 +0530 | [diff] [blame] | 60 | /* CLK_REQ_SLOT1 */ PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1), |
| 61 | /* CLK_REQ_SLOT2 */ PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1), |
| 62 | /* CLK_REQ_SLOT3 */ PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1), |
| 63 | /* CLK_REQ_SLOT4 */ PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1), |
| 64 | /* CLK_REQ_SLOT5 */ PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1), |
| 65 | /* MPHY_EXT_PWR_GATE */ PAD_CFG_NF(GPP_B11, NONE, DEEP, NF1), |
Naresh G Solanki | ab5d690 | 2016-10-15 18:13:55 +0530 | [diff] [blame] | 66 | /* PM_SLP_S0 */ PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1), |
| 67 | /* PCH_PLT_RST */ PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), |
Naresh G Solanki | cebf645 | 2016-10-27 20:28:23 +0530 | [diff] [blame] | 68 | /* TCH_PNL_PWREN */ PAD_CFG_GPO(GPP_B14, 1, DEEP), |
| 69 | /* GSPI0_CS# */ /* GPP_B15 */ |
Michael Niewöhner | f50ea98 | 2020-10-19 12:31:21 +0200 | [diff] [blame] | 70 | /* WLAN_PCIE_WAKE */ PAD_CFG_GPI_SCI(GPP_B16, NONE, DEEP, EDGE_SINGLE, INVERT), |
| 71 | /* TBT_CIO */ PAD_NC(GPP_B17, NONE), |
| 72 | /* SLOT1_WAKE */ PAD_CFG_GPI_SCI(GPP_B18, UP_20K, DEEP, EDGE_SINGLE, INVERT), |
Naresh G Solanki | cebf645 | 2016-10-27 20:28:23 +0530 | [diff] [blame] | 73 | /* GSPI1_CS */ PAD_CFG_NF(GPP_B19, NONE, DEEP, NF1), |
Michael Niewöhner | f50ea98 | 2020-10-19 12:31:21 +0200 | [diff] [blame] | 74 | /* GSPI1_CLK */ PAD_CFG_NF(GPP_B20, DN_20K, DEEP, NF1), |
| 75 | /* GSPI1_MISO */ PAD_CFG_NF(GPP_B21, DN_20K, DEEP, NF1), |
| 76 | /* GSPI1_MOSI */ PAD_CFG_NF(GPP_B22, DN_20K, DEEP, NF1), |
Naresh G Solanki | cebf645 | 2016-10-27 20:28:23 +0530 | [diff] [blame] | 77 | /* GNSS_RESET */ PAD_CFG_GPO(GPP_B23, 1, DEEP), |
Naresh G Solanki | ab5d690 | 2016-10-15 18:13:55 +0530 | [diff] [blame] | 78 | /* SMB_CLK */ PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1), |
Michael Niewöhner | f50ea98 | 2020-10-19 12:31:21 +0200 | [diff] [blame] | 79 | /* SMB_DATA */ PAD_CFG_NF(GPP_C1, DN_20K, DEEP, NF1), |
Naresh G Solanki | cebf645 | 2016-10-27 20:28:23 +0530 | [diff] [blame] | 80 | /* SMBALERT# */ PAD_CFG_GPO(GPP_C2, 1, DEEP), |
| 81 | /* SML0_CLK */ PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1), |
| 82 | /* SML0DATA */ PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1), |
Michael Niewöhner | f50ea98 | 2020-10-19 12:31:21 +0200 | [diff] [blame] | 83 | /* SML0ALERT# */ PAD_CFG_GPI_APIC_HIGH(GPP_C5, DN_20K, PLTRST), |
Naresh G Solanki | cebf645 | 2016-10-27 20:28:23 +0530 | [diff] [blame] | 84 | /* SML1_CLK */ PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1), |
Michael Niewöhner | f50ea98 | 2020-10-19 12:31:21 +0200 | [diff] [blame] | 85 | /* SML1_DATA */ PAD_CFG_NF(GPP_C7, DN_20K, DEEP, NF1), |
Naresh G Solanki | cebf645 | 2016-10-27 20:28:23 +0530 | [diff] [blame] | 86 | /* UART0_RXD */ PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1), |
| 87 | /* UART0_TXD */ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1), |
| 88 | /* UART0_RTS */ PAD_CFG_NF(GPP_C10, NONE, DEEP, NF1), |
| 89 | /* UART0_CTS */ PAD_CFG_NF(GPP_C11, NONE, DEEP, NF1), |
| 90 | /* UART1_RXD */ PAD_CFG_NF(GPP_C12, NONE, DEEP, NF1), |
| 91 | /* UART1_TXD */ PAD_CFG_NF(GPP_C13, NONE, DEEP, NF1), |
| 92 | /* UART1_RTS */ PAD_CFG_NF(GPP_C14, NONE, DEEP, NF1), |
| 93 | /* UART1_CTS */ PAD_CFG_NF(GPP_C15, NONE, DEEP, NF1), |
Michael Niewöhner | f50ea98 | 2020-10-19 12:31:21 +0200 | [diff] [blame] | 94 | /* I2C0_SDA */ PAD_CFG_NF(GPP_C16, UP_5K, DEEP, NF1), |
| 95 | /* I2C0_SCL */ PAD_CFG_NF(GPP_C17, UP_5K, DEEP, NF1), |
Naresh G Solanki | ab5d690 | 2016-10-15 18:13:55 +0530 | [diff] [blame] | 96 | /* I2C1_SDA */ PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1), |
| 97 | /* I2C1_SCL */ PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1), |
Naresh G Solanki | cebf645 | 2016-10-27 20:28:23 +0530 | [diff] [blame] | 98 | /* UART2_RXD */ PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), |
| 99 | /* UART2_TXD */ PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), |
| 100 | /* UART2_RTS */ PAD_CFG_NF(GPP_C22, NONE, DEEP, NF1), |
| 101 | /* UART2_CTS */ PAD_CFG_NF(GPP_C23, NONE, DEEP, NF1), |
| 102 | /* SPI1_CS */ PAD_CFG_NF(GPP_D0, NONE, DEEP, NF1), |
| 103 | /* SPI1_CLK */ PAD_CFG_NF(GPP_D1, NONE, DEEP, NF1), |
| 104 | /* SPI1_MISO */ PAD_CFG_NF(GPP_D2, NONE, DEEP, NF1), |
| 105 | /* SPI1_MOSI */ PAD_CFG_NF(GPP_D3, NONE, DEEP, NF1), |
| 106 | /* CAM_FLASH_STROBE */ PAD_CFG_NF(GPP_D4, NONE, DEEP, NF1), |
| 107 | /* ISH_I2C0_SDA */ PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1), |
| 108 | /* ISH_I2C0_SCL */ PAD_CFG_NF(GPP_D6, NONE, DEEP, NF1), |
| 109 | /* ISH_I2C1_SDA */ PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1), |
| 110 | /* ISH_I2C1_SCL */ PAD_CFG_NF(GPP_D8, NONE, DEEP, NF1), |
Furquan Shaikh | 219ebb9 | 2017-10-06 17:05:50 -0700 | [diff] [blame] | 111 | /* HOME_BTN */ PAD_CFG_GPI_GPIO_DRIVER(GPP_D9, NONE, DEEP), |
| 112 | /* SCREEN_LOCK */ PAD_CFG_GPI_GPIO_DRIVER(GPP_D10, NONE, DEEP), |
| 113 | /* VOL_UP_PCH */ PAD_CFG_GPI_GPIO_DRIVER(GPP_D11, NONE, DEEP), |
| 114 | /* VOL_DOWN_PCH */ PAD_CFG_GPI_GPIO_DRIVER(GPP_D12, NONE, DEEP), |
Naresh G Solanki | cebf645 | 2016-10-27 20:28:23 +0530 | [diff] [blame] | 115 | /* ISH_UART0_RXD */ PAD_CFG_NF(GPP_D13, NONE, DEEP, NF1), |
| 116 | /* ISH_UART0_TXD */ PAD_CFG_NF(GPP_D14, NONE, DEEP, NF1), |
| 117 | /* ISH_UART0_RTS */ PAD_CFG_NF(GPP_D15, NONE, DEEP, NF1), |
| 118 | /* ISH_UART0_CTS */ PAD_CFG_NF(GPP_D16, NONE, DEEP, NF1), |
Naresh G Solanki | ab5d690 | 2016-10-15 18:13:55 +0530 | [diff] [blame] | 119 | /* DMIC_CLK_1 */ PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1), |
Michael Niewöhner | f50ea98 | 2020-10-19 12:31:21 +0200 | [diff] [blame] | 120 | /* DMIC_DATA_1 */ PAD_CFG_NF(GPP_D18, DN_20K, DEEP, NF1), |
Naresh G Solanki | ab5d690 | 2016-10-15 18:13:55 +0530 | [diff] [blame] | 121 | /* DMIC_CLK_0 */ PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1), |
Michael Niewöhner | f50ea98 | 2020-10-19 12:31:21 +0200 | [diff] [blame] | 122 | /* DMIC_DATA_0 */ PAD_CFG_NF(GPP_D20, DN_20K, DEEP, NF1), |
Naresh G Solanki | cebf645 | 2016-10-27 20:28:23 +0530 | [diff] [blame] | 123 | /* SPI1_D2 */ PAD_CFG_NF(GPP_D21, NONE, DEEP, NF1), |
| 124 | /* SPI1_D3 */ PAD_CFG_NF(GPP_D22, NONE, DEEP, NF1), |
Naresh G Solanki | ab5d690 | 2016-10-15 18:13:55 +0530 | [diff] [blame] | 125 | /* I2S_MCLK */ PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1), |
Michael Niewöhner | f50ea98 | 2020-10-19 12:31:21 +0200 | [diff] [blame] | 126 | /* SPI_TPM_IRQ */ PAD_CFG_GPI_APIC_HIGH(GPP_E0, NONE, PLTRST), |
Naresh G Solanki | cebf645 | 2016-10-27 20:28:23 +0530 | [diff] [blame] | 127 | /* SATAXPCIE1 */ PAD_CFG_NF(GPP_E1, NONE, DEEP, NF1), |
Furquan Shaikh | 219ebb9 | 2017-10-06 17:05:50 -0700 | [diff] [blame] | 128 | /* SSD_PEDET */ PAD_CFG_GPI_GPIO_DRIVER(GPP_E2, NONE, DEEP), |
Naresh G Solanki | cebf645 | 2016-10-27 20:28:23 +0530 | [diff] [blame] | 129 | /* EINK_SSR_DFU_N */ PAD_CFG_GPO(GPP_E3, 1, DEEP), |
| 130 | /* SSD_SATA_DEVSLP */ PAD_CFG_GPO(GPP_E4, 0, DEEP), |
| 131 | /* SATA_DEVSLP1 */ PAD_CFG_NF(GPP_E5, NONE, DEEP, NF1), |
| 132 | /* SATA_DEVSLP2 */ /* GPP_E6 */ |
Michael Niewöhner | f50ea98 | 2020-10-19 12:31:21 +0200 | [diff] [blame] | 133 | /* TCH_PNL_INTR* */ PAD_CFG_GPI_APIC_HIGH(GPP_E7, NONE, PLTRST), |
Naresh G Solanki | cebf645 | 2016-10-27 20:28:23 +0530 | [diff] [blame] | 134 | /* SATALED# */ PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1), |
Naresh G Solanki | ab5d690 | 2016-10-15 18:13:55 +0530 | [diff] [blame] | 135 | /* USB2_OC_0 */ PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), |
| 136 | /* USB2_OC_1 */ PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1), |
| 137 | /* USB2_OC_2 */ PAD_CFG_NF(GPP_E11, NONE, DEEP, NF1), |
Michael Niewöhner | f50ea98 | 2020-10-19 12:31:21 +0200 | [diff] [blame] | 138 | /* USB2_OC_3 */ PAD_CFG_GPI_APIC_HIGH(GPP_E12, NONE, PLTRST), |
Naresh G Solanki | ab5d690 | 2016-10-15 18:13:55 +0530 | [diff] [blame] | 139 | /* DDI1_HPD */ PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1), |
| 140 | /* DDI2_HPD */ PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), |
Michael Niewöhner | f50ea98 | 2020-10-19 12:31:21 +0200 | [diff] [blame] | 141 | /* EC_SMI */ PAD_CFG_GPI_SMI(GPP_E15, NONE, DEEP, EDGE_SINGLE, INVERT), |
| 142 | /* EC_SCI */ PAD_CFG_GPI_SCI(GPP_E16, NONE, DEEP, EDGE_SINGLE, INVERT), |
Naresh G Solanki | ab5d690 | 2016-10-15 18:13:55 +0530 | [diff] [blame] | 143 | /* EDP_HPD */ PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1), |
Naresh G Solanki | cebf645 | 2016-10-27 20:28:23 +0530 | [diff] [blame] | 144 | /* DDPB_CTRLCLK */ PAD_CFG_NF(GPP_E18, NONE, DEEP, NF1), |
Michael Niewöhner | f50ea98 | 2020-10-19 12:31:21 +0200 | [diff] [blame] | 145 | /* DDPB_CTRLDATA */ PAD_CFG_NF(GPP_E19, DN_20K, DEEP, NF1), |
Naresh G Solanki | cebf645 | 2016-10-27 20:28:23 +0530 | [diff] [blame] | 146 | /* DDPC_CTRLCLK */ PAD_CFG_NF(GPP_E20, NONE, DEEP, NF1), |
Michael Niewöhner | f50ea98 | 2020-10-19 12:31:21 +0200 | [diff] [blame] | 147 | /* DDPC_CTRLDATA */ PAD_CFG_NF(GPP_E21, DN_20K, DEEP, NF1), |
| 148 | /* DDPD_CTRLCLK */ PAD_CFG_GPI_APIC_HIGH(GPP_E22, NONE, DEEP), |
Naresh G Solanki | ab5d690 | 2016-10-15 18:13:55 +0530 | [diff] [blame] | 149 | /* TCH_PNL_RST */ PAD_CFG_GPO(GPP_E23, 1, DEEP), |
Naresh G Solanki | cebf645 | 2016-10-27 20:28:23 +0530 | [diff] [blame] | 150 | /* I2S2_SCLK */ PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1), |
| 151 | /* I2S2_SFRM */ PAD_CFG_NF(GPP_F1, NONE, DEEP, NF1), |
| 152 | /* I2S2_TXD */ PAD_CFG_NF(GPP_F2, NONE, DEEP, NF1), |
| 153 | /* I2S2_RXD */ PAD_CFG_NF(GPP_F3, NONE, DEEP, NF1), |
| 154 | /* I2C2_SDA */ PAD_CFG_NF_1V8(GPP_F4, NONE, DEEP, NF1), |
| 155 | /* I2C2_SCL */ PAD_CFG_NF_1V8(GPP_F5, NONE, DEEP, NF1), |
| 156 | /* I2C3_SDA */ PAD_CFG_NF_1V8(GPP_F6, NONE, DEEP, NF1), |
| 157 | /* I2C3_SCL */ PAD_CFG_NF_1V8(GPP_F7, NONE, DEEP, NF1), |
Naresh G Solanki | ab5d690 | 2016-10-15 18:13:55 +0530 | [diff] [blame] | 158 | /* I2C4_SDA */ PAD_CFG_NF_1V8(GPP_F8, NONE, DEEP, NF1), |
| 159 | /* I2C4_SDA */ PAD_CFG_NF_1V8(GPP_F9, NONE, DEEP, NF1), |
Naresh G Solanki | cebf645 | 2016-10-27 20:28:23 +0530 | [diff] [blame] | 160 | /* ISH_I2C2_SDA */ PAD_CFG_NF_1V8(GPP_F10, NONE, DEEP, NF2), |
| 161 | /* ISH_I2C2_SCL */ PAD_CFG_NF_1V8(GPP_F11, NONE, DEEP, NF2), |
Naresh G Solanki | ab5d690 | 2016-10-15 18:13:55 +0530 | [diff] [blame] | 162 | /* EMMC_CMD */ PAD_CFG_NF(GPP_F12, NONE, DEEP, NF1), |
| 163 | /* EMMC_DATA0 */ PAD_CFG_NF(GPP_F13, NONE, DEEP, NF1), |
| 164 | /* EMMC_DATA1 */ PAD_CFG_NF(GPP_F14, NONE, DEEP, NF1), |
| 165 | /* EMMC_DATA2 */ PAD_CFG_NF(GPP_F15, NONE, DEEP, NF1), |
| 166 | /* EMMC_DATA3 */ PAD_CFG_NF(GPP_F16, NONE, DEEP, NF1), |
| 167 | /* EMMC_DATA4 */ PAD_CFG_NF(GPP_F17, NONE, DEEP, NF1), |
| 168 | /* EMMC_DATA5 */ PAD_CFG_NF(GPP_F18, NONE, DEEP, NF1), |
| 169 | /* EMMC_DATA6 */ PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1), |
| 170 | /* EMMC_DATA7 */ PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1), |
| 171 | /* EMMC_RCLK */ PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1), |
| 172 | /* EMMC_CLK */ PAD_CFG_NF(GPP_F22, NONE, DEEP, NF1), |
Michael Niewöhner | f50ea98 | 2020-10-19 12:31:21 +0200 | [diff] [blame] | 173 | /* UIM_SIM_DET */ PAD_CFG_GPI_APIC_HIGH(GPP_F23, NONE, DEEP), |
Naresh G Solanki | ab5d690 | 2016-10-15 18:13:55 +0530 | [diff] [blame] | 174 | /* SD_CMD */ PAD_CFG_NF(GPP_G0, NONE, DEEP, NF1), |
| 175 | /* SD_DATA0 */ PAD_CFG_NF(GPP_G1, NONE, DEEP, NF1), |
| 176 | /* SD_DATA1 */ PAD_CFG_NF(GPP_G2, NONE, DEEP, NF1), |
| 177 | /* SD_DATA2 */ PAD_CFG_NF(GPP_G3, NONE, DEEP, NF1), |
| 178 | /* SD_DATA3 */ PAD_CFG_NF(GPP_G4, NONE, DEEP, NF1), |
| 179 | /* SD_CD# */ PAD_CFG_NF(GPP_G5, NONE, DEEP, NF1), |
| 180 | /* SD_CLK */ PAD_CFG_NF(GPP_G6, NONE, DEEP, NF1), |
| 181 | /* SD_WP */ PAD_CFG_NF(GPP_G7, NONE, DEEP, NF1), |
| 182 | /* PCH_BATLOW */ PAD_CFG_NF(GPD0, NONE, DEEP, NF1), |
Naresh G Solanki | cebf645 | 2016-10-27 20:28:23 +0530 | [diff] [blame] | 183 | /* AC_PRESENT */ PAD_CFG_NF(GPD1, NONE, DEEP, NF1), |
| 184 | /* PCH_WAKE */ PAD_CFG_NF(GPD2, NONE, DEEP, NF1), |
Naresh G Solanki | 647d39f | 2016-11-06 13:37:34 +0530 | [diff] [blame] | 185 | /* PCH_PWRBTN */ PAD_CFG_NF(GPD3, NONE, DEEP, NF1), |
Naresh G Solanki | ab5d690 | 2016-10-15 18:13:55 +0530 | [diff] [blame] | 186 | /* PM_SLP_S3# */ PAD_CFG_NF(GPD4, NONE, DEEP, NF1), |
| 187 | /* PM_SLP_S4# */ PAD_CFG_NF(GPD5, NONE, DEEP, NF1), |
| 188 | /* PM_SLP_SA# */ PAD_CFG_NF(GPD6, NONE, DEEP, NF1), |
Michael Niewöhner | f50ea98 | 2020-10-19 12:31:21 +0200 | [diff] [blame] | 189 | /* GPD7 */ PAD_NC(GPD7, NONE), |
Naresh G Solanki | ab5d690 | 2016-10-15 18:13:55 +0530 | [diff] [blame] | 190 | /* PM_SUSCLK */ PAD_CFG_NF(GPD8, NONE, DEEP, NF1), |
Naresh G Solanki | cebf645 | 2016-10-27 20:28:23 +0530 | [diff] [blame] | 191 | /* PCH_SLP_WLAN# */ PAD_CFG_NF(GPD9, NONE, DEEP, NF1), |
| 192 | /* PM_SLP_S5# */ PAD_CFG_NF(GPD10, NONE, DEEP, NF1), |
| 193 | /* LANPHYC */ PAD_CFG_NF(GPD11, NONE, DEEP, NF1), |
Naresh G Solanki | ab5d690 | 2016-10-15 18:13:55 +0530 | [diff] [blame] | 194 | }; |
| 195 | |
Paul Menzel | 520a4a6 | 2021-12-20 08:15:43 +0100 | [diff] [blame] | 196 | /* Early pad configuration in bootblock */ |
Naresh G Solanki | ab5d690 | 2016-10-15 18:13:55 +0530 | [diff] [blame] | 197 | static const struct pad_config early_gpio_table[] = { |
Naresh G Solanki | cebf645 | 2016-10-27 20:28:23 +0530 | [diff] [blame] | 198 | /* UART2_RXD */ PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), |
| 199 | /* UART2_TXD */ PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), |
Naresh G Solanki | ab5d690 | 2016-10-15 18:13:55 +0530 | [diff] [blame] | 200 | }; |
| 201 | |
| 202 | #endif |
| 203 | |
Naresh G Solanki | 647d39f | 2016-11-06 13:37:34 +0530 | [diff] [blame] | 204 | #endif |