Angel Pons | ae59387 | 2020-04-04 18:50:57 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 2 | |
Felix Held | dd2f3fa | 2021-02-08 22:23:54 +0100 | [diff] [blame] | 3 | #include <amdblocks/cpu.h> |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 4 | #include <cpu/cpu.h> |
| 5 | #include <cpu/x86/mp.h> |
| 6 | #include <cpu/x86/mtrr.h> |
| 7 | #include <cpu/x86/msr.h> |
Kyösti Mälkki | b2a5f0b | 2019-08-04 19:54:32 +0300 | [diff] [blame] | 8 | #include <cpu/x86/smm.h> |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 9 | #include <cpu/amd/msr.h> |
Kyösti Mälkki | e31ec29 | 2019-08-10 17:27:01 +0300 | [diff] [blame] | 10 | #include <cpu/amd/amd64_save_state.h> |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 11 | #include <cpu/x86/lapic.h> |
| 12 | #include <device/device.h> |
| 13 | #include <device/pci_ops.h> |
| 14 | #include <soc/pci_devs.h> |
| 15 | #include <soc/cpu.h> |
Raul E Rangel | cd39a41 | 2020-05-07 15:16:15 -0600 | [diff] [blame] | 16 | #include <soc/reset.h> |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 17 | #include <soc/smi.h> |
| 18 | #include <soc/iomap.h> |
| 19 | #include <console/console.h> |
Zheng Bao | 6ba591b | 2020-06-09 09:47:06 +0800 | [diff] [blame] | 20 | #include <cpu/amd/microcode.h> |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 21 | |
| 22 | /* |
| 23 | * MP and SMM loading initialization. |
| 24 | */ |
Kyösti Mälkki | 8699724 | 2019-08-06 01:44:58 +0300 | [diff] [blame] | 25 | struct smm_relocation_params { |
| 26 | msr_t tseg_base; |
| 27 | msr_t tseg_mask; |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 28 | }; |
| 29 | |
Kyösti Mälkki | 8699724 | 2019-08-06 01:44:58 +0300 | [diff] [blame] | 30 | static struct smm_relocation_params smm_reloc_params; |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 31 | |
| 32 | /* |
| 33 | * Do essential initialization tasks before APs can be fired up - |
| 34 | * |
| 35 | * 1. Prevent race condition in MTRR solution. Enable MTRRs on the BSP. This |
| 36 | * creates the MTRR solution that the APs will use. Otherwise APs will try to |
| 37 | * apply the incomplete solution as the BSP is calculating it. |
| 38 | */ |
| 39 | static void pre_mp_init(void) |
| 40 | { |
Aaron Durbin | a2c045b | 2020-05-28 10:19:18 -0600 | [diff] [blame] | 41 | x86_setup_mtrrs_with_detect_no_above_4gb(); |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 42 | x86_mtrr_check(); |
| 43 | } |
| 44 | |
Kyösti Mälkki | 8699724 | 2019-08-06 01:44:58 +0300 | [diff] [blame] | 45 | static void fill_in_relocation_params(struct smm_relocation_params *params) |
| 46 | { |
| 47 | uintptr_t tseg_base; |
| 48 | size_t tseg_size; |
| 49 | |
| 50 | smm_region(&tseg_base, &tseg_size); |
| 51 | |
| 52 | params->tseg_base.lo = ALIGN_DOWN(tseg_base, 128 * KiB); |
| 53 | params->tseg_base.hi = 0; |
| 54 | params->tseg_mask.lo = ALIGN_DOWN(~(tseg_size - 1), 128 * KiB); |
| 55 | params->tseg_mask.hi = ((1 << (cpu_phys_address_size() - 32)) - 1); |
| 56 | |
| 57 | params->tseg_mask.lo |= SMM_TSEG_WB; |
| 58 | } |
| 59 | |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 60 | static void get_smm_info(uintptr_t *perm_smbase, size_t *perm_smsize, |
| 61 | size_t *smm_save_state_size) |
| 62 | { |
Kyösti Mälkki | 8699724 | 2019-08-06 01:44:58 +0300 | [diff] [blame] | 63 | printk(BIOS_DEBUG, "Setting up SMI for CPU\n"); |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 64 | |
Kyösti Mälkki | 8699724 | 2019-08-06 01:44:58 +0300 | [diff] [blame] | 65 | fill_in_relocation_params(&smm_reloc_params); |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 66 | |
Kyösti Mälkki | 8699724 | 2019-08-06 01:44:58 +0300 | [diff] [blame] | 67 | smm_subregion(SMM_SUBREGION_HANDLER, perm_smbase, perm_smsize); |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 68 | *smm_save_state_size = sizeof(amd64_smm_state_save_area_t); |
| 69 | } |
| 70 | |
| 71 | static void relocation_handler(int cpu, uintptr_t curr_smbase, |
| 72 | uintptr_t staggered_smbase) |
| 73 | { |
Kyösti Mälkki | 8699724 | 2019-08-06 01:44:58 +0300 | [diff] [blame] | 74 | struct smm_relocation_params *relo_params = &smm_reloc_params; |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 75 | amd64_smm_state_save_area_t *smm_state; |
| 76 | |
Kyösti Mälkki | 8699724 | 2019-08-06 01:44:58 +0300 | [diff] [blame] | 77 | wrmsr(SMM_ADDR_MSR, relo_params->tseg_base); |
| 78 | wrmsr(SMM_MASK_MSR, relo_params->tseg_mask); |
| 79 | |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 80 | smm_state = (void *)(SMM_AMD64_SAVE_STATE_OFFSET + curr_smbase); |
| 81 | smm_state->smbase = staggered_smbase; |
| 82 | } |
| 83 | |
Kyösti Mälkki | 2fec3949 | 2020-07-01 15:59:20 +0300 | [diff] [blame^] | 84 | static void post_mp_init(void) |
| 85 | { |
| 86 | global_smi_enable(); |
| 87 | apm_control(APM_CNT_SMMINFO); |
| 88 | } |
| 89 | |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 90 | static const struct mp_ops mp_ops = { |
| 91 | .pre_mp_init = pre_mp_init, |
| 92 | .get_cpu_count = get_cpu_count, |
| 93 | .get_smm_info = get_smm_info, |
| 94 | .relocation_handler = relocation_handler, |
Kyösti Mälkki | 2fec3949 | 2020-07-01 15:59:20 +0300 | [diff] [blame^] | 95 | .post_mp_init = post_mp_init, |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 96 | }; |
| 97 | |
Kyösti Mälkki | 79e12ab | 2020-05-31 09:21:07 +0300 | [diff] [blame] | 98 | void mp_init_cpus(struct bus *cpu_bus) |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 99 | { |
| 100 | /* Clear for take-off */ |
Kyösti Mälkki | 79e12ab | 2020-05-31 09:21:07 +0300 | [diff] [blame] | 101 | if (mp_init_with_smm(cpu_bus, &mp_ops) < 0) |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 102 | printk(BIOS_ERR, "MP initialization failure.\n"); |
| 103 | |
Raul E Rangel | 93375f2 | 2020-06-05 15:48:21 -0600 | [diff] [blame] | 104 | /* pre_mp_init made the flash not cacheable. Reset to WP for performance. */ |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 105 | mtrr_use_temp_range(FLASH_BASE_ADDR, CONFIG_ROM_SIZE, MTRR_TYPE_WRPROT); |
| 106 | |
| 107 | set_warm_reset_flag(); |
| 108 | } |
| 109 | |
Marshall Dawson | 34c3056 | 2019-07-16 15:18:00 -0600 | [diff] [blame] | 110 | static void model_17_init(struct device *dev) |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 111 | { |
| 112 | check_mca(); |
| 113 | setup_lapic(); |
Chris Wang | e2497d0 | 2020-08-03 22:36:13 +0800 | [diff] [blame] | 114 | set_cstate_io_addr(); |
Zheng Bao | 6ba591b | 2020-06-09 09:47:06 +0800 | [diff] [blame] | 115 | |
| 116 | amd_update_microcode_from_cbfs(); |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 117 | } |
| 118 | |
| 119 | static struct device_operations cpu_dev_ops = { |
Marshall Dawson | 34c3056 | 2019-07-16 15:18:00 -0600 | [diff] [blame] | 120 | .init = model_17_init, |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 121 | }; |
| 122 | |
| 123 | static struct cpu_device_id cpu_table[] = { |
Felix Held | 53c173e | 2020-11-05 17:24:18 +0100 | [diff] [blame] | 124 | { X86_VENDOR_AMD, RAVEN1_B0_CPUID}, |
Felix Held | ab114c9 | 2020-05-22 02:40:40 +0200 | [diff] [blame] | 125 | { X86_VENDOR_AMD, PICASSO_B0_CPUID }, |
| 126 | { X86_VENDOR_AMD, PICASSO_B1_CPUID }, |
| 127 | { X86_VENDOR_AMD, RAVEN2_A0_CPUID }, |
| 128 | { X86_VENDOR_AMD, RAVEN2_A1_CPUID }, |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 129 | { 0, 0 }, |
| 130 | }; |
| 131 | |
Marshall Dawson | 34c3056 | 2019-07-16 15:18:00 -0600 | [diff] [blame] | 132 | static const struct cpu_driver model_17 __cpu_driver = { |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 133 | .ops = &cpu_dev_ops, |
| 134 | .id_table = cpu_table, |
| 135 | }; |