huang lin | a97bd5a | 2014-10-14 10:04:16 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright 2014 Rockchip Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | */ |
| 19 | |
Julius Werner | 7a453eb | 2014-10-20 13:14:55 -0700 | [diff] [blame] | 20 | #include <arch/io.h> |
huang lin | a97bd5a | 2014-10-14 10:04:16 -0700 | [diff] [blame] | 21 | #include <assert.h> |
| 22 | #include <console/console.h> |
Julius Werner | 7a453eb | 2014-10-20 13:14:55 -0700 | [diff] [blame] | 23 | #include <delay.h> |
| 24 | #include <soc/clock.h> |
| 25 | #include <soc/grf.h> |
| 26 | #include <soc/pmu.h> |
| 27 | #include <soc/tsadc.h> |
huang lin | a97bd5a | 2014-10-14 10:04:16 -0700 | [diff] [blame] | 28 | #include <stdint.h> |
| 29 | #include <stdlib.h> |
huang lin | a97bd5a | 2014-10-14 10:04:16 -0700 | [diff] [blame] | 30 | |
| 31 | struct rk3288_tsadc_regs { |
| 32 | u32 user_con; |
| 33 | u32 auto_con; |
| 34 | u32 int_en; |
| 35 | u32 int_pd; |
| 36 | u32 reserved0[(0x20 - 0x10) / 4]; |
| 37 | u32 data0; |
| 38 | u32 data1; |
| 39 | u32 data2; |
| 40 | u32 data3; |
| 41 | u32 comp0_int; |
| 42 | u32 comp1_int; |
| 43 | u32 comp2_int; |
| 44 | u32 comp3_int; |
| 45 | u32 comp0_shut; |
| 46 | u32 comp1_shut; |
| 47 | u32 comp2_shut; |
| 48 | u32 comp3_shut; |
| 49 | u32 reserved1[(0x60 - 0x50) / 4]; |
| 50 | u32 hight_int_debounce; |
| 51 | u32 hight_tshut_debounce; |
| 52 | u32 auto_period; |
| 53 | u32 auto_period_ht; |
| 54 | }; |
| 55 | check_member(rk3288_tsadc_regs, auto_period_ht, 0x6c); |
| 56 | |
| 57 | /* auto_con */ |
| 58 | #define LAST_TSHUT (1 << 24) |
| 59 | #define TSHUT_POL_HIGH (1 << 8) |
| 60 | #define SRC3_EN (1 << 7) |
| 61 | #define SRC2_EN (1 << 6) |
| 62 | #define SRC1_EN (1 << 5) |
| 63 | #define SRC0_EN (1 << 4) |
| 64 | #define AUTO_EN (1 << 0) |
| 65 | |
| 66 | /* int_en */ |
| 67 | #define TSHUT_CRU_EN_SRC3 (1 << 11) |
| 68 | #define TSHUT_CRU_EN_SRC2 (1 << 10) |
| 69 | #define TSHUT_CRU_EN_SRC1 (1 << 9) |
| 70 | #define TSHUT_CRU_EN_SRC0 (1 << 8) |
| 71 | #define TSHUT_GPIO_EN_SRC3 (1 << 7) |
| 72 | #define TSHUT_GPIO_EN_SRC2 (1 << 6) |
| 73 | #define TSHUT_GPIO_EN_SRC1 (1 << 5) |
| 74 | #define TSHUT_GPIO_EN_SRC0 (1 << 4) |
| 75 | |
| 76 | #define AUTO_PERIOD 10 |
| 77 | #define AUTO_DEBOUNCE 4 |
| 78 | #define AUTO_PERIOD_HT 10 |
| 79 | #define AUTO_DEBOUNCE_HT 4 |
| 80 | #define TSADC_CLOCK_HZ (8 * KHz) |
| 81 | |
| 82 | /* AD value, correspond to 120 degrees Celsius */ |
| 83 | #define TSADC_SHUT_VALUE 3437 |
| 84 | |
| 85 | struct rk3288_tsadc_regs *rk3288_tsadc = (void *)TSADC_BASE; |
| 86 | |
| 87 | void tsadc_init(void) |
| 88 | { |
| 89 | rkclk_configure_tsadc(TSADC_CLOCK_HZ); |
| 90 | |
huang lin | 335d9f1 | 2014-11-07 10:56:35 +0800 | [diff] [blame] | 91 | setbits_le32(&rk3288_tsadc->auto_con, LAST_TSHUT); |
huang lin | a97bd5a | 2014-10-14 10:04:16 -0700 | [diff] [blame] | 92 | |
| 93 | setbits_le32(&rk3288_tsadc->int_en, |
| 94 | TSHUT_CRU_EN_SRC2 | TSHUT_CRU_EN_SRC1 | |
| 95 | TSHUT_GPIO_EN_SRC2 | TSHUT_GPIO_EN_SRC1); |
| 96 | |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame^] | 97 | write32(&rk3288_tsadc->auto_period, AUTO_PERIOD); |
| 98 | write32(&rk3288_tsadc->hight_int_debounce, AUTO_DEBOUNCE); |
| 99 | write32(&rk3288_tsadc->auto_period_ht, AUTO_PERIOD_HT); |
| 100 | write32(&rk3288_tsadc->hight_tshut_debounce, AUTO_DEBOUNCE_HT); |
huang lin | a97bd5a | 2014-10-14 10:04:16 -0700 | [diff] [blame] | 101 | |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame^] | 102 | write32(&rk3288_tsadc->comp1_shut, TSADC_SHUT_VALUE); |
| 103 | write32(&rk3288_tsadc->comp2_shut, TSADC_SHUT_VALUE); |
huang lin | a97bd5a | 2014-10-14 10:04:16 -0700 | [diff] [blame] | 104 | |
| 105 | /* polarity set to high,channel1 for cpu,channel2 for gpu */ |
| 106 | setbits_le32(&rk3288_tsadc->auto_con, TSHUT_POL_HIGH | SRC2_EN | |
| 107 | SRC1_EN | AUTO_EN); |
| 108 | |
| 109 | /* |
| 110 | tsadc iomux must be set after the tshut polarity setting, |
| 111 | since the tshut polarity defalut low active, |
| 112 | so if you enable tsadc iomux,it will output high |
| 113 | */ |
| 114 | setbits_le32(&rk3288_pmu->iomux_tsadc_int, IOMUX_TSADC_INT); |
| 115 | } |