Marshall Dawson | 3c57819 | 2020-01-19 17:16:01 -0700 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Marshall Dawson | 3c57819 | 2020-01-19 17:16:01 -0700 | [diff] [blame] | 2 | |
| 3 | #ifndef __AMD_PSP_DEF_H__ |
| 4 | #define __AMD_PSP_DEF_H__ |
| 5 | |
| 6 | #include <types.h> |
Marshall Dawson | d6b7236 | 2020-03-05 11:44:24 -0700 | [diff] [blame] | 7 | #include <commonlib/helpers.h> |
Marshall Dawson | e8ffa9f | 2020-03-16 19:20:20 -0600 | [diff] [blame] | 8 | #include <amdblocks/psp.h> |
Marshall Dawson | 3c57819 | 2020-01-19 17:16:01 -0700 | [diff] [blame] | 9 | |
Martin Roth | 1ddb40f | 2023-03-09 10:47:11 -0700 | [diff] [blame] | 10 | #define CORE_2_PSP_MSG_38_OFFSET 0x10998 /* 4 byte */ |
| 11 | #define CORE_2_PSP_MSG_38_FUSE_SPL BIT(12) |
| 12 | #define CORE_2_PSP_MSG_38_SPL_FUSE_ERROR BIT(13) |
| 13 | #define CORE_2_PSP_MSG_38_SPL_ENTRY_ERROR BIT(14) |
| 14 | #define CORE_2_PSP_MSG_38_SPL_ENTRY_MISSING BIT(15) |
| 15 | |
Marshall Dawson | 3c57819 | 2020-01-19 17:16:01 -0700 | [diff] [blame] | 16 | /* x86 to PSP commands */ |
Felix Held | 43126ed | 2020-04-01 22:06:39 +0200 | [diff] [blame] | 17 | #define MBOX_BIOS_CMD_SMM_INFO 0x02 |
| 18 | #define MBOX_BIOS_CMD_SX_INFO 0x03 |
| 19 | #define MBOX_BIOS_CMD_SX_INFO_SLEEP_TYPE_MAX 0x07 |
| 20 | #define MBOX_BIOS_CMD_RSM_INFO 0x04 |
| 21 | #define MBOX_BIOS_CMD_PSP_QUERY 0x05 |
| 22 | #define MBOX_BIOS_CMD_BOOT_DONE 0x06 |
| 23 | #define MBOX_BIOS_CMD_CLEAR_S3_STS 0x07 |
| 24 | #define MBOX_BIOS_CMD_S3_DATA_INFO 0x08 |
| 25 | #define MBOX_BIOS_CMD_NOP 0x09 |
Ritul Guru | 8da3804 | 2022-01-10 18:44:24 +0530 | [diff] [blame] | 26 | #define MBOX_BIOS_CMD_PSB_AUTO_FUSING 0x21 |
Jason Glenesk | fd539b4 | 2022-01-28 14:53:07 -0800 | [diff] [blame] | 27 | #define MBOX_BIOS_CMD_SET_SPL_FUSE 0x2d |
| 28 | #define MBOX_BIOS_CMD_QUERY_SPL_FUSE 0x47 |
Raul E Rangel | f8a187f | 2022-08-10 15:26:43 -0600 | [diff] [blame] | 29 | #define MBOX_BIOS_CMD_I2C_TPM_ARBITRATION 0x64 |
Felix Held | d8b36d2 | 2020-11-03 19:58:29 +0100 | [diff] [blame] | 30 | #define MBOX_BIOS_CMD_ABORT 0xfe |
Jason Glenesk | fd539b4 | 2022-01-28 14:53:07 -0800 | [diff] [blame] | 31 | |
Felix Held | fc373c7 | 2021-12-14 23:34:33 +0100 | [diff] [blame] | 32 | /* x86 to PSP commands, v1-only */ |
| 33 | #define MBOX_BIOS_CMD_DRAM_INFO 0x01 |
Felix Held | 43126ed | 2020-04-01 22:06:39 +0200 | [diff] [blame] | 34 | #define MBOX_BIOS_CMD_SMU_FW 0x19 |
| 35 | #define MBOX_BIOS_CMD_SMU_FW2 0x1a |
Marshall Dawson | 3c57819 | 2020-01-19 17:16:01 -0700 | [diff] [blame] | 36 | |
Ritul Guru | 8da3804 | 2022-01-10 18:44:24 +0530 | [diff] [blame] | 37 | #define SMN_PSP_PUBLIC_BASE 0x3800000 |
| 38 | |
Marshall Dawson | 3c57819 | 2020-01-19 17:16:01 -0700 | [diff] [blame] | 39 | /* command/response format, BIOS builds this in memory |
| 40 | * mbox_buffer_header: generic header |
| 41 | * mbox_buffer: command-specific buffer format |
| 42 | * |
| 43 | * AMD reference code aligns and pads all buffers to 32 bytes. |
| 44 | */ |
| 45 | struct mbox_buffer_header { |
| 46 | u32 size; /* total size of buffer */ |
| 47 | u32 status; /* command status, filled by PSP if applicable */ |
| 48 | } __packed; |
| 49 | |
| 50 | /* |
| 51 | * command-specific buffer definitions: see NDA document #54267 |
| 52 | * The following commands need a buffer definition if they are to be used. |
| 53 | * All other commands will work with the default buffer. |
| 54 | * MBOX_BIOS_CMD_SMM_INFO MBOX_BIOS_CMD_PSP_QUERY |
| 55 | * MBOX_BIOS_CMD_SX_INFO MBOX_BIOS_CMD_S3_DATA_INFO |
| 56 | * MBOX_BIOS_CMD_RSM_INFO |
| 57 | */ |
| 58 | |
| 59 | struct mbox_default_buffer { /* command-response buffer unused by command */ |
| 60 | struct mbox_buffer_header header; |
Elyes Haouas | 2dc5c6e | 2023-09-07 19:40:56 +0200 | [diff] [blame^] | 61 | } __packed __aligned(32); |
Marshall Dawson | 3c57819 | 2020-01-19 17:16:01 -0700 | [diff] [blame] | 62 | |
Marshall Dawson | e8ffa9f | 2020-03-16 19:20:20 -0600 | [diff] [blame] | 63 | struct smm_req_buffer { |
| 64 | uint64_t smm_base; /* TSEG base */ |
| 65 | uint64_t smm_mask; /* TSEG mask */ |
| 66 | uint64_t psp_smm_data_region; /* PSP region in SMM space */ |
| 67 | uint64_t psp_smm_data_length; /* PSP region length in SMM space */ |
| 68 | struct smm_trigger_info smm_trig_info; |
| 69 | #if CONFIG(SOC_AMD_COMMON_BLOCK_PSP_GEN2) |
| 70 | struct smm_register_info smm_reg_info; |
| 71 | #endif |
| 72 | uint64_t psp_mbox_smm_buffer_address; |
| 73 | uint64_t psp_mbox_smm_flag_address; |
| 74 | } __packed; |
| 75 | |
| 76 | struct mbox_cmd_smm_info_buffer { |
| 77 | struct mbox_buffer_header header; |
| 78 | struct smm_req_buffer req; |
Elyes Haouas | 2dc5c6e | 2023-09-07 19:40:56 +0200 | [diff] [blame^] | 79 | } __packed __aligned(32); |
Marshall Dawson | e8ffa9f | 2020-03-16 19:20:20 -0600 | [diff] [blame] | 80 | |
Marshall Dawson | 3c57819 | 2020-01-19 17:16:01 -0700 | [diff] [blame] | 81 | struct mbox_cmd_sx_info_buffer { |
| 82 | struct mbox_buffer_header header; |
| 83 | u8 sleep_type; |
Elyes Haouas | 2dc5c6e | 2023-09-07 19:40:56 +0200 | [diff] [blame^] | 84 | } __packed __aligned(32); |
Marshall Dawson | 3c57819 | 2020-01-19 17:16:01 -0700 | [diff] [blame] | 85 | |
Jason Glenesk | fd539b4 | 2022-01-28 14:53:07 -0800 | [diff] [blame] | 86 | struct mbox_cmd_late_spl_buffer { |
| 87 | struct mbox_buffer_header header; |
| 88 | uint32_t spl_value; |
Elyes Haouas | 2dc5c6e | 2023-09-07 19:40:56 +0200 | [diff] [blame^] | 89 | } __packed __aligned(32); |
Jason Glenesk | fd539b4 | 2022-01-28 14:53:07 -0800 | [diff] [blame] | 90 | |
Raul E Rangel | f8a187f | 2022-08-10 15:26:43 -0600 | [diff] [blame] | 91 | struct dtpm_config { |
| 92 | uint32_t gpio; |
| 93 | } __packed; |
| 94 | |
| 95 | enum dtpm_request_type { |
| 96 | DTPM_REQUEST_ACQUIRE, /* Acquire I2C bus */ |
| 97 | DTPM_REQUEST_RELEASE, /* Release I2C bus */ |
| 98 | DTPM_REQUEST_CONFIG, /* Provide DTPM info */ |
| 99 | DTPM_REQUEST_MAX, |
| 100 | }; |
| 101 | |
| 102 | struct mbox_cmd_dtpm_config_buffer { |
| 103 | struct mbox_buffer_header header; |
| 104 | uint32_t request_type; |
| 105 | struct dtpm_config config; |
| 106 | } __packed __aligned(32); |
| 107 | |
Marshall Dawson | 3c57819 | 2020-01-19 17:16:01 -0700 | [diff] [blame] | 108 | #define PSP_INIT_TIMEOUT 10000 /* 10 seconds */ |
| 109 | #define PSP_CMD_TIMEOUT 1000 /* 1 second */ |
| 110 | |
Felix Held | 7d30418 | 2020-04-15 17:05:38 +0200 | [diff] [blame] | 111 | void psp_print_cmd_status(int cmd_status, struct mbox_buffer_header *header); |
Felix Held | 1ad7392 | 2020-04-14 02:07:19 +0200 | [diff] [blame] | 112 | |
Marshall Dawson | d6b7236 | 2020-03-05 11:44:24 -0700 | [diff] [blame] | 113 | /* This command needs to be implemented by the generation specific code. */ |
| 114 | int send_psp_command(u32 command, void *buffer); |
| 115 | |
Felix Held | 00ec1b9 | 2022-05-05 15:19:03 +0200 | [diff] [blame] | 116 | uint32_t soc_read_c2p38(void); |
Jason Glenesk | fd539b4 | 2022-01-28 14:53:07 -0800 | [diff] [blame] | 117 | |
Marshall Dawson | 3c57819 | 2020-01-19 17:16:01 -0700 | [diff] [blame] | 118 | #endif /* __AMD_PSP_DEF_H__ */ |