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review.coreboot.org / coreboot / 2bb4acfeccc803a89d908579bc731be5fddbe5e1 / . / src / mainboard / kontron / 986lcd-m / mptable.c
blob: fce78359523ed915d00dc79f0e358eb945cf281f [file] [log] [blame]
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]1/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2007-2008 coresystems GmbH
5 *
Uwe Hermann2bb4acf2010-03-01 17:19:55 +0000[diff] [blame^]6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
Uwe Hermann2bb4acf2010-03-01 17:19:55 +0000[diff] [blame^]17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]18 */
19
20
21#include <device/device.h>
22#include <device/pci.h>
23#include <console/console.h>
24#include <arch/smp/mpspec.h>
25#include <string.h>
26#include <stdint.h>
27
Stefan Reinauerde3206a2010-02-22 06:09:43 +0000[diff] [blame]28static void *smp_write_config_table(void *v)
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]29{
30 static const char sig[4] = "PCMP";
31 static const char oem[8] = "COREBOOT";
32 static const char productid[12] = "986LCD-M ";
33 struct mp_config_table *mc;
Stefan Reinauer762a2302010-01-19 21:15:37 +0000[diff] [blame]34 struct device *riser = NULL, *firewire = NULL;
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]35 int i;
Stefan Reinauer762a2302010-01-19 21:15:37 +0000[diff] [blame]36 int max_pci_bus, firewire_bus = 0, riser_bus = 0, isa_bus;
Stefan Reinauerde3206a2010-02-22 06:09:43 +0000[diff] [blame]37 int ioapic_id;
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]38
39 mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
40 memset(mc, 0, sizeof(*mc));
41
42 memcpy(mc->mpc_signature, sig, sizeof(sig));
43 mc->mpc_length = sizeof(*mc); /* initially just the header */
44 mc->mpc_spec = 0x04;
45 mc->mpc_checksum = 0; /* not yet computed */
46 memcpy(mc->mpc_oem, oem, sizeof(oem));
47 memcpy(mc->mpc_productid, productid, sizeof(productid));
48 mc->mpc_oemptr = 0;
49 mc->mpc_oemsize = 0;
50 mc->mpc_entry_count = 0; /* No entries yet... */
51 mc->mpc_lapic = LAPIC_ADDR;
52 mc->mpe_length = 0;
53 mc->mpe_checksum = 0;
54 mc->reserved = 0;
55
56 smp_write_processors(mc);
Stefan Reinauer762a2302010-01-19 21:15:37 +0000[diff] [blame]57 max_pci_bus=0;
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]58
Stefan Reinauer762a2302010-01-19 21:15:37 +0000[diff] [blame]59 firewire = dev_find_device(0x104c, 0x8023, 0);
60 if (firewire) {
61 firewire_bus = firewire->bus->secondary;
62 printk_spew("Firewire device is on bus %x\n",
63 firewire_bus);
64 max_pci_bus = firewire_bus;
65 }
66
67 // If a riser card is used, this riser is detected on bus 4, so its secondary bus is the
68 // highest bus number on the pci bus.
69 riser = dev_find_device(0x3388, 0x0021, 0);
70 if (!riser)
71 riser = dev_find_device(0x3388, 0x0022, 0);
72 if (riser) {
73 riser_bus = riser->link[0].secondary;
74 printk_spew("Riser bus is %x\n", riser_bus);
75 max_pci_bus = riser_bus;
76 }
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]77
78 /* ISA bus follows */
79 isa_bus = max_pci_bus + 1;
80
81 /* Bus: Bus ID Type */
82 for (i=0; i <= max_pci_bus; i++)
83 smp_write_bus(mc, i, "PCI ");
84
85 smp_write_bus(mc, isa_bus, "ISA ");
86
87 /* I/O APICs: APIC ID Version State Address */
Stefan Reinauerde3206a2010-02-22 06:09:43 +0000[diff] [blame]88 ioapic_id = 2;
89 smp_write_ioapic(mc, ioapic_id, 0x20, 0xfec00000);
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]90
91 /* Legacy Interrupts */
92
93 /* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
Stefan Reinauerde3206a2010-02-22 06:09:43 +0000[diff] [blame]94 smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, ioapic_id, 0x0);
95 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x1, ioapic_id, 0x1);
96 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, ioapic_id, 0x2);
97 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x3, ioapic_id, 0x3);
98 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x4, ioapic_id, 0x4);
99 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, isa_bus, 0x8, ioapic_id, 0x8);
100 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x9, ioapic_id, 0x9);
101 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0xa, ioapic_id, 0xa);
102 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0xb, ioapic_id, 0xb);
103 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0xc, ioapic_id, 0xc);
104 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0xd, ioapic_id, 0xd);
105 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0xe, ioapic_id, 0xe);
106 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0xf, ioapic_id, 0xf);
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]107
108 /* Builtin devices on Bus 0 */
Stefan Reinauerde3206a2010-02-22 06:09:43 +0000[diff] [blame]109 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x4, ioapic_id, 0x10);
110 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x8, ioapic_id, 0x10);
111 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x7d, ioapic_id, 0x13);
112 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x74, ioapic_id, 0x17);
113 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x75, ioapic_id, 0x13);
114 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x76, ioapic_id, 0x12);
115 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x77, ioapic_id, 0x10);
116 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x6c, ioapic_id, 0x10);
117 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x70, ioapic_id, 0x10);
118 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x71, ioapic_id, 0x11);
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]119
Stefan Reinauerde3206a2010-02-22 06:09:43 +0000[diff] [blame]120 /* Internal PCI bus (Firewire, PCI slot) */
Stefan Reinauer762a2302010-01-19 21:15:37 +0000[diff] [blame]121 if (firewire) {
Stefan Reinauerde3206a2010-02-22 06:09:43 +0000[diff] [blame]122 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, firewire_bus, 0x0, ioapic_id, 0x10);
123 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, firewire_bus, 0x4, ioapic_id, 0x14);
Stefan Reinauer762a2302010-01-19 21:15:37 +0000[diff] [blame]124 }
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]125
Stefan Reinauer762a2302010-01-19 21:15:37 +0000[diff] [blame]126 if (riser) {
127 /* Old riser card */
128 // riser slot top 5:8.0
Stefan Reinauerde3206a2010-02-22 06:09:43 +0000[diff] [blame]129 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, riser_bus, 0x20, ioapic_id, 0x14);
Stefan Reinauer762a2302010-01-19 21:15:37 +0000[diff] [blame]130 // riser slot middle 5:9.0
Stefan Reinauerde3206a2010-02-22 06:09:43 +0000[diff] [blame]131 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, riser_bus, 0x24, ioapic_id, 0x15);
Stefan Reinauer762a2302010-01-19 21:15:37 +0000[diff] [blame]132 // riser slot bottom 5:a.0
Stefan Reinauerde3206a2010-02-22 06:09:43 +0000[diff] [blame]133 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, riser_bus, 0x28, ioapic_id, 0x16);
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]134
Stefan Reinauer762a2302010-01-19 21:15:37 +0000[diff] [blame]135 /* New Riser Card */
Stefan Reinauerde3206a2010-02-22 06:09:43 +0000[diff] [blame]136 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, riser_bus, 0x30, ioapic_id, 0x14);
137 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, riser_bus, 0x34, ioapic_id, 0x15);
138 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, riser_bus, 0x38, ioapic_id, 0x16);
Stefan Reinauer762a2302010-01-19 21:15:37 +0000[diff] [blame]139 }
Stefan Reinauere1025d02009-03-11 15:20:36 +0000[diff] [blame]140
Stefan Reinauerde3206a2010-02-22 06:09:43 +0000[diff] [blame]141 /* PCIe slot */
142 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, 0x0, ioapic_id, 0x10);
143 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, 0x1, ioapic_id, 0x11);
144
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]145 /* Onboard Ethernet */
Stefan Reinauerde3206a2010-02-22 06:09:43 +0000[diff] [blame]146 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x2, 0x0, ioapic_id, 0x10);
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]147
148 /* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
149 smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x0);
150 smp_write_intsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x1);
151
152 /* Compute the checksums */
153 mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
154 mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
155
156 printk_debug("Wrote the mp table end at: %p - %p\n", mc, smp_next_mpe_entry(mc));
157
158 return smp_next_mpe_entry(mc);
159}
160
Stefan Reinauerde3206a2010-02-22 06:09:43 +0000[diff] [blame]161/* MP table generation in coreboot is not very well designed;
162 * One of the issues is that it knows nothing about Virtual
163 * Wire mode, which everyone uses since a decade or so. This
164 * function fixes up our floating table. This spares us doing
165 * a half-baked fix of adding a new parameter to 200+ calls
166 * to smp_write_floating_table()
167 */
168static void fixup_virtual_wire(void *v)
169{
170 struct intel_mp_floating *mf = v;
171
172 mf->mpf_checksum = 0;
173 mf->mpf_feature2 = MP_FEATURE_VIRTUALWIRE;
174 mf->mpf_checksum = smp_compute_checksum(mf, mf->mpf_length*16);
175}
176
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]177unsigned long write_smp_table(unsigned long addr)
178{
179 void *v;
180 v = smp_write_floating_table(addr);
Stefan Reinauerde3206a2010-02-22 06:09:43 +0000[diff] [blame]181 fixup_virtual_wire(v);
Stefan Reinauer36a22682008-10-29 04:52:57 +0000[diff] [blame]182 return (unsigned long)smp_write_config_table(v);
183}