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Vadim Bendebury9c9c3362014-07-23 09:40:02 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2014 Google Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Vadim Bendebury9c9c3362014-07-23 09:40:02 -070014 */
15
Julius Wernereaa9c452014-09-24 15:40:49 -070016#ifndef __SRC_INCLUDE_GPIO_H__
17#define __SRC_INCLUDE_GPIO_H__
Vadim Bendebury9c9c3362014-07-23 09:40:02 -070018
Julius Wernereaa9c452014-09-24 15:40:49 -070019#include <soc/gpio.h>
20#include <types.h>
21
22/* <soc/gpio.h> must typedef a gpio_t that fits in 32 bits. */
23_Static_assert(sizeof(gpio_t) <= sizeof(u32), "gpio_t doesn't fit in lb_gpio");
24
25/* The following functions must be implemented by SoC/board code. */
26int gpio_get(gpio_t gpio);
27void gpio_set(gpio_t gpio, int value);
28void gpio_input_pulldown(gpio_t gpio);
29void gpio_input_pullup(gpio_t gpio);
30void gpio_input(gpio_t gpio);
31void gpio_output(gpio_t gpio, int value);
Julius Werner2b239482016-03-16 17:11:55 -070032int _gpio_base3_value(gpio_t gpio[], int num_gpio, int binary_first);
Vadim Bendebury9c9c3362014-07-23 09:40:02 -070033
34/*
35 * Read the value presented by the set of GPIOs, when each pin is interpreted
David Hendricks21db62e2014-11-06 15:05:35 -080036 * as a base-2 digit (LOW = 0, HIGH = 1).
37 *
38 * gpio[]: pin positions to read. gpio[0] is less significant than gpio[1].
39 * num_gpio: number of pins to read.
40 */
41int gpio_base2_value(gpio_t gpio[], int num_gpio);
42
43/*
44 * Read the value presented by the set of GPIOs, when each pin is interpreted
Julius Werner886d29b2014-09-24 15:40:49 -070045 * as a base-3 digit (LOW = 0, HIGH = 1, Z/floating = 2).
David Hendricks3fc63682014-11-06 15:09:27 -080046 * Example: X1 = Z, X2 = 1 -> gpio_base3_value({GPIO(X1), GPIO(X2)}) = 5
Julius Werner886d29b2014-09-24 15:40:49 -070047 * BASE3() from <base3.h> can generate numbers to compare the result to.
Vadim Bendebury9c9c3362014-07-23 09:40:02 -070048 *
Julius Werner886d29b2014-09-24 15:40:49 -070049 * gpio[]: pin positions to read. gpio[0] is less significant than gpio[1].
Daisuke Nojiri573e2112014-08-08 15:38:52 -070050 * num_gpio: number of pins to read.
Vadim Bendebury9c9c3362014-07-23 09:40:02 -070051 */
Julius Werner2b239482016-03-16 17:11:55 -070052static inline int gpio_base3_value(gpio_t gpio[], int num_gpio)
53{
54 return _gpio_base3_value(gpio, num_gpio, 0);
55}
56
57/*
58 * Read the value presented by the set of GPIOs, when each pin is interpreted
59 * as a base-3 digit (LOW = 0, HIGH = 1, Z/floating = 2) in a non-standard
60 * ternary number system where the first 2^n natural numbers are represented
61 * as they would be in a binary system (without any Z digits), and the following
62 * 3^n-2^n numbers use the remaining ternary representations in the normal
63 * ternary system order (skipping the values that were already used up).
64 * This is useful for boards which initially used a binary board ID and later
65 * decided to switch to tri-state after some revisions have already been built.
66 * Example: For num_gpio = 2 we get the following representation:
67 *
68 * Number X1 X0
69 * 0 0 0
70 * 1 0 1
71 * 2 1 0
72 * 3 1 1 // Start counting ternaries back at 0 after this
73 * 4 0 2 // Skipping 00 and 01 which are already used up
74 * 5 1 2 // Skipping 10 and 11 which are already used up
75 * 6 2 0
76 * 7 2 1
77 * 8 2 2
78 *
79 * gpio[]: pin positions to read. gpio[0] is less significant than gpio[1].
80 * num_gpio: number of pins to read.
81 */
82static inline int gpio_binary_first_base3_value(gpio_t gpio[], int num_gpio)
83{
84 return _gpio_base3_value(gpio, num_gpio, 1);
85}
Vadim Bendebury9c9c3362014-07-23 09:40:02 -070086
Julius Wernereaa9c452014-09-24 15:40:49 -070087#endif /* __SRC_INCLUDE_GPIO_H__ */