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Yidi Lin24ea3f32021-01-07 20:25:54 +08001/* SPDX-License-Identifier: GPL-2.0-only */
2
Rex-BC Chen61be50d2021-08-10 12:39:32 +08003#include <bootmem.h>
Yidi Lin24ea3f32021-01-07 20:25:54 +08004#include <device/device.h>
Jianjun Wangb4a71222021-07-14 15:41:20 +08005#include <device/pci.h>
Flora Fu5cd18712021-06-25 23:27:56 +08006#include <soc/apusys.h>
Nina Wuc25aa5b2021-06-21 09:13:19 +08007#include <soc/devapc.h>
Rex-BC Chen61be50d2021-08-10 12:39:32 +08008#include <soc/dfd.h>
Yidi Lin24ea3f32021-01-07 20:25:54 +08009#include <soc/emi.h>
Rex-BC Chen8316db22021-08-13 16:34:26 +080010#include <soc/hdmi.h>
alex.miao4a2887f2021-05-17 21:58:55 +080011#include <soc/mcupm.h>
Yidi Lin27be9042021-03-25 17:50:14 +080012#include <soc/mmu_operations.h>
Jianjun Wangb4a71222021-07-14 15:41:20 +080013#include <soc/pcie.h>
Rex-BC Chenab2cbf72021-05-03 20:44:09 +080014#include <soc/sspm.h>
Yidi Linbe8621d2021-04-19 16:06:55 +080015#include <soc/ufs.h>
Yidi Lin24ea3f32021-01-07 20:25:54 +080016#include <symbols.h>
17
Rex-BC Chen61be50d2021-08-10 12:39:32 +080018void bootmem_platform_add_ranges(void)
19{
20 if (CONFIG(MTK_DFD))
21 bootmem_add_range(DFD_DUMP_ADDRESS, DFD_DUMP_SIZE, BM_MEM_RESERVED);
22}
23
Yidi Lin24ea3f32021-01-07 20:25:54 +080024static void soc_read_resources(struct device *dev)
25{
Kyösti Mälkki27d62992022-05-24 20:25:58 +030026 ram_resource_kb(dev, 0, (uintptr_t)_dram / KiB, sdram_size() / KiB);
Yidi Lin24ea3f32021-01-07 20:25:54 +080027}
28
29static void soc_init(struct device *dev)
30{
Yidi Lin27be9042021-03-25 17:50:14 +080031 mtk_mmu_disable_l2c_sram();
Nina Wuc25aa5b2021-06-21 09:13:19 +080032 dapc_init();
Flora Fu5cd18712021-06-25 23:27:56 +080033 apusys_init();
alex.miao4a2887f2021-05-17 21:58:55 +080034 mcupm_init();
Rex-BC Chenab2cbf72021-05-03 20:44:09 +080035 sspm_init();
Rex-BC Chen61be50d2021-08-10 12:39:32 +080036
37 if (CONFIG(MTK_DFD))
38 dfd_init();
39
Yidi Linbe8621d2021-04-19 16:06:55 +080040 ufs_disable_refclk();
Rex-BC Chen8316db22021-08-13 16:34:26 +080041 hdmi_low_power_setting();
Yidi Lin24ea3f32021-01-07 20:25:54 +080042}
43
44static struct device_operations soc_ops = {
45 .read_resources = soc_read_resources,
Yu-Ping Wu39e6f852022-03-14 16:53:59 +080046 .set_resources = noop_set_resources,
Yidi Lin24ea3f32021-01-07 20:25:54 +080047 .init = soc_init,
48};
49
Jianjun Wangb4a71222021-07-14 15:41:20 +080050static struct device_operations pci_domain_ops = {
51 .read_resources = &mtk_pcie_domain_read_resources,
52 .set_resources = &mtk_pcie_domain_set_resources,
53 .scan_bus = &pci_domain_scan_bus,
54 .enable = &mtk_pcie_domain_enable,
55};
56
Yidi Lin24ea3f32021-01-07 20:25:54 +080057static void enable_soc_dev(struct device *dev)
58{
Jianjun Wangb4a71222021-07-14 15:41:20 +080059 if (dev->path.type == DEVICE_PATH_CPU_CLUSTER)
60 dev->ops = &soc_ops;
61 else if (dev->path.type == DEVICE_PATH_DOMAIN)
62 dev->ops = &pci_domain_ops;
Yidi Lin24ea3f32021-01-07 20:25:54 +080063}
64
65struct chip_operations soc_mediatek_mt8195_ops = {
66 CHIP_NAME("SOC Mediatek MT8195")
67 .enable_dev = enable_soc_dev,
68};