Angel Pons | bbc99cf | 2020-04-04 18:51:23 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
jinkun.hong | ac490b8 | 2014-06-22 20:40:39 -0700 | [diff] [blame] | 2 | |
Julius Werner | dae15a6 | 2014-10-15 18:50:45 -0700 | [diff] [blame] | 3 | #include <arch/cache.h> |
jinkun.hong | ac490b8 | 2014-06-22 20:40:39 -0700 | [diff] [blame] | 4 | #include <bootblock_common.h> |
Julius Werner | 7a453eb | 2014-10-20 13:14:55 -0700 | [diff] [blame] | 5 | #include <soc/addressmap.h> |
| 6 | #include <soc/clock.h> |
| 7 | #include <soc/grf.h> |
| 8 | #include <soc/timer.h> |
Julius Werner | dae15a6 | 2014-10-15 18:50:45 -0700 | [diff] [blame] | 9 | #include <symbols.h> |
jinkun.hong | ac490b8 | 2014-06-22 20:40:39 -0700 | [diff] [blame] | 10 | |
Patrick Georgi | 20864c1 | 2015-07-01 20:29:42 +0200 | [diff] [blame] | 11 | void bootblock_soc_init(void) |
jinkun.hong | ac490b8 | 2014-06-22 20:40:39 -0700 | [diff] [blame] | 12 | { |
David Hendricks | 3b63161 | 2014-09-29 13:37:51 -0700 | [diff] [blame] | 13 | rkclk_init(); |
Julius Werner | dae15a6 | 2014-10-15 18:50:45 -0700 | [diff] [blame] | 14 | |
| 15 | mmu_init(); |
| 16 | /* Start with a clean slate. */ |
| 17 | mmu_config_range(0, 4096, DCACHE_OFF); |
| 18 | /* SRAM is tightly wedged between registers, need to use subtables. Map |
| 19 | * write-through as equivalent for non-cacheable without XN on A17. */ |
| 20 | mmu_config_range_kb((uintptr_t)_sram/KiB, |
Julius Werner | 7e0dea6 | 2019-02-20 18:39:22 -0800 | [diff] [blame] | 21 | REGION_SIZE(sram)/KiB, DCACHE_WRITETHROUGH); |
Julius Werner | dae15a6 | 2014-10-15 18:50:45 -0700 | [diff] [blame] | 22 | dcache_mmu_enable(); |
Julius Werner | 33df495 | 2014-12-16 22:48:26 -0800 | [diff] [blame] | 23 | |
| 24 | rkclk_configure_crypto(148500*KHz); |
jinkun.hong | ac490b8 | 2014-06-22 20:40:39 -0700 | [diff] [blame] | 25 | } |