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Yinghai Lubc7ceb12007-02-03 15:28:20 +00001/*
Stefan Reinauer7e61e452008-01-18 10:35:56 +00002 * This file is part of the coreboot project.
Yinghai Lubc7ceb12007-02-03 15:28:20 +00003 *
4 * Copyright (C) 2000 AG Electronics Ltd.
5 * Copyright (C) 2003-2004 Linux Networx
Zheng Bao9db833b2009-12-28 09:59:44 +00006 * Copyright (C) 2004 Tyan
Yinghai Lubc7ceb12007-02-03 15:28:20 +00007 * Copyright (C) 2007 AMD
8 * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
Yinghai Lubc7ceb12007-02-03 15:28:20 +000018 */
19
Yinghai Lubc7ceb12007-02-03 15:28:20 +000020#include <device/device.h>
21#include <device/pnp.h>
Nico Huber1c811282013-06-15 20:33:44 +020022#include <superio/conf_mode.h>
Felix Held08abfa32019-10-07 19:41:57 +020023#include <superio/hwm5_conf.h>
Yinghai Lubc7ceb12007-02-03 15:28:20 +000024#include <console/console.h>
Yinghai Lubc7ceb12007-02-03 15:28:20 +000025#include <pc80/keyboard.h>
26#include <pc80/mc146818rtc.h>
Elyes HAOUAS2329a252019-05-15 22:11:18 +020027
Yinghai Lubc7ceb12007-02-03 15:28:20 +000028#include "w83627ehg.h"
29
Edward O'Callaghanf21bdc32014-10-21 07:43:41 +110030static void enable_hwm_smbus(struct device *dev)
Zheng Bao9db833b2009-12-28 09:59:44 +000031{
Uwe Hermann340fa932010-11-10 14:53:36 +000032 u8 reg8;
33
Elyes HAOUAS2b2325e2019-01-31 20:53:10 +010034 /* Configure pins 89/90 as SDA/SCL (I2C bus). */
Uwe Hermann340fa932010-11-10 14:53:36 +000035 reg8 = pnp_read_config(dev, 0x2a);
36 reg8 |= (1 << 1);
37 pnp_write_config(dev, 0x2a, reg8);
Yinghai Lubc7ceb12007-02-03 15:28:20 +000038}
39
Edward O'Callaghanf21bdc32014-10-21 07:43:41 +110040static void init_acpi(struct device *dev)
Yinghai Lubc7ceb12007-02-03 15:28:20 +000041{
Elyes HAOUAS09ec9e72016-10-17 21:51:12 +020042 u8 value;
Luc Verhaegena9c5ea02009-06-03 14:19:33 +000043 int power_on = 1;
Yinghai Lubc7ceb12007-02-03 15:28:20 +000044
Luc Verhaegena9c5ea02009-06-03 14:19:33 +000045 get_option(&power_on, "power_on_after_fail");
Nico Huber13dc9762013-06-15 19:33:15 +020046 pnp_enter_conf_mode(dev);
Uwe Hermann340fa932010-11-10 14:53:36 +000047 pnp_set_logical_device(dev);
Yinghai Lubc7ceb12007-02-03 15:28:20 +000048 value = pnp_read_config(dev, 0xe4);
49 value &= ~(3 << 5);
Uwe Hermann340fa932010-11-10 14:53:36 +000050 if (power_on)
Yinghai Lubc7ceb12007-02-03 15:28:20 +000051 value |= (1 << 5);
Yinghai Lubc7ceb12007-02-03 15:28:20 +000052 pnp_write_config(dev, 0xe4, value);
Nico Huber13dc9762013-06-15 19:33:15 +020053 pnp_exit_conf_mode(dev);
Yinghai Lubc7ceb12007-02-03 15:28:20 +000054}
55
Uwe Hermann340fa932010-11-10 14:53:36 +000056static void init_hwm(u16 base)
Yinghai Lubc7ceb12007-02-03 15:28:20 +000057{
58 int i;
Uwe Hermann340fa932010-11-10 14:53:36 +000059 u8 reg, value;
Yinghai Lubc7ceb12007-02-03 15:28:20 +000060
61 /* reg mask data */
Uwe Hermann340fa932010-11-10 14:53:36 +000062 u8 hwm_reg_values[] = {
Yinghai Lubc7ceb12007-02-03 15:28:20 +000063 0x40, 0xff, 0x81, /* Start HWM. */
Uwe Hermann340fa932010-11-10 14:53:36 +000064 0x48, 0x7f, 0x2a, /* Set SMBus base to 0x2a (0x54 >> 1). */
Yinghai Lubc7ceb12007-02-03 15:28:20 +000065 };
66
Uwe Hermann340fa932010-11-10 14:53:36 +000067 for (i = 0; i < ARRAY_SIZE(hwm_reg_values); i += 3) {
Yinghai Lubc7ceb12007-02-03 15:28:20 +000068 reg = hwm_reg_values[i];
Felix Held08abfa32019-10-07 19:41:57 +020069 value = pnp_read_hwm5_index(base, reg);
Yinghai Lubc7ceb12007-02-03 15:28:20 +000070 value &= 0xff & (~(hwm_reg_values[i + 1]));
71 value |= 0xff & hwm_reg_values[i + 2];
Uwe Hermann340fa932010-11-10 14:53:36 +000072 printk(BIOS_DEBUG, "base = 0x%04x, reg = 0x%02x, "
73 "value = 0x%02x\n", base, reg, value);
Felix Held08abfa32019-10-07 19:41:57 +020074 pnp_write_hwm5_index(base, reg, value);
Yinghai Lubc7ceb12007-02-03 15:28:20 +000075 }
76}
77
Edward O'Callaghanf21bdc32014-10-21 07:43:41 +110078static void w83627ehg_init(struct device *dev)
Yinghai Lubc7ceb12007-02-03 15:28:20 +000079{
Uwe Hermann5330dd92010-11-11 13:14:55 +000080 struct resource *res0;
Uwe Hermann340fa932010-11-10 14:53:36 +000081
82 if (!dev->enabled)
Yinghai Lubc7ceb12007-02-03 15:28:20 +000083 return;
Uwe Hermann340fa932010-11-10 14:53:36 +000084
Elyes HAOUAS0ce41f12018-11-13 10:03:31 +010085 switch (dev->path.pnp.device) {
Yinghai Lubc7ceb12007-02-03 15:28:20 +000086 case W83627EHG_KBC:
Timothy Pearson448e3862015-11-24 14:12:01 -060087 pc_keyboard_init(NO_AUX_DEVICE);
Yinghai Lubc7ceb12007-02-03 15:28:20 +000088 break;
89 case W83627EHG_HWM:
90 res0 = find_resource(dev, PNP_IDX_IO0);
Felix Held08abfa32019-10-07 19:41:57 +020091 init_hwm(res0->base);
Yinghai Lubc7ceb12007-02-03 15:28:20 +000092 break;
93 case W83627EHG_ACPI:
94 init_acpi(dev);
95 break;
96 }
97}
98
Edward O'Callaghanf21bdc32014-10-21 07:43:41 +110099static void w83627ehg_pnp_enable_resources(struct device *dev)
Yinghai Lubc7ceb12007-02-03 15:28:20 +0000100{
Yinghai Lubc7ceb12007-02-03 15:28:20 +0000101 pnp_enable_resources(dev);
102
Nico Huber13dc9762013-06-15 19:33:15 +0200103 pnp_enter_conf_mode(dev);
Stefan Reinauer2b34db82009-02-28 20:10:20 +0000104 switch (dev->path.pnp.device) {
Yinghai Lubc7ceb12007-02-03 15:28:20 +0000105 case W83627EHG_HWM:
Uwe Hermann340fa932010-11-10 14:53:36 +0000106 printk(BIOS_DEBUG, "W83627EHG HWM SMBus enabled\n");
Yinghai Lubc7ceb12007-02-03 15:28:20 +0000107 enable_hwm_smbus(dev);
108 break;
109 }
Nico Huber13dc9762013-06-15 19:33:15 +0200110 pnp_exit_conf_mode(dev);
Yinghai Lubc7ceb12007-02-03 15:28:20 +0000111}
112
Yinghai Lubc7ceb12007-02-03 15:28:20 +0000113static struct device_operations ops = {
114 .read_resources = pnp_read_resources,
Nico Huber0b2ee932013-06-15 19:58:35 +0200115 .set_resources = pnp_set_resources,
Yinghai Lubc7ceb12007-02-03 15:28:20 +0000116 .enable_resources = w83627ehg_pnp_enable_resources,
Nico Huber0b2ee932013-06-15 19:58:35 +0200117 .enable = pnp_alt_enable,
Yinghai Lubc7ceb12007-02-03 15:28:20 +0000118 .init = w83627ehg_init,
Nico Huber1c811282013-06-15 20:33:44 +0200119 .ops_pnp_mode = &pnp_conf_mode_8787_aa,
Yinghai Lubc7ceb12007-02-03 15:28:20 +0000120};
121
122static struct pnp_info pnp_dev_info[] = {
Felix Held8c858802018-07-06 20:22:08 +0200123 { NULL, W83627EHG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
124 { NULL, W83627EHG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
125 { NULL, W83627EHG_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
126 { NULL, W83627EHG_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
127 { NULL, W83627EHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,
128 0x07ff, 0x07ff, },
129 { NULL, W83627EHG_SFI, PNP_IO0 | PNP_IRQ0, 0x07f8, },
130 { NULL, W83627EHG_WDTO_PLED, },
131 { NULL, W83627EHG_ACPI, PNP_IRQ0, },
132 { NULL, W83627EHG_HWM, PNP_IO0 | PNP_IRQ0, 0x07fe, },
Uwe Hermann3a4ed152010-12-05 22:36:14 +0000133
Felix Held8c858802018-07-06 20:22:08 +0200134 { NULL, W83627EHG_GAME, PNP_IO0, 0x07ff, },
135 { NULL, W83627EHG_MIDI, PNP_IO1 | PNP_IRQ0, 0, 0x07fe, },
136 { NULL, W83627EHG_GPIO1, },
137 { NULL, W83627EHG_GPIO2, },
138 { NULL, W83627EHG_GPIO3, },
139 { NULL, W83627EHG_GPIO4, },
140 { NULL, W83627EHG_GPIO5, },
141 { NULL, W83627EHG_GPIO6, },
Yinghai Lubc7ceb12007-02-03 15:28:20 +0000142};
143
144static void enable_dev(struct device *dev)
145{
Uwe Hermann340fa932010-11-10 14:53:36 +0000146 pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
Yinghai Lubc7ceb12007-02-03 15:28:20 +0000147}
148
149struct chip_operations superio_winbond_w83627ehg_ops = {
150 CHIP_NAME("Winbond W83627EHG Super I/O")
151 .enable_dev = enable_dev,
152};