Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2010 Advanced Micro Devices, Inc. |
| 5 | * Copyright (C) 2014 Sage Electronic Engineering, LLC |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | #ifndef HUDSON_H |
| 18 | #define HUDSON_H |
| 19 | |
| 20 | #include <device/pci_ids.h> |
| 21 | #include <device/device.h> |
| 22 | #include "chip.h" |
| 23 | |
| 24 | /* Power management index/data registers */ |
| 25 | #define BIOSRAM_INDEX 0xcd4 |
| 26 | #define BIOSRAM_DATA 0xcd5 |
| 27 | #define PM_INDEX 0xcd6 |
| 28 | #define PM_DATA 0xcd7 |
| 29 | #define PM2_INDEX 0xcd0 |
| 30 | #define PM2_DATA 0xcd1 |
| 31 | |
| 32 | #define HUDSON_ACPI_IO_BASE 0x800 |
| 33 | |
| 34 | #define ACPI_PM_EVT_BLK (HUDSON_ACPI_IO_BASE + 0x00) /* 4 bytes */ |
| 35 | #define ACPI_PM1_CNT_BLK (HUDSON_ACPI_IO_BASE + 0x04) /* 2 bytes */ |
| 36 | #define ACPI_PM_TMR_BLK (HUDSON_ACPI_IO_BASE + 0x18) /* 4 bytes */ |
| 37 | #define ACPI_GPE0_BLK (HUDSON_ACPI_IO_BASE + 0x10) /* 8 bytes */ |
| 38 | #define ACPI_CPU_CONTROL (HUDSON_ACPI_IO_BASE + 0x08) /* 6 bytes */ |
| 39 | |
| 40 | #define ACPI_SMI_CTL_PORT 0xb2 |
| 41 | #define ACPI_SMI_CMD_CST_CONTROL 0xde |
| 42 | #define ACPI_SMI_CMD_PST_CONTROL 0xad |
| 43 | #define ACPI_SMI_CMD_DISABLE 0xbe |
| 44 | #define ACPI_SMI_CMD_ENABLE 0xef |
| 45 | #define ACPI_SMI_CMD_S4_REQ 0xc0 |
| 46 | |
| 47 | #define REV_HUDSON_A11 0x11 |
| 48 | #define REV_HUDSON_A12 0x12 |
| 49 | |
| 50 | #define SPIROM_BASE_ADDRESS_REGISTER 0xA0 |
| 51 | #define SPI_ROM_ENABLE 0x02 |
| 52 | #define SPI_BASE_ADDRESS 0xFEC10000 |
| 53 | |
Dave Frodin | f364fc7 | 2015-03-13 08:22:17 -0600 | [diff] [blame] | 54 | #define LPC_IO_PORT_DECODE_ENABLE 0x44 |
| 55 | #define DECODE_ENABLE_PARALLEL_PORT0 (1 << 0) |
| 56 | #define DECODE_ENABLE_PARALLEL_PORT1 (1 << 1) |
| 57 | #define DECODE_ENABLE_PARALLEL_PORT2 (1 << 2) |
| 58 | #define DECODE_ENABLE_PARALLEL_PORT3 (1 << 3) |
| 59 | #define DECODE_ENABLE_PARALLEL_PORT4 (1 << 4) |
| 60 | #define DECODE_ENABLE_PARALLEL_PORT5 (1 << 5) |
| 61 | #define DECODE_ENABLE_SERIAL_PORT0 (1 << 6) |
| 62 | #define DECODE_ENABLE_SERIAL_PORT1 (1 << 7) |
| 63 | #define DECODE_ENABLE_SERIAL_PORT2 (1 << 8) |
| 64 | #define DECODE_ENABLE_SERIAL_PORT3 (1 << 9) |
| 65 | #define DECODE_ENABLE_SERIAL_PORT4 (1 << 10) |
| 66 | #define DECODE_ENABLE_SERIAL_PORT5 (1 << 11) |
| 67 | #define DECODE_ENABLE_SERIAL_PORT6 (1 << 12) |
| 68 | #define DECODE_ENABLE_SERIAL_PORT7 (1 << 13) |
| 69 | #define DECODE_ENABLE_AUDIO_PORT0 (1 << 14) |
| 70 | #define DECODE_ENABLE_AUDIO_PORT1 (1 << 15) |
| 71 | #define DECODE_ENABLE_AUDIO_PORT2 (1 << 16) |
| 72 | #define DECODE_ENABLE_AUDIO_PORT3 (1 << 17) |
| 73 | #define DECODE_ENABLE_MIDI_PORT0 (1 << 18) |
| 74 | #define DECODE_ENABLE_MIDI_PORT1 (1 << 19) |
| 75 | #define DECODE_ENABLE_MIDI_PORT2 (1 << 20) |
| 76 | #define DECODE_ENABLE_MIDI_PORT3 (1 << 21) |
| 77 | #define DECODE_ENABLE_MSS_PORT0 (1 << 22) |
| 78 | #define DECODE_ENABLE_MSS_PORT1 (1 << 23) |
| 79 | #define DECODE_ENABLE_MSS_PORT2 (1 << 24) |
| 80 | #define DECODE_ENABLE_MSS_PORT3 (1 << 25) |
| 81 | #define DECODE_ENABLE_FDC_PORT0 (1 << 26) |
| 82 | #define DECODE_ENABLE_FDC_PORT1 (1 << 27) |
| 83 | #define DECODE_ENABLE_GAME_PORT (1 << 28) |
| 84 | #define DECODE_ENABLE_KBC_PORT (1 << 29) |
| 85 | #define DECODE_ENABLE_ACPIUC_PORT (1 << 30) |
| 86 | #define DECODE_ENABLE_ADLIB_PORT (1 << 31) |
| 87 | |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 88 | static inline int hudson_sata_enable(void) |
| 89 | { |
| 90 | /* True if IDE or AHCI. */ |
| 91 | return (CONFIG_HUDSON_SATA_MODE == 0) || (CONFIG_HUDSON_SATA_MODE == 2); |
| 92 | } |
| 93 | |
| 94 | static inline int hudson_ide_enable(void) |
| 95 | { |
| 96 | /* True if IDE or LEGACY IDE. */ |
| 97 | return (CONFIG_HUDSON_SATA_MODE == 0) || (CONFIG_HUDSON_SATA_MODE == 3); |
| 98 | } |
| 99 | |
| 100 | #ifndef __SMM__ |
| 101 | |
| 102 | void pm_write8(u8 reg, u8 value); |
| 103 | u8 pm_read8(u8 reg); |
| 104 | void pm_write16(u8 reg, u16 value); |
| 105 | u16 pm_read16(u16 reg); |
| 106 | |
| 107 | #ifdef __PRE_RAM__ |
| 108 | void hudson_lpc_port80(void); |
Dave Frodin | f364fc7 | 2015-03-13 08:22:17 -0600 | [diff] [blame] | 109 | void hudson_lpc_decode(void); |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 110 | void hudson_pci_port80(void); |
| 111 | void hudson_clk_output_48Mhz(void); |
| 112 | |
| 113 | int s3_save_nvram_early(u32 dword, int size, int nvram_pos); |
| 114 | int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos); |
Zheng Bao | 2286138 | 2015-11-21 12:19:22 +0800 | [diff] [blame^] | 115 | #if IS_ENABLED(CONFIG_HUDSON_UART) |
| 116 | void configure_hudson_uart(void); |
| 117 | #endif |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 118 | |
| 119 | #else |
| 120 | void hudson_enable(device_t dev); |
| 121 | void s3_resume_init_data(void *FchParams); |
| 122 | |
| 123 | #endif /* __PRE_RAM__ */ |
| 124 | #endif /* __SMM__ */ |
| 125 | |
| 126 | #endif /* HUDSON_H */ |