Vadim Bendebury | e31d243 | 2016-04-09 18:33:49 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2016 The Chromium OS Authors. All rights reserved. |
| 3 | * Use of this source code is governed by a BSD-style license that can be |
| 4 | * found in the LICENSE file. |
| 5 | */ |
| 6 | |
| 7 | #ifndef __COREBOOT_SRC_DRIVERS_SPI_TPM_TPM_H |
| 8 | #define __COREBOOT_SRC_DRIVERS_SPI_TPM_TPM_H |
| 9 | |
| 10 | #include <stddef.h> |
| 11 | #include <spi-generic.h> |
| 12 | |
| 13 | /* |
| 14 | * A tpm device descriptor, values read from the appropriate device regisrers |
| 15 | * are cached here. |
| 16 | */ |
| 17 | struct tpm2_info { |
| 18 | uint16_t vendor_id; |
| 19 | uint16_t device_id; |
| 20 | uint16_t revision; |
| 21 | }; |
| 22 | |
| 23 | /* |
| 24 | * Initialize a TPM2 device: read its id, claim locality of zero, verify that |
| 25 | * this indeed is a TPM2 device. Use the passed in handle to access the right |
| 26 | * SPI port. |
| 27 | * |
| 28 | * Return 0 on success, non-zero on failure. |
| 29 | */ |
| 30 | int tpm2_init(struct spi_slave *spi_if); |
| 31 | |
| 32 | |
| 33 | /* |
| 34 | * Each command processing consists of sending the command to the TPM, by |
| 35 | * writing it into the FIFO register, then polling the status register until |
| 36 | * the TPM is ready to respond, then reading the response from the FIFO |
| 37 | * regitster. The size of the response can be gleaned from the 6 byte header. |
| 38 | * |
| 39 | * This function places the response into the tpm2_response buffer and returns |
| 40 | * the size of the response. |
| 41 | */ |
| 42 | size_t tpm2_process_command(const void *tpm2_command, size_t command_size, |
| 43 | void *tpm2_response, size_t max_response); |
| 44 | |
| 45 | /* Get information about previously initialized TPM device. */ |
| 46 | void tpm2_get_info(struct tpm2_info *info); |
| 47 | |
| 48 | #endif /* ! __COREBOOT_SRC_DRIVERS_SPI_TPM_TPM_H */ |