Patrick Georgi | ac95903 | 2020-05-05 22:49:26 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Patrick Rudolph | fa47042 | 2017-06-20 17:49:53 +0200 | [diff] [blame] | 2 | |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 3 | #include <acpi/acpi.h> |
Matt DeVillier | ebe08e0 | 2017-07-14 13:28:42 -0500 | [diff] [blame] | 4 | #include <types.h> |
| 5 | #include <string.h> |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 6 | #include <cbfs.h> |
Patrick Rudolph | fa47042 | 2017-06-20 17:49:53 +0200 | [diff] [blame] | 7 | #include <device/device.h> |
| 8 | #include <device/pci.h> |
| 9 | #include <device/pci_ids.h> |
| 10 | #include <device/pci_ops.h> |
Patrick Rudolph | bac2303 | 2017-06-30 15:18:23 +0200 | [diff] [blame] | 11 | #include <console/console.h> |
| 12 | #include <cbmem.h> |
Matt DeVillier | ebe08e0 | 2017-07-14 13:28:42 -0500 | [diff] [blame] | 13 | #include "intel_bios.h" |
Patrick Rudolph | fa47042 | 2017-06-20 17:49:53 +0200 | [diff] [blame] | 14 | #include "opregion.h" |
| 15 | |
Patrick Georgi | 4a3956d | 2018-05-03 19:15:13 +0200 | [diff] [blame] | 16 | __weak |
| 17 | const char *mainboard_vbt_filename(void) |
| 18 | { |
| 19 | return "vbt.bin"; |
| 20 | } |
| 21 | |
Srinidhi N Kaushik | 6719c82 | 2020-11-02 16:47:29 -0800 | [diff] [blame] | 22 | static char vbt_data[CONFIG_VBT_DATA_SIZE_KB * KiB]; |
Aaron Durbin | 44f8065 | 2018-05-11 11:43:52 -0600 | [diff] [blame] | 23 | static size_t vbt_data_sz; |
Patrick Georgi | 4a3956d | 2018-05-03 19:15:13 +0200 | [diff] [blame] | 24 | |
| 25 | void *locate_vbt(size_t *vbt_size) |
| 26 | { |
| 27 | uint32_t vbtsig = 0; |
| 28 | |
Aaron Durbin | 44f8065 | 2018-05-11 11:43:52 -0600 | [diff] [blame] | 29 | if (vbt_data_sz != 0) { |
| 30 | if (vbt_size) |
| 31 | *vbt_size = vbt_data_sz; |
Patrick Georgi | 4a3956d | 2018-05-03 19:15:13 +0200 | [diff] [blame] | 32 | return (void *)vbt_data; |
Aaron Durbin | 44f8065 | 2018-05-11 11:43:52 -0600 | [diff] [blame] | 33 | } |
Patrick Georgi | 4a3956d | 2018-05-03 19:15:13 +0200 | [diff] [blame] | 34 | |
| 35 | const char *filename = mainboard_vbt_filename(); |
| 36 | |
Julius Werner | 834b3ec | 2020-03-04 16:52:08 -0800 | [diff] [blame] | 37 | size_t file_size = cbfs_load(filename, vbt_data, sizeof(vbt_data)); |
Patrick Georgi | 4a3956d | 2018-05-03 19:15:13 +0200 | [diff] [blame] | 38 | |
| 39 | if (file_size == 0) |
| 40 | return NULL; |
| 41 | |
| 42 | if (vbt_size) |
| 43 | *vbt_size = file_size; |
| 44 | |
| 45 | memcpy(&vbtsig, vbt_data, sizeof(vbtsig)); |
| 46 | if (vbtsig != VBT_SIGNATURE) { |
| 47 | printk(BIOS_ERR, "Missing/invalid signature in VBT data file!\n"); |
| 48 | return NULL; |
| 49 | } |
| 50 | |
| 51 | printk(BIOS_INFO, "Found a VBT of %zu bytes after decompression\n", |
| 52 | file_size); |
Aaron Durbin | 44f8065 | 2018-05-11 11:43:52 -0600 | [diff] [blame] | 53 | vbt_data_sz = file_size; |
Patrick Georgi | 4a3956d | 2018-05-03 19:15:13 +0200 | [diff] [blame] | 54 | |
| 55 | return (void *)vbt_data; |
| 56 | } |
| 57 | |
Patrick Rudolph | fa47042 | 2017-06-20 17:49:53 +0200 | [diff] [blame] | 58 | /* Write ASLS PCI register and prepare SWSCI register. */ |
Nico Huber | f2a0be2 | 2020-04-26 17:01:25 +0200 | [diff] [blame] | 59 | static void intel_gma_opregion_register(uintptr_t opregion) |
Patrick Rudolph | fa47042 | 2017-06-20 17:49:53 +0200 | [diff] [blame] | 60 | { |
Elyes HAOUAS | 263076c | 2018-05-02 21:54:59 +0200 | [diff] [blame] | 61 | struct device *igd; |
Patrick Rudolph | fa47042 | 2017-06-20 17:49:53 +0200 | [diff] [blame] | 62 | u16 reg16; |
Matt DeVillier | 681ef51 | 2018-02-11 01:17:01 -0600 | [diff] [blame] | 63 | u16 sci_reg; |
Patrick Rudolph | fa47042 | 2017-06-20 17:49:53 +0200 | [diff] [blame] | 64 | |
Kyösti Mälkki | c70eed1 | 2018-05-22 02:18:00 +0300 | [diff] [blame] | 65 | igd = pcidev_on_root(0x2, 0); |
Patrick Rudolph | fa47042 | 2017-06-20 17:49:53 +0200 | [diff] [blame] | 66 | if (!igd || !igd->enabled) |
| 67 | return; |
| 68 | |
| 69 | /* |
| 70 | * Intel BIOS Specification |
| 71 | * Chapter 5.3.7 "Initialize Hardware State" |
| 72 | */ |
| 73 | pci_write_config32(igd, ASLS, opregion); |
| 74 | |
| 75 | /* |
Matt DeVillier | 681ef51 | 2018-02-11 01:17:01 -0600 | [diff] [blame] | 76 | * Atom-based platforms use a combined SMI/SCI register, |
| 77 | * whereas non-Atom platforms use a separate SCI register. |
| 78 | */ |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 79 | if (CONFIG(INTEL_GMA_SWSMISCI)) |
Matt DeVillier | 681ef51 | 2018-02-11 01:17:01 -0600 | [diff] [blame] | 80 | sci_reg = SWSMISCI; |
| 81 | else |
| 82 | sci_reg = SWSCI; |
| 83 | |
| 84 | /* |
Patrick Rudolph | fa47042 | 2017-06-20 17:49:53 +0200 | [diff] [blame] | 85 | * Intel's Windows driver relies on this: |
| 86 | * Intel BIOS Specification |
| 87 | * Chapter 5.4 "ASL Software SCI Handler" |
| 88 | */ |
Matt DeVillier | 681ef51 | 2018-02-11 01:17:01 -0600 | [diff] [blame] | 89 | reg16 = pci_read_config16(igd, sci_reg); |
Patrick Rudolph | fa47042 | 2017-06-20 17:49:53 +0200 | [diff] [blame] | 90 | reg16 &= ~GSSCIE; |
| 91 | reg16 |= SMISCISEL; |
Matt DeVillier | 681ef51 | 2018-02-11 01:17:01 -0600 | [diff] [blame] | 92 | pci_write_config16(igd, sci_reg, reg16); |
Patrick Rudolph | fa47042 | 2017-06-20 17:49:53 +0200 | [diff] [blame] | 93 | } |
Patrick Rudolph | bac2303 | 2017-06-30 15:18:23 +0200 | [diff] [blame] | 94 | |
| 95 | /* Restore ASLS register on S3 resume and prepare SWSCI. */ |
Nico Huber | f2a0be2 | 2020-04-26 17:01:25 +0200 | [diff] [blame] | 96 | static enum cb_err intel_gma_restore_opregion(void) |
Patrick Rudolph | bac2303 | 2017-06-30 15:18:23 +0200 | [diff] [blame] | 97 | { |
Nico Huber | f2a0be2 | 2020-04-26 17:01:25 +0200 | [diff] [blame] | 98 | const igd_opregion_t *const opregion = cbmem_find(CBMEM_ID_IGD_OPREGION); |
| 99 | if (!opregion) { |
| 100 | printk(BIOS_ERR, "GMA: Failed to find IGD OpRegion.\n"); |
| 101 | return CB_ERR; |
Patrick Rudolph | bac2303 | 2017-06-30 15:18:23 +0200 | [diff] [blame] | 102 | } |
Nico Huber | f2a0be2 | 2020-04-26 17:01:25 +0200 | [diff] [blame] | 103 | /* Write ASLS PCI register and prepare SWSCI register. */ |
| 104 | intel_gma_opregion_register((uintptr_t)opregion); |
| 105 | return CB_SUCCESS; |
Patrick Rudolph | bac2303 | 2017-06-30 15:18:23 +0200 | [diff] [blame] | 106 | } |
Matt DeVillier | ebe08e0 | 2017-07-14 13:28:42 -0500 | [diff] [blame] | 107 | |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 108 | static enum cb_err vbt_validate(struct region_device *rdev) |
Matt DeVillier | ebe08e0 | 2017-07-14 13:28:42 -0500 | [diff] [blame] | 109 | { |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 110 | uint32_t sig; |
Matt DeVillier | ebe08e0 | 2017-07-14 13:28:42 -0500 | [diff] [blame] | 111 | |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 112 | if (rdev_readat(rdev, &sig, 0, sizeof(sig)) != sizeof(sig)) |
Matt DeVillier | ebe08e0 | 2017-07-14 13:28:42 -0500 | [diff] [blame] | 113 | return CB_ERR; |
Matt DeVillier | ebe08e0 | 2017-07-14 13:28:42 -0500 | [diff] [blame] | 114 | |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 115 | if (sig != VBT_SIGNATURE) |
Matt DeVillier | ebe08e0 | 2017-07-14 13:28:42 -0500 | [diff] [blame] | 116 | return CB_ERR; |
Matt DeVillier | ebe08e0 | 2017-07-14 13:28:42 -0500 | [diff] [blame] | 117 | |
| 118 | return CB_SUCCESS; |
| 119 | } |
| 120 | |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 121 | static enum cb_err locate_vbt_vbios(const u8 *vbios, struct region_device *rdev) |
Matt DeVillier | ebe08e0 | 2017-07-14 13:28:42 -0500 | [diff] [blame] | 122 | { |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 123 | const optionrom_header_t *oprom; |
| 124 | const optionrom_pcir_t *pcir; |
| 125 | struct region_device rd; |
Matt DeVillier | ebe08e0 | 2017-07-14 13:28:42 -0500 | [diff] [blame] | 126 | enum cb_err ret; |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 127 | u8 opromsize; |
| 128 | size_t offset; |
Matt DeVillier | ebe08e0 | 2017-07-14 13:28:42 -0500 | [diff] [blame] | 129 | |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 130 | // FIXME: caller should supply a region_device instead of vbios pointer |
Julius Werner | c893197 | 2021-04-16 16:48:32 -0700 | [diff] [blame] | 131 | if (rdev_chain_mem(&rd, vbios, sizeof(*oprom))) |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 132 | return CB_ERR; |
Matt DeVillier | ebe08e0 | 2017-07-14 13:28:42 -0500 | [diff] [blame] | 133 | |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 134 | if (rdev_readat(&rd, &opromsize, offsetof(optionrom_header_t, size), |
| 135 | sizeof(opromsize)) != sizeof(opromsize) || !opromsize) |
| 136 | return CB_ERR; |
| 137 | |
Julius Werner | c893197 | 2021-04-16 16:48:32 -0700 | [diff] [blame] | 138 | if (rdev_chain_mem(&rd, vbios, opromsize * 512)) |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 139 | return CB_ERR; |
| 140 | |
| 141 | oprom = rdev_mmap(&rd, 0, sizeof(*oprom)); |
| 142 | if (!oprom) |
| 143 | return CB_ERR; |
| 144 | |
| 145 | if (!oprom->pcir_offset || !oprom->vbt_offset) { |
| 146 | rdev_munmap(&rd, (void *)oprom); |
| 147 | return CB_ERR; |
| 148 | } |
| 149 | |
| 150 | pcir = rdev_mmap(&rd, oprom->pcir_offset, sizeof(*pcir)); |
| 151 | if (pcir == NULL) { |
| 152 | rdev_munmap(&rd, (void *)oprom); |
| 153 | return CB_ERR; |
| 154 | } |
| 155 | |
Elyes HAOUAS | 75d19d7 | 2021-01-16 17:30:26 +0100 | [diff] [blame] | 156 | printk(BIOS_DEBUG, "GMA: %s: %x %x %x %x %x\n", __func__, |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 157 | oprom->signature, pcir->vendor, pcir->classcode[0], |
| 158 | pcir->classcode[1], pcir->classcode[2]); |
| 159 | |
| 160 | /* Make sure we got an Intel VGA option rom */ |
| 161 | if ((oprom->signature != OPROM_SIGNATURE) || |
| 162 | (pcir->vendor != PCI_VENDOR_ID_INTEL) || |
| 163 | (pcir->signature != 0x52494350) || |
| 164 | (pcir->classcode[0] != 0x00) || |
| 165 | (pcir->classcode[1] != 0x00) || |
| 166 | (pcir->classcode[2] != 0x03)) { |
| 167 | rdev_munmap(&rd, (void *)oprom); |
| 168 | rdev_munmap(&rd, (void *)pcir); |
| 169 | return CB_ERR; |
| 170 | } |
| 171 | |
| 172 | rdev_munmap(&rd, (void *)pcir); |
| 173 | |
| 174 | /* Search for $VBT as some VBIOS are broken... */ |
| 175 | offset = oprom->vbt_offset; |
| 176 | do { |
| 177 | ret = rdev_chain(rdev, &rd, offset, |
| 178 | (opromsize * 512) - offset); |
| 179 | offset++; |
| 180 | } while (ret == CB_SUCCESS && vbt_validate(rdev) != CB_SUCCESS); |
| 181 | |
| 182 | offset--; |
| 183 | |
| 184 | if (ret == CB_SUCCESS && offset != oprom->vbt_offset) |
| 185 | printk(BIOS_WARNING, "GMA: Buggy VBIOS found\n"); |
| 186 | else if (ret != CB_SUCCESS) |
| 187 | printk(BIOS_ERR, "GMA: Broken VBIOS found\n"); |
| 188 | |
| 189 | rdev_munmap(&rd, (void *)oprom); |
| 190 | return ret; |
| 191 | } |
| 192 | |
| 193 | static enum cb_err locate_vbt_cbfs(struct region_device *rdev) |
| 194 | { |
Patrick Georgi | 4a3956d | 2018-05-03 19:15:13 +0200 | [diff] [blame] | 195 | size_t vbt_data_size; |
| 196 | void *vbt = locate_vbt(&vbt_data_size); |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 197 | |
Patrick Georgi | 4a3956d | 2018-05-03 19:15:13 +0200 | [diff] [blame] | 198 | if (vbt == NULL) |
| 199 | return CB_ERR; |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 200 | |
Julius Werner | c893197 | 2021-04-16 16:48:32 -0700 | [diff] [blame] | 201 | if (rdev_chain_mem(rdev, vbt, vbt_data_size)) |
Patrick Georgi | 4a3956d | 2018-05-03 19:15:13 +0200 | [diff] [blame] | 202 | return CB_ERR; |
| 203 | |
| 204 | printk(BIOS_INFO, "GMA: Found VBT in CBFS\n"); |
| 205 | |
| 206 | return CB_SUCCESS; |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 207 | } |
| 208 | |
| 209 | static enum cb_err locate_vbt_vbios_cbfs(struct region_device *rdev) |
| 210 | { |
| 211 | const u8 *oprom = |
Kyösti Mälkki | c70eed1 | 2018-05-22 02:18:00 +0300 | [diff] [blame] | 212 | (const u8 *)pci_rom_probe(pcidev_on_root(0x2, 0)); |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 213 | if (oprom == NULL) |
| 214 | return CB_ERR; |
| 215 | |
| 216 | printk(BIOS_INFO, "GMA: Found VBIOS in CBFS\n"); |
| 217 | |
| 218 | return locate_vbt_vbios(oprom, rdev); |
| 219 | } |
| 220 | |
MAULIK V VAGHELA | 926949d | 2021-06-08 20:20:57 +0530 | [diff] [blame] | 221 | /* |
| 222 | * Try to locate VBT in possible locations and return if found. |
| 223 | * VBT can be possibly in one of 3 regions: |
| 224 | * 1. Stitched directly into CBFS region as VBT |
| 225 | * 2. Part of pci8086 option ROM within CBFS |
| 226 | * 3. part of VBIOS at location 0xC0000. |
| 227 | */ |
| 228 | static enum cb_err find_vbt_location(struct region_device *rdev) |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 229 | { |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 230 | /* Search for vbt.bin in CBFS. */ |
MAULIK V VAGHELA | 926949d | 2021-06-08 20:20:57 +0530 | [diff] [blame] | 231 | if (locate_vbt_cbfs(rdev) == CB_SUCCESS && |
| 232 | vbt_validate(rdev) == CB_SUCCESS) { |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 233 | printk(BIOS_INFO, "GMA: Found valid VBT in CBFS\n"); |
MAULIK V VAGHELA | 926949d | 2021-06-08 20:20:57 +0530 | [diff] [blame] | 234 | return CB_SUCCESS; |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 235 | } |
| 236 | /* Search for pci8086,XXXX.rom in CBFS. */ |
MAULIK V VAGHELA | 926949d | 2021-06-08 20:20:57 +0530 | [diff] [blame] | 237 | else if (locate_vbt_vbios_cbfs(rdev) == CB_SUCCESS && |
| 238 | vbt_validate(rdev) == CB_SUCCESS) { |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 239 | printk(BIOS_INFO, "GMA: Found valid VBT in VBIOS\n"); |
MAULIK V VAGHELA | 926949d | 2021-06-08 20:20:57 +0530 | [diff] [blame] | 240 | return CB_SUCCESS; |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 241 | } |
| 242 | /* |
| 243 | * Try to locate Intel VBIOS at 0xc0000. It might have been placed by |
| 244 | * Native Graphics Init as fake Option ROM or when coreboot did run the |
| 245 | * VBIOS on legacy platforms. |
| 246 | * TODO: Place generated fake VBT in CBMEM and get rid of this. |
| 247 | */ |
MAULIK V VAGHELA | 926949d | 2021-06-08 20:20:57 +0530 | [diff] [blame] | 248 | else if (locate_vbt_vbios((u8 *)0xc0000, rdev) == CB_SUCCESS && |
| 249 | vbt_validate(rdev) == CB_SUCCESS) { |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 250 | printk(BIOS_INFO, "GMA: Found valid VBT in legacy area\n"); |
MAULIK V VAGHELA | 926949d | 2021-06-08 20:20:57 +0530 | [diff] [blame] | 251 | return CB_SUCCESS; |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 252 | } |
| 253 | |
Angel Pons | 33dddc4 | 2021-06-16 11:56:25 +0200 | [diff] [blame] | 254 | printk(BIOS_ERR, "GMA: VBT couldn't be found\n"); |
MAULIK V VAGHELA | 926949d | 2021-06-08 20:20:57 +0530 | [diff] [blame] | 255 | return CB_ERR; |
| 256 | } |
| 257 | |
Meera Ravindranath | 92637df | 2021-07-09 12:40:28 +0530 | [diff] [blame] | 258 | /* Function to get the IGD Opregion version */ |
| 259 | static struct opregion_version opregion_get_version(void) |
| 260 | { |
| 261 | return (struct opregion_version) { .major = 2, .minor = 0 }; |
| 262 | } |
| 263 | |
MAULIK V VAGHELA | 926949d | 2021-06-08 20:20:57 +0530 | [diff] [blame] | 264 | /* |
| 265 | * Function to determine if we need to use extended VBT region to pass |
| 266 | * VBT pointer. If VBT size > 6 KiB then we need to use extended VBT |
| 267 | * region. |
| 268 | */ |
| 269 | static inline bool is_ext_vbt_required(igd_opregion_t *opregion, optionrom_vbt_t *vbt) |
| 270 | { |
| 271 | return (vbt->hdr_vbt_size > sizeof(opregion->vbt.gvd1)); |
| 272 | } |
| 273 | |
Maulik V Vaghela | a6b60eb | 2021-06-09 11:36:20 +0530 | [diff] [blame] | 274 | /* |
| 275 | * Copy extended VBT at the end of opregion and fill rvda and rvds |
| 276 | * values correctly for the opregion. |
| 277 | */ |
| 278 | static void opregion_add_ext_vbt(igd_opregion_t *opregion, uint8_t *ext_vbt, |
| 279 | optionrom_vbt_t *vbt) |
| 280 | { |
| 281 | /* Copy VBT into extended VBT region (at offset 8 KiB) */ |
| 282 | memcpy(ext_vbt, vbt, vbt->hdr_vbt_size); |
| 283 | |
| 284 | /* Fill RVDA value with address of physical pointer */ |
| 285 | opregion->mailbox3.rvda = (uintptr_t)ext_vbt; |
| 286 | opregion->mailbox3.rvds = vbt->hdr_vbt_size; |
| 287 | } |
| 288 | |
MAULIK V VAGHELA | 926949d | 2021-06-08 20:20:57 +0530 | [diff] [blame] | 289 | /* Initialize IGD OpRegion, called from ACPI code and OS drivers */ |
| 290 | enum cb_err intel_gma_init_igd_opregion(void) |
| 291 | { |
| 292 | igd_opregion_t *opregion; |
| 293 | struct region_device rdev; |
| 294 | optionrom_vbt_t *vbt = NULL; |
Maulik V Vaghela | a6b60eb | 2021-06-09 11:36:20 +0530 | [diff] [blame] | 295 | size_t opregion_size = sizeof(igd_opregion_t); |
MAULIK V VAGHELA | 926949d | 2021-06-08 20:20:57 +0530 | [diff] [blame] | 296 | |
| 297 | if (acpi_is_wakeup_s3()) |
| 298 | return intel_gma_restore_opregion(); |
| 299 | |
| 300 | if (find_vbt_location(&rdev) != CB_SUCCESS) |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 301 | return CB_ERR; |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 302 | |
| 303 | vbt = rdev_mmap_full(&rdev); |
| 304 | if (!vbt) { |
| 305 | printk(BIOS_ERR, "GMA: Error mapping VBT\n"); |
| 306 | return CB_ERR; |
| 307 | } |
| 308 | |
| 309 | if (vbt->hdr_vbt_size > region_device_sz(&rdev)) { |
| 310 | printk(BIOS_ERR, "GMA: Error mapped only a partial VBT\n"); |
| 311 | rdev_munmap(&rdev, vbt); |
| 312 | return CB_ERR; |
| 313 | } |
| 314 | |
Maulik V Vaghela | a6b60eb | 2021-06-09 11:36:20 +0530 | [diff] [blame] | 315 | if (is_ext_vbt_required(opregion, vbt)) |
| 316 | opregion_size += vbt->hdr_vbt_size; |
| 317 | |
| 318 | opregion = cbmem_add(CBMEM_ID_IGD_OPREGION, opregion_size); |
Nico Huber | f2a0be2 | 2020-04-26 17:01:25 +0200 | [diff] [blame] | 319 | if (!opregion) { |
| 320 | printk(BIOS_ERR, "GMA: Failed to add IGD OpRegion to CBMEM.\n"); |
| 321 | return CB_ERR; |
| 322 | } |
| 323 | |
Maulik V Vaghela | a6b60eb | 2021-06-09 11:36:20 +0530 | [diff] [blame] | 324 | memset(opregion, 0, opregion_size); |
Matt DeVillier | ebe08e0 | 2017-07-14 13:28:42 -0500 | [diff] [blame] | 325 | |
| 326 | memcpy(&opregion->header.signature, IGD_OPREGION_SIGNATURE, |
| 327 | sizeof(opregion->header.signature)); |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 328 | memcpy(opregion->header.vbios_version, vbt->coreblock_biosbuild, |
| 329 | ARRAY_SIZE(vbt->coreblock_biosbuild)); |
| 330 | /* Extended VBT support */ |
MAULIK V VAGHELA | 926949d | 2021-06-08 20:20:57 +0530 | [diff] [blame] | 331 | if (is_ext_vbt_required(opregion, vbt)) { |
Maulik V Vaghela | a6b60eb | 2021-06-09 11:36:20 +0530 | [diff] [blame] | 332 | /* Place extended VBT just after opregion */ |
| 333 | uint8_t *ext_vbt = (uint8_t *)opregion + sizeof(*opregion); |
| 334 | opregion_add_ext_vbt(opregion, ext_vbt, vbt); |
Matt DeVillier | 53e4195 | 2017-06-27 13:07:43 -0500 | [diff] [blame] | 335 | } else { |
| 336 | /* Raw VBT size which can fit in gvd1 */ |
| 337 | memcpy(opregion->vbt.gvd1, vbt, vbt->hdr_vbt_size); |
| 338 | } |
| 339 | |
| 340 | rdev_munmap(&rdev, vbt); |
Matt DeVillier | ebe08e0 | 2017-07-14 13:28:42 -0500 | [diff] [blame] | 341 | |
Meera Ravindranath | 92637df | 2021-07-09 12:40:28 +0530 | [diff] [blame] | 342 | /* Get the opregion version information */ |
| 343 | opregion->header.opver = opregion_get_version(); |
| 344 | |
Matt DeVillier | ebe08e0 | 2017-07-14 13:28:42 -0500 | [diff] [blame] | 345 | /* 8kb */ |
| 346 | opregion->header.size = sizeof(igd_opregion_t) / 1024; |
Matt DeVillier | fd0a891 | 2017-10-19 22:44:18 -0500 | [diff] [blame] | 347 | |
Matt DeVillier | ebe08e0 | 2017-07-14 13:28:42 -0500 | [diff] [blame] | 348 | // FIXME We just assume we're mobile for now |
| 349 | opregion->header.mailboxes = MAILBOXES_MOBILE; |
| 350 | |
| 351 | // TODO Initialize Mailbox 1 |
Patrick Georgi | 0f68b23 | 2018-01-25 18:23:15 +0100 | [diff] [blame] | 352 | opregion->mailbox1.clid = 1; |
Matt DeVillier | ebe08e0 | 2017-07-14 13:28:42 -0500 | [diff] [blame] | 353 | |
| 354 | // TODO Initialize Mailbox 3 |
| 355 | opregion->mailbox3.bclp = IGD_BACKLIGHT_BRIGHTNESS; |
| 356 | opregion->mailbox3.pfit = IGD_FIELD_VALID | IGD_PFIT_STRETCH; |
| 357 | opregion->mailbox3.pcft = 0; // should be (IMON << 1) & 0x3e |
| 358 | opregion->mailbox3.cblv = IGD_FIELD_VALID | IGD_INITIAL_BRIGHTNESS; |
| 359 | opregion->mailbox3.bclm[0] = IGD_WORD_FIELD_VALID + 0x0000; |
| 360 | opregion->mailbox3.bclm[1] = IGD_WORD_FIELD_VALID + 0x0a19; |
| 361 | opregion->mailbox3.bclm[2] = IGD_WORD_FIELD_VALID + 0x1433; |
| 362 | opregion->mailbox3.bclm[3] = IGD_WORD_FIELD_VALID + 0x1e4c; |
| 363 | opregion->mailbox3.bclm[4] = IGD_WORD_FIELD_VALID + 0x2866; |
| 364 | opregion->mailbox3.bclm[5] = IGD_WORD_FIELD_VALID + 0x327f; |
| 365 | opregion->mailbox3.bclm[6] = IGD_WORD_FIELD_VALID + 0x3c99; |
| 366 | opregion->mailbox3.bclm[7] = IGD_WORD_FIELD_VALID + 0x46b2; |
| 367 | opregion->mailbox3.bclm[8] = IGD_WORD_FIELD_VALID + 0x50cc; |
| 368 | opregion->mailbox3.bclm[9] = IGD_WORD_FIELD_VALID + 0x5ae5; |
| 369 | opregion->mailbox3.bclm[10] = IGD_WORD_FIELD_VALID + 0x64ff; |
| 370 | |
Matt DeVillier | ebe08e0 | 2017-07-14 13:28:42 -0500 | [diff] [blame] | 371 | /* Write ASLS PCI register and prepare SWSCI register. */ |
| 372 | intel_gma_opregion_register((uintptr_t)opregion); |
| 373 | |
| 374 | return CB_SUCCESS; |
| 375 | } |