blob: ab9093b82ff38696c5aa5549f17650e9f64984db [file] [log] [blame]
Patrick Rudolphfa470422017-06-20 17:49:53 +02001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2017 Patrick Rudolph <siro@das-labor.org>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2, or (at your option)
9 * any later verion of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <device/device.h>
18#include <device/pci.h>
19#include <device/pci_ids.h>
20#include <device/pci_ops.h>
21#include "opregion.h"
22
23/* Write ASLS PCI register and prepare SWSCI register. */
24void intel_gma_opregion_register(uintptr_t opregion)
25{
26 device_t igd;
27 u16 reg16;
28
29 igd = dev_find_slot(0, PCI_DEVFN(0x2, 0));
30 if (!igd || !igd->enabled)
31 return;
32
33 /*
34 * Intel BIOS Specification
35 * Chapter 5.3.7 "Initialize Hardware State"
36 */
37 pci_write_config32(igd, ASLS, opregion);
38
39 /*
40 * Intel's Windows driver relies on this:
41 * Intel BIOS Specification
42 * Chapter 5.4 "ASL Software SCI Handler"
43 */
44 reg16 = pci_read_config16(igd, SWSCI);
45 reg16 &= ~GSSCIE;
46 reg16 |= SMISCISEL;
47 pci_write_config16(igd, SWSCI, reg16);
48}