blob: 22760d2e0377ba15c81a2d44e66c6f959fbe0e21 [file] [log] [blame]
efdesign9895b66112011-07-20 13:23:04 -06001#
2# This file is part of the coreboot project.
3#
4# Copyright (C) 2011 Advanced Micro Devices, Inc.
5#
6# This program is free software; you can redistribute it and/or modify
7# it under the terms of the GNU General Public License as published by
8# the Free Software Foundation; version 2 of the License.
9#
10# This program is distributed in the hope that it will be useful,
11# but WITHOUT ANY WARRANTY; without even the implied warranty of
12# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13# GNU General Public License for more details.
14#
15# You should have received a copy of the GNU General Public License
16# along with this program; if not, write to the Free Software
17# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18#
19
20if BOARD_SUPERMICRO_H8QGI
21
22config BOARD_SPECIFIC_OPTIONS
23 def_bool y
24 select ARCH_X86
25 select CPU_AMD_AGESA_FAMILY10
26 select NORTHBRIDGE_AMD_AGESA_FAMILY10_ROOT_COMPLEX
27 select NORTHBRIDGE_AMD_AGESA_FAMILY10
28 select SOUTHBRIDGE_AMD_SR5650
29 select SOUTHBRIDGE_AMD_SP5100
30 select SUPERIO_WINBOND_W83627DHG
Alexandru Gagniuc1a2b3182011-08-03 09:14:59 -050031 select SUPERIO_NUVOTON_WPCM450
efdesign9895b66112011-07-20 13:23:04 -060032 select BOARD_HAS_FADT
33 select HAVE_BUS_CONFIG
34 select HAVE_OPTION_TABLE
35 select HAVE_PIRQ_TABLE
36 select HAVE_MP_TABLE
37 select HAVE_HARD_RESET
38 select SERIAL_CPU_INIT
39 select AMDMCT
40 select HAVE_ACPI_TABLES
41 select BOARD_ROMSIZE_KB_2048
42 select TINY_BOOTBLOCK
43 #select MMCONF_SUPPORT_DEFAULT #TODO enable it to resolve Multicore IO conflict
44
45config AMD_AGESA
46 bool
47 default y
48
49config MAINBOARD_DIR
50 string
51 default supermicro/h8qgi
52
53config MAINBOARD_PART_NUMBER
54 string
55 default "H8QGI"
56
57config HW_MEM_HOLE_SIZEK
58 hex
59 default 0x200000
60
61config MAX_CPUS
62 int
63 default 64
64
65config MAX_PHYSICAL_CPUS
66 int
67 default 16
68
69config HW_MEM_HOLE_SIZE_AUTO_INC
70 bool
71 default n
72
73config MEM_TRAIN_SEQ
74 int
75 default 2
76
77config IRQ_SLOT_COUNT
78 int
79 default 11
80
81config RAMTOP
82 hex
83 default 0x1000000
84
85config HEAP_SIZE
86 hex
87 default 0xc0000
88
89config STACK_SIZE
90 hex
91 default 0x10000
92
93config ACPI_SSDTX_NUM
94 int
95 default 0
96
97config RAMBASE
98 hex
99 default 0x200000
100
101config SIO_PORT
102 hex
103 default 0x164E
104 help
105 though UARTs are on the NUVOTON BMC, port 0x164E
106 PS2 keyboard and mouse are on SUPERIO_WINBOND_W83627DHG, port 0x2E
107
108config DRIVERS_PS2_KEYBOARD
109 bool
110 default y
111
112config WARNINGS_ARE_ERRORS
113 bool
114 default n
115
116config ONBOARD_VGA_IS_PRIMARY
117 bool
118 default y
119
120config VGA_BIOS
121 bool
122 default n
123
124config VGA_BIOS_ID
125 string
126 depends on VGA_BIOS
127 default "102b,0532"
128
129endif # BOARD_SUPERMICRO_H8QGI
130