| Angel Pons | 182dbde | 2020-04-02 23:49:05 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| Frank Vibrans | 63e62b0 | 2011-02-14 18:38:14 +0000 | [diff] [blame] | 2 | |
| Kerry She | feed329 | 2011-08-18 18:03:44 +0800 | [diff] [blame] | 3 | #ifndef _CIMX_H_ |
| 4 | #define _CIMX_H_ |
| Frank Vibrans | 63e62b0 | 2011-02-14 18:38:14 +0000 | [diff] [blame] | 5 | |
| 6 | /** |
| Kerry She | feed329 | 2011-08-18 18:03:44 +0800 | [diff] [blame] | 7 | * AMD South Bridge CIMx entry point wrapper |
| 8 | */ |
| 9 | void sb_Poweron_Init(void); |
| 10 | void sb_Before_Pci_Init(void); |
| 11 | void sb_After_Pci_Init(void); |
| 12 | void sb_Mid_Post_Init(void); |
| 13 | void sb_Late_Post(void); |
| zbao | 9bcdbf8 | 2012-04-05 13:18:49 +0800 | [diff] [blame] | 14 | void sb_Before_Pci_Restore_Init(void); |
| 15 | void sb_After_Pci_Restore_Init(void); |
| 16 | |
| Kerry She | feed329 | 2011-08-18 18:03:44 +0800 | [diff] [blame] | 17 | /** |
| 18 | * CIMX not set the clock to 48Mhz until sbBeforePciInit, |
| 19 | * coreboot may need to set this even more earlier |
| 20 | */ |
| 21 | void sb800_clk_output_48Mhz(void); |
| 22 | |
| Kerry She | feed329 | 2011-08-18 18:03:44 +0800 | [diff] [blame] | 23 | #endif |