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Angel Pons8a3453f2020-04-02 23:48:19 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Ronald G. Minnich99451b12013-06-27 10:42:59 -07002
Vladimir Serbinenkoa71bdc32014-08-30 00:35:39 +02003#ifndef INTEL_I915_H
4#define INTEL_I915_H 1
5
Ronald G. Minnich99451b12013-06-27 10:42:59 -07006#include <drivers/intel/gma/i915_reg.h>
Matt DeVillier168d8a42020-04-20 18:50:17 -05007#include <drivers/intel/gma/gma.h>
Ronald G. Minnich99451b12013-06-27 10:42:59 -07008#include <edid.h>
9
10/* port types. We stick with the same defines as the kernel */
11#define INTEL_OUTPUT_UNUSED 0
12#define INTEL_OUTPUT_ANALOG 1
13#define INTEL_OUTPUT_DVO 2
14#define INTEL_OUTPUT_SDVO 3
15#define INTEL_OUTPUT_LVDS 4
16#define INTEL_OUTPUT_TVOUT 5
17#define INTEL_OUTPUT_HDMI 6
18#define INTEL_OUTPUT_DISPLAYPORT 7
19#define INTEL_OUTPUT_EDP 8
20
21/* things that are, strangely, not defined anywhere? */
22#define PCH_PP_UNLOCK 0xabcd0000
Ryan Salsamendi5d09d482017-07-04 13:53:00 -070023#define WMx_LP_SR_EN (1UL<<31)
Ronald G. Minnich99451b12013-06-27 10:42:59 -070024#define PRB0_TAIL 0x02030
25#define PRB0_HEAD 0x02034
26#define PRB0_START 0x02038
27#define PRB0_CTL 0x0203c
28
Furquan Shaikhd0a81f72013-07-30 12:41:08 -070029enum port {
30 PORT_A = 0,
31 PORT_B,
32 PORT_C,
Subrata Banik18589032023-09-17 18:39:31 +000033#if CONFIG(INTEL_GMA_VERSION_2)
34 PORT_USB_C1,
35 PORT_USB_C2,
36 PORT_USB_C3,
37 PORT_USB_C4,
38#endif
Furquan Shaikhd0a81f72013-07-30 12:41:08 -070039 PORT_D,
40 PORT_E,
41 I915_NUM_PORTS
42};
43
44enum pipe {
45 PIPE_A = 0,
46 PIPE_B,
47 PIPE_C,
Subrata Banik18589032023-09-17 18:39:31 +000048#if CONFIG(INTEL_GMA_VERSION_2)
49 PIPE_D,
50#endif
Furquan Shaikhd0a81f72013-07-30 12:41:08 -070051 I915_NUM_PIPES
52};
53
Furquan Shaikhdb3157c2013-07-31 16:47:31 -070054enum transcoder {
Martin Rothb9810a42017-07-23 20:00:04 -060055 TRANSCODER_A = 0,
56 TRANSCODER_B,
57 TRANSCODER_C,
58 TRANSCODER_EDP = 0xF,
Furquan Shaikhdb3157c2013-07-31 16:47:31 -070059};
60
Furquan Shaikh77f48cd2013-08-19 10:16:50 -070061enum plane {
62 PLANE_A = 0,
63 PLANE_B,
64 PLANE_C,
65};
66
Ronald G. Minnich99451b12013-06-27 10:42:59 -070067/* debug enums. These are for printks that, due to their place in the
68 * middle of graphics device IO, might change timing. Use with care
69 * or not at all.
70 */
71enum {
72 vio = 2, /* dump every IO */
73 vspin = 4, /* print # of times we spun on a register value */
74};
75
76/* The mainboard must provide these functions. */
77unsigned long io_i915_read32(unsigned long addr);
78void io_i915_write32(unsigned long val, unsigned long addr);
79
Furquan Shaikh77f48cd2013-08-19 10:16:50 -070080void intel_prepare_ddi(void);
Furquan Shaikh77f48cd2013-08-19 10:16:50 -070081
Ronald G. Minnich9518b562013-09-19 16:45:22 -070082int gtt_poll(u32 reg, u32 mask, u32 value);
Furquan Shaikh77f48cd2013-08-19 10:16:50 -070083void gtt_write(u32 reg, u32 data);
84u32 gtt_read(u32 reg);
85
Vladimir Serbinenkoa71bdc32014-08-30 00:35:39 +020086/* vbt.c */
87struct device;
88void
89generate_fake_intel_oprom(const struct i915_gpu_controller_info *conf,
90 struct device *dev, const char *idstr);
91
92#endif