| Angel Pons | 182dbde | 2020-04-02 23:49:05 +0200 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* This file is part of the coreboot project. */ |
| Kyösti Mälkki | 3d0288d | 2016-12-04 15:39:44 +0200 | [diff] [blame] | 3 | |
| Kyösti Mälkki | de64078 | 2019-12-03 07:30:26 +0200 | [diff] [blame] | 4 | #include <arch/bootblock.h> |
| Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 5 | #include <device/pci_ops.h> |
| Kyösti Mälkki | 3d0288d | 2016-12-04 15:39:44 +0200 | [diff] [blame] | 6 | |
| Kyösti Mälkki | 0377a369 | 2019-01-06 10:44:49 +0200 | [diff] [blame] | 7 | void bootblock_early_southbridge_init(void) |
| Kyösti Mälkki | 3d0288d | 2016-12-04 15:39:44 +0200 | [diff] [blame] | 8 | { |
| 9 | /* Set FWH IDs for 2 MB flash part. */ |
| 10 | if (CONFIG_ROM_SIZE == 0x200000) |
| 11 | pci_write_config32(PCI_DEV(0, 0x1f, 0), 0xe8, 0x00001111); |
| 12 | } |