Patrick Georgi | ac95903 | 2020-05-05 22:49:26 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
Andrey Petrov | b37fd67 | 2016-03-01 16:25:38 -0800 | [diff] [blame] | 2 | |
| 3 | #ifndef _FSP2_0_API_H_ |
| 4 | #define _FSP2_0_API_H_ |
| 5 | |
| 6 | #include <stddef.h> |
Naresh G Solanki | 55eee48 | 2016-09-08 13:25:30 +0530 | [diff] [blame] | 7 | #include <stdint.h> |
Brandon Breitenstein | c31ba0e | 2016-07-27 17:34:45 -0700 | [diff] [blame] | 8 | #include <fsp/soc_binding.h> |
Pratik Prajapati | ffc934d | 2016-11-18 14:36:34 -0800 | [diff] [blame] | 9 | #include <soc/intel/common/mma.h> |
Andrey Petrov | b37fd67 | 2016-03-01 16:25:38 -0800 | [diff] [blame] | 10 | |
Brandon Breitenstein | c31ba0e | 2016-07-27 17:34:45 -0700 | [diff] [blame] | 11 | #define FSP_SUCCESS EFI_SUCCESS |
Subrata Banik | c3d03b3 | 2019-02-27 18:32:39 +0530 | [diff] [blame] | 12 | #define FSP_INVALID_PARAMETER EFI_INVALID_PARAMETER |
| 13 | #define FSP_DEVICE_ERROR EFI_DEVICE_ERROR |
| 14 | #define FSP_NOT_FOUND EFI_NOT_FOUND |
| 15 | #define FSP_NOT_STARTED EFI_NOT_STARTED |
| 16 | #define FSP_UNSUPPORTED EFI_UNSUPPORTED |
Andrey Petrov | b37fd67 | 2016-03-01 16:25:38 -0800 | [diff] [blame] | 17 | |
Andrey Petrov | a6dd535 | 2016-03-17 16:42:41 -0700 | [diff] [blame] | 18 | enum fsp_boot_mode { |
| 19 | FSP_BOOT_WITH_FULL_CONFIGURATION = 0x00, |
| 20 | FSP_BOOT_WITH_MINIMAL_CONFIGURATION = 0x01, |
| 21 | FSP_BOOT_ASSUMING_NO_CONFIGURATION_CHANGES = 0x02, |
| 22 | FSP_BOOT_ON_S4_RESUME = 0x05, |
| 23 | FSP_BOOT_ON_S3_RESUME = 0x11, |
| 24 | FSP_BOOT_ON_FLASH_UPDATE = 0x12, |
| 25 | FSP_BOOT_IN_RECOVERY_MODE = 0x20 |
| 26 | }; |
| 27 | |
Andrey Petrov | b37fd67 | 2016-03-01 16:25:38 -0800 | [diff] [blame] | 28 | enum fsp_notify_phase { |
| 29 | AFTER_PCI_ENUM = 0x20, |
Hannah Williams | 16f3d3d | 2016-04-29 14:40:40 -0700 | [diff] [blame] | 30 | READY_TO_BOOT = 0x40, |
| 31 | END_OF_FIRMWARE = 0xF0 |
Andrey Petrov | b37fd67 | 2016-03-01 16:25:38 -0800 | [diff] [blame] | 32 | }; |
| 33 | |
Andrey Petrov | b37fd67 | 2016-03-01 16:25:38 -0800 | [diff] [blame] | 34 | /* Main FSP stages */ |
Raul E Rangel | 1592846 | 2021-11-05 10:29:24 -0600 | [diff] [blame^] | 35 | void preload_fspm(void); |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 36 | void fsp_memory_init(bool s3wake); |
Raul E Rangel | 1592846 | 2021-11-05 10:29:24 -0600 | [diff] [blame^] | 37 | void preload_fsps(void); |
Kyösti Mälkki | cc93c6e | 2021-01-09 22:53:52 +0200 | [diff] [blame] | 38 | void fsp_silicon_init(void); |
Andrey Petrov | b37fd67 | 2016-03-01 16:25:38 -0800 | [diff] [blame] | 39 | |
Furquan Shaikh | f4b20af | 2017-02-20 13:33:32 -0800 | [diff] [blame] | 40 | /* |
| 41 | * Load FSP-S from stage cache or CBFS. This allows SoCs to load FSPS-S |
| 42 | * separately from calling silicon init. It might be required in cases where |
| 43 | * stage cache is no longer available by the point SoC calls into silicon init. |
| 44 | */ |
Kyösti Mälkki | cc93c6e | 2021-01-09 22:53:52 +0200 | [diff] [blame] | 45 | void fsps_load(void); |
Furquan Shaikh | f4b20af | 2017-02-20 13:33:32 -0800 | [diff] [blame] | 46 | |
Andrey Petrov | b37fd67 | 2016-03-01 16:25:38 -0800 | [diff] [blame] | 47 | /* Callbacks for updating stage-specific parameters */ |
Andrey Petrov | f796c6e | 2016-11-18 14:57:51 -0800 | [diff] [blame] | 48 | void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version); |
Brandon Breitenstein | c31ba0e | 2016-07-27 17:34:45 -0700 | [diff] [blame] | 49 | void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd); |
Subrata Banik | 33d9c4a | 2020-05-26 18:26:54 +0530 | [diff] [blame] | 50 | /* Callbacks for SoC/Mainboard specific overrides */ |
| 51 | void platform_fsp_multi_phase_init_cb(uint32_t phase_index); |
Subrata Banik | 298b359 | 2021-09-14 12:38:08 +0530 | [diff] [blame] | 52 | /* Check if MultiPhase Si Init is enabled */ |
| 53 | bool fsp_is_multi_phase_init_enabled(void); |
Aaron Durbin | a3cecb2 | 2017-04-25 21:58:10 -0500 | [diff] [blame] | 54 | /* |
| 55 | * The following functions are used when FSP_PLATFORM_MEMORY_SETTINGS_VERSION |
| 56 | * is employed allowing the mainboard and SoC to supply their own version |
| 57 | * for memory settings respectively. The valid values are 0-15 for each |
| 58 | * function. |
| 59 | */ |
| 60 | uint8_t fsp_memory_mainboard_version(void); |
| 61 | uint8_t fsp_memory_soc_version(void); |
| 62 | |
Lee Leahy | 806fa24 | 2016-08-01 13:55:02 -0700 | [diff] [blame] | 63 | /* Callback after processing FSP notify */ |
| 64 | void platform_fsp_notify_status(enum fsp_notify_phase phase); |
| 65 | |
Pratik Prajapati | ffc934d | 2016-11-18 14:36:34 -0800 | [diff] [blame] | 66 | /* Initialize memory margin analysis settings. */ |
| 67 | void setup_mma(FSP_M_CONFIG *memory_cfg); |
Wim Vervoorn | d137150 | 2019-12-17 14:10:16 +0100 | [diff] [blame] | 68 | /* Update the SOC specific logo param and load the logo. */ |
Kyösti Mälkki | 4949a3d | 2021-01-09 20:38:43 +0200 | [diff] [blame] | 69 | void soc_load_logo(FSPS_UPD *supd); |
Pratik Prajapati | ffc934d | 2016-11-18 14:36:34 -0800 | [diff] [blame] | 70 | /* Update the SOC specific memory config param for mma. */ |
| 71 | void soc_update_memory_params_for_mma(FSP_M_CONFIG *memory_cfg, |
| 72 | struct mma_config_param *mma_cfg); |
| 73 | |
Andrey Petrov | b37fd67 | 2016-03-01 16:25:38 -0800 | [diff] [blame] | 74 | /* |
Subrata Banik | 96b32f1 | 2020-07-31 12:09:11 +0530 | [diff] [blame] | 75 | * As per FSP integration guide: |
| 76 | * If bootloader needs to take control of APs back, a full AP re-initialization is |
| 77 | * required after FSP-S is completed and control has been transferred back to bootloader |
| 78 | */ |
| 79 | void do_mpinit_after_fsp(void); |
| 80 | |
| 81 | /* |
Andrey Petrov | b37fd67 | 2016-03-01 16:25:38 -0800 | [diff] [blame] | 82 | * # DOCUMENTATION: |
| 83 | * |
| 84 | * This file defines the interface between coreboot and the FSP 2.0 wrapper |
| 85 | * fsp_memory_init(), fsp_silicon_init(), and fsp_notify() are the main entry |
| 86 | * points and map 1:1 to the FSP entry points of the same name. |
| 87 | * |
| 88 | * ### fsp_memory_init(): |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 89 | * - s3wake: boolean indicating if the system is waking from resume |
Andrey Petrov | b37fd67 | 2016-03-01 16:25:38 -0800 | [diff] [blame] | 90 | * |
| 91 | * This function is responsible for loading and executing the memory |
| 92 | * initialization code from the FSP-M binary. It expects this binary to reside |
| 93 | * in cbfs as FSP_M_FILE. |
| 94 | * |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 95 | * The function takes one parameter, which is described above, but does not |
Andrey Petrov | b37fd67 | 2016-03-01 16:25:38 -0800 | [diff] [blame] | 96 | * take in memory parameters as an argument. The memory parameters can be filled |
| 97 | * in with platform_fsp_memory_init_params_cb(). This is a callback symbol |
| 98 | * that fsp_memory_init() will call. The platform must provide this symbol. |
| 99 | * |
Andrey Petrov | b37fd67 | 2016-03-01 16:25:38 -0800 | [diff] [blame] | 100 | * |
| 101 | * ### fsp_silicon_init(): |
Andrey Petrov | b37fd67 | 2016-03-01 16:25:38 -0800 | [diff] [blame] | 102 | * |
| 103 | * This function is responsible for loading and executing the silicon |
| 104 | * initialization code from the FSP-S binary. It expects this binary to reside |
| 105 | * in cbfs as FSP_S_FILE. |
| 106 | * |
| 107 | * Like fsp_memory_init(), it provides a callback to fill in FSP-specific |
| 108 | * parameters, via platform_fsp_silicon_init_params_cb(). The platform must |
| 109 | * also provide this symbol. |
| 110 | * |
| 111 | * |
| 112 | * ### fsp_notify(): |
| 113 | * - phase: Which FSP notification phase |
| 114 | * |
| 115 | * This function is responsible for loading and executing the notify code from |
| 116 | * the FSP-S binary. It expects that fsp_silicon_init() has already been called |
Elyes HAOUAS | 1895838 | 2018-08-07 12:23:16 +0200 | [diff] [blame] | 117 | * successfully, and that the FSP-S binary is still loaded into memory. |
Andrey Petrov | b37fd67 | 2016-03-01 16:25:38 -0800 | [diff] [blame] | 118 | */ |
| 119 | |
| 120 | #endif /* _FSP2_0_API_H_ */ |