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Patrick Georgiac959032020-05-05 22:49:26 +02001/* SPDX-License-Identifier: GPL-2.0-or-later */
Andrey Petrovb37fd672016-03-01 16:25:38 -08002
3#ifndef _FSP2_0_API_H_
4#define _FSP2_0_API_H_
5
6#include <stddef.h>
Naresh G Solanki55eee482016-09-08 13:25:30 +05307#include <stdint.h>
Brandon Breitensteinc31ba0e2016-07-27 17:34:45 -07008#include <fsp/soc_binding.h>
Pratik Prajapatiffc934d2016-11-18 14:36:34 -08009#include <soc/intel/common/mma.h>
Andrey Petrovb37fd672016-03-01 16:25:38 -080010
Brandon Breitensteinc31ba0e2016-07-27 17:34:45 -070011#define FSP_SUCCESS EFI_SUCCESS
Subrata Banikc3d03b32019-02-27 18:32:39 +053012#define FSP_INVALID_PARAMETER EFI_INVALID_PARAMETER
13#define FSP_DEVICE_ERROR EFI_DEVICE_ERROR
14#define FSP_NOT_FOUND EFI_NOT_FOUND
15#define FSP_NOT_STARTED EFI_NOT_STARTED
16#define FSP_UNSUPPORTED EFI_UNSUPPORTED
Andrey Petrovb37fd672016-03-01 16:25:38 -080017
Andrey Petrova6dd5352016-03-17 16:42:41 -070018enum fsp_boot_mode {
19 FSP_BOOT_WITH_FULL_CONFIGURATION = 0x00,
20 FSP_BOOT_WITH_MINIMAL_CONFIGURATION = 0x01,
21 FSP_BOOT_ASSUMING_NO_CONFIGURATION_CHANGES = 0x02,
22 FSP_BOOT_ON_S4_RESUME = 0x05,
23 FSP_BOOT_ON_S3_RESUME = 0x11,
24 FSP_BOOT_ON_FLASH_UPDATE = 0x12,
25 FSP_BOOT_IN_RECOVERY_MODE = 0x20
26};
27
Andrey Petrovb37fd672016-03-01 16:25:38 -080028enum fsp_notify_phase {
29 AFTER_PCI_ENUM = 0x20,
Hannah Williams16f3d3d2016-04-29 14:40:40 -070030 READY_TO_BOOT = 0x40,
31 END_OF_FIRMWARE = 0xF0
Andrey Petrovb37fd672016-03-01 16:25:38 -080032};
33
Andrey Petrovb37fd672016-03-01 16:25:38 -080034/* Main FSP stages */
Raul E Rangel15928462021-11-05 10:29:24 -060035void preload_fspm(void);
Lee Leahy9671faa2016-07-24 18:18:52 -070036void fsp_memory_init(bool s3wake);
Raul E Rangel15928462021-11-05 10:29:24 -060037void preload_fsps(void);
Kyösti Mälkkicc93c6e2021-01-09 22:53:52 +020038void fsp_silicon_init(void);
Andrey Petrovb37fd672016-03-01 16:25:38 -080039
Furquan Shaikhf4b20af2017-02-20 13:33:32 -080040/*
41 * Load FSP-S from stage cache or CBFS. This allows SoCs to load FSPS-S
42 * separately from calling silicon init. It might be required in cases where
43 * stage cache is no longer available by the point SoC calls into silicon init.
44 */
Kyösti Mälkkicc93c6e2021-01-09 22:53:52 +020045void fsps_load(void);
Furquan Shaikhf4b20af2017-02-20 13:33:32 -080046
Andrey Petrovb37fd672016-03-01 16:25:38 -080047/* Callbacks for updating stage-specific parameters */
Andrey Petrovf796c6e2016-11-18 14:57:51 -080048void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version);
Brandon Breitensteinc31ba0e2016-07-27 17:34:45 -070049void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd);
Subrata Banik33d9c4a2020-05-26 18:26:54 +053050/* Callbacks for SoC/Mainboard specific overrides */
51void platform_fsp_multi_phase_init_cb(uint32_t phase_index);
Subrata Banik298b3592021-09-14 12:38:08 +053052/* Check if MultiPhase Si Init is enabled */
53bool fsp_is_multi_phase_init_enabled(void);
Aaron Durbina3cecb22017-04-25 21:58:10 -050054/*
55 * The following functions are used when FSP_PLATFORM_MEMORY_SETTINGS_VERSION
56 * is employed allowing the mainboard and SoC to supply their own version
57 * for memory settings respectively. The valid values are 0-15 for each
58 * function.
59 */
60uint8_t fsp_memory_mainboard_version(void);
61uint8_t fsp_memory_soc_version(void);
62
Lee Leahy806fa242016-08-01 13:55:02 -070063/* Callback after processing FSP notify */
64void platform_fsp_notify_status(enum fsp_notify_phase phase);
65
Pratik Prajapatiffc934d2016-11-18 14:36:34 -080066/* Initialize memory margin analysis settings. */
67void setup_mma(FSP_M_CONFIG *memory_cfg);
Wim Vervoornd1371502019-12-17 14:10:16 +010068/* Update the SOC specific logo param and load the logo. */
Kyösti Mälkki4949a3d2021-01-09 20:38:43 +020069void soc_load_logo(FSPS_UPD *supd);
Pratik Prajapatiffc934d2016-11-18 14:36:34 -080070/* Update the SOC specific memory config param for mma. */
71void soc_update_memory_params_for_mma(FSP_M_CONFIG *memory_cfg,
72 struct mma_config_param *mma_cfg);
73
Andrey Petrovb37fd672016-03-01 16:25:38 -080074/*
Subrata Banik96b32f12020-07-31 12:09:11 +053075 * As per FSP integration guide:
76 * If bootloader needs to take control of APs back, a full AP re-initialization is
77 * required after FSP-S is completed and control has been transferred back to bootloader
78 */
79void do_mpinit_after_fsp(void);
80
81/*
Andrey Petrovb37fd672016-03-01 16:25:38 -080082 * # DOCUMENTATION:
83 *
84 * This file defines the interface between coreboot and the FSP 2.0 wrapper
85 * fsp_memory_init(), fsp_silicon_init(), and fsp_notify() are the main entry
86 * points and map 1:1 to the FSP entry points of the same name.
87 *
88 * ### fsp_memory_init():
Aaron Durbinb4302502016-07-17 17:04:37 -050089 * - s3wake: boolean indicating if the system is waking from resume
Andrey Petrovb37fd672016-03-01 16:25:38 -080090 *
91 * This function is responsible for loading and executing the memory
92 * initialization code from the FSP-M binary. It expects this binary to reside
93 * in cbfs as FSP_M_FILE.
94 *
Aaron Durbind04639b2016-07-17 23:23:59 -050095 * The function takes one parameter, which is described above, but does not
Andrey Petrovb37fd672016-03-01 16:25:38 -080096 * take in memory parameters as an argument. The memory parameters can be filled
97 * in with platform_fsp_memory_init_params_cb(). This is a callback symbol
98 * that fsp_memory_init() will call. The platform must provide this symbol.
99 *
Andrey Petrovb37fd672016-03-01 16:25:38 -0800100 *
101 * ### fsp_silicon_init():
Andrey Petrovb37fd672016-03-01 16:25:38 -0800102 *
103 * This function is responsible for loading and executing the silicon
104 * initialization code from the FSP-S binary. It expects this binary to reside
105 * in cbfs as FSP_S_FILE.
106 *
107 * Like fsp_memory_init(), it provides a callback to fill in FSP-specific
108 * parameters, via platform_fsp_silicon_init_params_cb(). The platform must
109 * also provide this symbol.
110 *
111 *
112 * ### fsp_notify():
113 * - phase: Which FSP notification phase
114 *
115 * This function is responsible for loading and executing the notify code from
116 * the FSP-S binary. It expects that fsp_silicon_init() has already been called
Elyes HAOUAS18958382018-08-07 12:23:16 +0200117 * successfully, and that the FSP-S binary is still loaded into memory.
Andrey Petrovb37fd672016-03-01 16:25:38 -0800118 */
119
120#endif /* _FSP2_0_API_H_ */