Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 1 | /* |
Martin Roth | cddd600 | 2019-09-23 17:38:27 -0600 | [diff] [blame] | 2 | * This file is part of the coreboot project. |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 3 | * |
| 4 | * This program is free software; you can redistribute it and/or |
| 5 | * modify it under the terms of the GNU General Public License as |
| 6 | * published by the Free Software Foundation, version 2 of the |
| 7 | * License. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | */ |
| 14 | |
Martin Roth | cddd600 | 2019-09-23 17:38:27 -0600 | [diff] [blame] | 15 | /* Based on Linux Kernel TPM driver */ |
| 16 | |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 17 | /* |
| 18 | * cr50 is a TPM 2.0 capable device that requries special |
| 19 | * handling for the I2C interface. |
| 20 | * |
| 21 | * - Use an interrupt for transaction status instead of hardcoded delays |
| 22 | * - Must use write+wait+read read protocol |
| 23 | * - All 4 bytes of status register must be read/written at once |
| 24 | * - Burst count max is 63 bytes, and burst count behaves |
| 25 | * slightly differently than other I2C TPMs |
| 26 | * - When reading from FIFO the full burstcnt must be read |
| 27 | * instead of just reading header and determining the remainder |
| 28 | */ |
| 29 | |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 30 | #include <commonlib/endian.h> |
Elyes HAOUAS | 361a935 | 2019-12-18 21:26:33 +0100 | [diff] [blame] | 31 | #include <commonlib/helpers.h> |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 32 | #include <string.h> |
| 33 | #include <types.h> |
| 34 | #include <delay.h> |
| 35 | #include <console/console.h> |
Nico Huber | 0f2dd1e | 2017-08-01 14:02:40 +0200 | [diff] [blame] | 36 | #include <device/i2c_simple.h> |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 37 | #include <endian.h> |
| 38 | #include <timer.h> |
Philipp Deppenwiese | d88fb36 | 2017-10-18 20:26:18 +0200 | [diff] [blame] | 39 | #include <security/tpm/tis.h> |
Elyes HAOUAS | ede8dd0 | 2019-06-23 06:57:53 +0200 | [diff] [blame] | 40 | |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 41 | #include "tpm.h" |
| 42 | |
Duncan Laurie | 3727a8d | 2016-09-19 16:37:46 -0700 | [diff] [blame] | 43 | #define CR50_MAX_BUFSIZE 63 |
Duncan Laurie | 469af7b | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 44 | #define CR50_TIMEOUT_INIT_MS 30000 /* Very long timeout for TPM init */ |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame] | 45 | #define CR50_TIMEOUT_LONG_MS 2000 /* Long timeout while waiting for TPM */ |
| 46 | #define CR50_TIMEOUT_SHORT_MS 2 /* Short timeout during transactions */ |
Duncan Laurie | ed4fa09 | 2016-11-01 15:03:13 -0700 | [diff] [blame] | 47 | #define CR50_TIMEOUT_NOIRQ_MS 20 /* Timeout for TPM ready without IRQ */ |
| 48 | #define CR50_TIMEOUT_IRQ_MS 100 /* Timeout for TPM ready with IRQ */ |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 49 | #define CR50_DID_VID 0x00281ae0L |
| 50 | |
| 51 | struct tpm_inf_dev { |
| 52 | int bus; |
| 53 | unsigned int addr; |
Duncan Laurie | 3727a8d | 2016-09-19 16:37:46 -0700 | [diff] [blame] | 54 | uint8_t buf[CR50_MAX_BUFSIZE + sizeof(uint8_t)]; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 55 | }; |
| 56 | |
Patrick Georgi | c9b1359 | 2019-11-29 11:47:47 +0100 | [diff] [blame] | 57 | static struct tpm_inf_dev tpm_dev; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 58 | |
Aaron Durbin | 6403167 | 2018-04-21 14:45:32 -0600 | [diff] [blame] | 59 | __weak int tis_plat_irq_status(void) |
Daniel Kurtz | c4852e7 | 2017-04-21 14:11:51 +0800 | [diff] [blame] | 60 | { |
Arthur Heymans | 0ca944b | 2019-11-20 19:51:06 +0100 | [diff] [blame] | 61 | static int warning_displayed; |
Daniel Kurtz | c4852e7 | 2017-04-21 14:11:51 +0800 | [diff] [blame] | 62 | |
Arthur Heymans | 0ca944b | 2019-11-20 19:51:06 +0100 | [diff] [blame] | 63 | if (!warning_displayed) { |
Daniel Kurtz | c4852e7 | 2017-04-21 14:11:51 +0800 | [diff] [blame] | 64 | printk(BIOS_WARNING, "WARNING: tis_plat_irq_status() not implemented, wasting 20ms to wait on Cr50!\n"); |
Arthur Heymans | 0ca944b | 2019-11-20 19:51:06 +0100 | [diff] [blame] | 65 | warning_displayed = 1; |
Daniel Kurtz | c4852e7 | 2017-04-21 14:11:51 +0800 | [diff] [blame] | 66 | } |
| 67 | mdelay(CR50_TIMEOUT_NOIRQ_MS); |
| 68 | |
| 69 | return 1; |
| 70 | } |
| 71 | |
Duncan Laurie | 94cc485 | 2016-09-19 17:22:10 -0700 | [diff] [blame] | 72 | /* Wait for interrupt to indicate the TPM is ready */ |
| 73 | static int cr50_i2c_wait_tpm_ready(struct tpm_chip *chip) |
| 74 | { |
| 75 | struct stopwatch sw; |
| 76 | |
Duncan Laurie | ed4fa09 | 2016-11-01 15:03:13 -0700 | [diff] [blame] | 77 | stopwatch_init_msecs_expire(&sw, CR50_TIMEOUT_IRQ_MS); |
Duncan Laurie | 94cc485 | 2016-09-19 17:22:10 -0700 | [diff] [blame] | 78 | |
Daniel Kurtz | c4852e7 | 2017-04-21 14:11:51 +0800 | [diff] [blame] | 79 | while (!tis_plat_irq_status()) |
Vadim Bendebury | c7fc199 | 2019-11-26 14:08:59 -0800 | [diff] [blame] | 80 | if (stopwatch_expired(&sw)) { |
| 81 | printk(BIOS_ERR, "Cr50 i2c TPM IRQ timeout!\n"); |
Duncan Laurie | 94cc485 | 2016-09-19 17:22:10 -0700 | [diff] [blame] | 82 | return -1; |
Vadim Bendebury | c7fc199 | 2019-11-26 14:08:59 -0800 | [diff] [blame] | 83 | } |
Duncan Laurie | 94cc485 | 2016-09-19 17:22:10 -0700 | [diff] [blame] | 84 | return 0; |
| 85 | } |
| 86 | |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 87 | /* |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 88 | * cr50_i2c_read() - read from TPM register |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 89 | * |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 90 | * @chip: TPM chip information |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 91 | * @addr: register address to read from |
| 92 | * @buffer: provided by caller |
| 93 | * @len: number of bytes to read |
| 94 | * |
| 95 | * 1) send register address byte 'addr' to the TPM |
| 96 | * 2) wait for TPM to indicate it is ready |
| 97 | * 3) read 'len' bytes of TPM response into the provided 'buffer' |
| 98 | * |
| 99 | * Return -1 on error, 0 on success. |
| 100 | */ |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 101 | static int cr50_i2c_read(struct tpm_chip *chip, uint8_t addr, |
| 102 | uint8_t *buffer, size_t len) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 103 | { |
Patrick Georgi | c9b1359 | 2019-11-29 11:47:47 +0100 | [diff] [blame] | 104 | if (tpm_dev.addr == 0) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 105 | return -1; |
| 106 | |
Duncan Laurie | 94cc485 | 2016-09-19 17:22:10 -0700 | [diff] [blame] | 107 | /* Clear interrupt before starting transaction */ |
Daniel Kurtz | c4852e7 | 2017-04-21 14:11:51 +0800 | [diff] [blame] | 108 | tis_plat_irq_status(); |
Duncan Laurie | 94cc485 | 2016-09-19 17:22:10 -0700 | [diff] [blame] | 109 | |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 110 | /* Send the register address byte to the TPM */ |
Patrick Georgi | c9b1359 | 2019-11-29 11:47:47 +0100 | [diff] [blame] | 111 | if (i2c_write_raw(tpm_dev.bus, tpm_dev.addr, &addr, 1)) { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 112 | printk(BIOS_ERR, "%s: Address write failed\n", __func__); |
| 113 | return -1; |
| 114 | } |
| 115 | |
| 116 | /* Wait for TPM to be ready with response data */ |
Duncan Laurie | 94cc485 | 2016-09-19 17:22:10 -0700 | [diff] [blame] | 117 | if (cr50_i2c_wait_tpm_ready(chip) < 0) |
| 118 | return -1; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 119 | |
| 120 | /* Read response data from the TPM */ |
Patrick Georgi | c9b1359 | 2019-11-29 11:47:47 +0100 | [diff] [blame] | 121 | if (i2c_read_raw(tpm_dev.bus, tpm_dev.addr, buffer, len)) { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 122 | printk(BIOS_ERR, "%s: Read response failed\n", __func__); |
| 123 | return -1; |
| 124 | } |
| 125 | |
| 126 | return 0; |
| 127 | } |
| 128 | |
| 129 | /* |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 130 | * cr50_i2c_write() - write to TPM register |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 131 | * |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 132 | * @chip: TPM chip information |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 133 | * @addr: register address to write to |
| 134 | * @buffer: data to write |
| 135 | * @len: number of bytes to write |
| 136 | * |
| 137 | * 1) prepend the provided address to the provided data |
| 138 | * 2) send the address+data to the TPM |
| 139 | * 3) wait for TPM to indicate it is done writing |
| 140 | * |
| 141 | * Returns -1 on error, 0 on success. |
| 142 | */ |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 143 | static int cr50_i2c_write(struct tpm_chip *chip, |
| 144 | uint8_t addr, uint8_t *buffer, size_t len) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 145 | { |
Patrick Georgi | c9b1359 | 2019-11-29 11:47:47 +0100 | [diff] [blame] | 146 | if (tpm_dev.addr == 0) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 147 | return -1; |
Duncan Laurie | 3727a8d | 2016-09-19 16:37:46 -0700 | [diff] [blame] | 148 | if (len > CR50_MAX_BUFSIZE) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 149 | return -1; |
| 150 | |
| 151 | /* Prepend the 'register address' to the buffer */ |
Patrick Georgi | c9b1359 | 2019-11-29 11:47:47 +0100 | [diff] [blame] | 152 | tpm_dev.buf[0] = addr; |
| 153 | memcpy(tpm_dev.buf + 1, buffer, len); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 154 | |
Duncan Laurie | 94cc485 | 2016-09-19 17:22:10 -0700 | [diff] [blame] | 155 | /* Clear interrupt before starting transaction */ |
Daniel Kurtz | c4852e7 | 2017-04-21 14:11:51 +0800 | [diff] [blame] | 156 | tis_plat_irq_status(); |
Duncan Laurie | 94cc485 | 2016-09-19 17:22:10 -0700 | [diff] [blame] | 157 | |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 158 | /* Send write request buffer with address */ |
Patrick Georgi | c9b1359 | 2019-11-29 11:47:47 +0100 | [diff] [blame] | 159 | if (i2c_write_raw(tpm_dev.bus, tpm_dev.addr, tpm_dev.buf, len + 1)) { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 160 | printk(BIOS_ERR, "%s: Error writing to TPM\n", __func__); |
| 161 | return -1; |
| 162 | } |
| 163 | |
| 164 | /* Wait for TPM to be ready */ |
Duncan Laurie | 94cc485 | 2016-09-19 17:22:10 -0700 | [diff] [blame] | 165 | return cr50_i2c_wait_tpm_ready(chip); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 166 | } |
| 167 | |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 168 | /* |
| 169 | * Cr50 processes reset requests asynchronously and consceivably could be busy |
| 170 | * executing a long command and not reacting to the reset pulse for a while. |
| 171 | * |
| 172 | * This function will make sure that the AP does not proceed with boot until |
| 173 | * TPM finished reset processing. |
| 174 | */ |
| 175 | static int process_reset(struct tpm_chip *chip) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 176 | { |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 177 | struct stopwatch sw; |
Richard Spiegel | 7c1e959 | 2018-08-09 14:41:17 -0700 | [diff] [blame] | 178 | int rv = 0; |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 179 | uint8_t access; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 180 | |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 181 | /* |
| 182 | * Locality is released by TPM reset. |
| 183 | * |
| 184 | * If locality is taken at this point, this could be due to the fact |
| 185 | * that the TPM is performing a long operation and has not processed |
| 186 | * reset request yet. We'll wait up to CR50_TIMEOUT_INIT_MS and see if |
| 187 | * it releases locality when reset is processed. |
| 188 | */ |
| 189 | stopwatch_init_msecs_expire(&sw, CR50_TIMEOUT_INIT_MS); |
| 190 | do { |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 191 | const uint8_t mask = |
| 192 | TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 193 | |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 194 | rv = cr50_i2c_read(chip, TPM_ACCESS(0), |
| 195 | &access, sizeof(access)); |
| 196 | if (rv || ((access & mask) == mask)) { |
| 197 | /* |
| 198 | * Don't bombard the chip with traffic, let it keep |
| 199 | * processing the command. |
| 200 | */ |
| 201 | mdelay(2); |
| 202 | continue; |
| 203 | } |
| 204 | |
| 205 | printk(BIOS_INFO, "TPM ready after %ld ms\n", |
| 206 | stopwatch_duration_msecs(&sw)); |
| 207 | |
| 208 | return 0; |
| 209 | } while (!stopwatch_expired(&sw)); |
| 210 | |
Richard Spiegel | 7c1e959 | 2018-08-09 14:41:17 -0700 | [diff] [blame] | 211 | if (rv) |
| 212 | printk(BIOS_ERR, "Failed to read TPM\n"); |
| 213 | else |
| 214 | printk(BIOS_ERR, |
| 215 | "TPM failed to reset after %ld ms, status: %#x\n", |
| 216 | stopwatch_duration_msecs(&sw), access); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 217 | |
| 218 | return -1; |
| 219 | } |
| 220 | |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 221 | /* |
| 222 | * Locality could be already claimed (if this is a later coreboot stage and |
| 223 | * the RO did not release it), or not yet claimed, if this is verstage or the |
| 224 | * older RO did release it. |
| 225 | */ |
| 226 | static int claim_locality(struct tpm_chip *chip) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 227 | { |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 228 | uint8_t access; |
| 229 | const uint8_t mask = TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY; |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 230 | |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 231 | if (cr50_i2c_read(chip, TPM_ACCESS(0), &access, sizeof(access))) |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 232 | return -1; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 233 | |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 234 | if ((access & mask) == mask) { |
| 235 | printk(BIOS_INFO, "Locality already claimed\n"); |
| 236 | return 0; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 237 | } |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 238 | |
| 239 | access = TPM_ACCESS_REQUEST_USE; |
| 240 | if (cr50_i2c_write(chip, TPM_ACCESS(0), |
| 241 | &access, sizeof(access))) |
| 242 | return -1; |
| 243 | |
| 244 | if (cr50_i2c_read(chip, TPM_ACCESS(0), &access, sizeof(access))) |
| 245 | return -1; |
| 246 | |
| 247 | if ((access & mask) != mask) { |
| 248 | printk(BIOS_INFO, "Failed to claim locality.\n"); |
| 249 | return -1; |
| 250 | } |
| 251 | |
| 252 | return 0; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 253 | } |
| 254 | |
| 255 | /* cr50 requires all 4 bytes of status register to be read */ |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 256 | static uint8_t cr50_i2c_tis_status(struct tpm_chip *chip) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 257 | { |
| 258 | uint8_t buf[4]; |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 259 | if (cr50_i2c_read(chip, TPM_STS(chip->vendor.locality), |
| 260 | buf, sizeof(buf)) < 0) { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 261 | printk(BIOS_ERR, "%s: Failed to read status\n", __func__); |
| 262 | return 0; |
| 263 | } |
| 264 | return buf[0]; |
| 265 | } |
| 266 | |
| 267 | /* cr50 requires all 4 bytes of status register to be written */ |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 268 | static void cr50_i2c_tis_ready(struct tpm_chip *chip) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 269 | { |
| 270 | uint8_t buf[4] = { TPM_STS_COMMAND_READY }; |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 271 | cr50_i2c_write(chip, TPM_STS(chip->vendor.locality), buf, sizeof(buf)); |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame] | 272 | mdelay(CR50_TIMEOUT_SHORT_MS); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 273 | } |
| 274 | |
| 275 | /* cr50 uses bytes 3:2 of status register for burst count and |
| 276 | * all 4 bytes must be read */ |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 277 | static int cr50_i2c_wait_burststs(struct tpm_chip *chip, uint8_t mask, |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 278 | size_t *burst, int *status) |
| 279 | { |
| 280 | uint8_t buf[4]; |
| 281 | struct stopwatch sw; |
| 282 | |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame] | 283 | stopwatch_init_msecs_expire(&sw, CR50_TIMEOUT_LONG_MS); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 284 | |
| 285 | while (!stopwatch_expired(&sw)) { |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 286 | if (cr50_i2c_read(chip, TPM_STS(chip->vendor.locality), |
| 287 | buf, sizeof(buf)) != 0) { |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame] | 288 | mdelay(CR50_TIMEOUT_SHORT_MS); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 289 | continue; |
| 290 | } |
| 291 | |
| 292 | *status = buf[0]; |
| 293 | *burst = read_le16(&buf[1]); |
| 294 | |
| 295 | /* Check if mask matches and burst is valid */ |
| 296 | if ((*status & mask) == mask && |
Duncan Laurie | 3727a8d | 2016-09-19 16:37:46 -0700 | [diff] [blame] | 297 | *burst > 0 && *burst <= CR50_MAX_BUFSIZE) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 298 | return 0; |
| 299 | |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame] | 300 | mdelay(CR50_TIMEOUT_SHORT_MS); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 301 | } |
| 302 | |
| 303 | printk(BIOS_ERR, "%s: Timeout reading burst and status\n", __func__); |
| 304 | return -1; |
| 305 | } |
| 306 | |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 307 | static int cr50_i2c_tis_recv(struct tpm_chip *chip, uint8_t *buf, |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 308 | size_t buf_len) |
| 309 | { |
| 310 | size_t burstcnt, current, len, expected; |
| 311 | uint8_t addr = TPM_DATA_FIFO(chip->vendor.locality); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 312 | uint8_t mask = TPM_STS_VALID | TPM_STS_DATA_AVAIL; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 313 | int status; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 314 | |
| 315 | if (buf_len < TPM_HEADER_SIZE) |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 316 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 317 | |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 318 | if (cr50_i2c_wait_burststs(chip, mask, &burstcnt, &status) < 0) { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 319 | printk(BIOS_ERR, "%s: First chunk not available\n", __func__); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 320 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 321 | } |
| 322 | |
| 323 | /* Read first chunk of burstcnt bytes */ |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 324 | if (cr50_i2c_read(chip, addr, buf, burstcnt) != 0) { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 325 | printk(BIOS_ERR, "%s: Read failed\n", __func__); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 326 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 327 | } |
| 328 | |
| 329 | /* Determine expected data in the return buffer */ |
| 330 | expected = read_be32(buf + TPM_RSP_SIZE_BYTE); |
| 331 | if (expected > buf_len) { |
| 332 | printk(BIOS_ERR, "%s: Too much data: %zu > %zu\n", |
| 333 | __func__, expected, buf_len); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 334 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 335 | } |
| 336 | |
| 337 | /* Now read the rest of the data */ |
| 338 | current = burstcnt; |
| 339 | while (current < expected) { |
| 340 | /* Read updated burst count and check status */ |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 341 | if (cr50_i2c_wait_burststs(chip, mask, &burstcnt, &status) < 0) |
| 342 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 343 | |
Elyes HAOUAS | 361a935 | 2019-12-18 21:26:33 +0100 | [diff] [blame] | 344 | len = MIN(burstcnt, expected - current); |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 345 | if (cr50_i2c_read(chip, addr, buf + current, len) != 0) { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 346 | printk(BIOS_ERR, "%s: Read failed\n", __func__); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 347 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 348 | } |
| 349 | |
| 350 | current += len; |
| 351 | } |
| 352 | |
| 353 | /* Ensure TPM is done reading data */ |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 354 | if (cr50_i2c_wait_burststs(chip, TPM_STS_VALID, &burstcnt, &status) < 0) |
| 355 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 356 | if (status & TPM_STS_DATA_AVAIL) { |
| 357 | printk(BIOS_ERR, "%s: Data still available\n", __func__); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 358 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 359 | } |
| 360 | |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 361 | return current; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 362 | |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 363 | out_err: |
| 364 | /* Abort current transaction if still pending */ |
| 365 | if (cr50_i2c_tis_status(chip) & TPM_STS_COMMAND_READY) |
| 366 | cr50_i2c_tis_ready(chip); |
| 367 | return -1; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 368 | } |
| 369 | |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 370 | static int cr50_i2c_tis_send(struct tpm_chip *chip, uint8_t *buf, size_t len) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 371 | { |
| 372 | int status; |
| 373 | size_t burstcnt, limit, sent = 0; |
| 374 | uint8_t tpm_go[4] = { TPM_STS_GO }; |
| 375 | struct stopwatch sw; |
| 376 | |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame] | 377 | stopwatch_init_msecs_expire(&sw, CR50_TIMEOUT_LONG_MS); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 378 | |
| 379 | /* Wait until TPM is ready for a command */ |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 380 | while (!(cr50_i2c_tis_status(chip) & TPM_STS_COMMAND_READY)) { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 381 | if (stopwatch_expired(&sw)) { |
| 382 | printk(BIOS_ERR, "%s: Command ready timeout\n", |
| 383 | __func__); |
| 384 | return -1; |
| 385 | } |
| 386 | |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 387 | cr50_i2c_tis_ready(chip); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 388 | } |
| 389 | |
| 390 | while (len > 0) { |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 391 | uint8_t mask = TPM_STS_VALID; |
| 392 | |
| 393 | /* Wait for data if this is not the first chunk */ |
| 394 | if (sent > 0) |
| 395 | mask |= TPM_STS_DATA_EXPECT; |
| 396 | |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 397 | /* Read burst count and check status */ |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 398 | if (cr50_i2c_wait_burststs(chip, mask, &burstcnt, &status) < 0) |
| 399 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 400 | |
| 401 | /* Use burstcnt - 1 to account for the address byte |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 402 | * that is inserted by cr50_i2c_write() */ |
Elyes HAOUAS | 361a935 | 2019-12-18 21:26:33 +0100 | [diff] [blame] | 403 | limit = MIN(burstcnt - 1, len); |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 404 | if (cr50_i2c_write(chip, TPM_DATA_FIFO(chip->vendor.locality), |
| 405 | &buf[sent], limit) != 0) { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 406 | printk(BIOS_ERR, "%s: Write failed\n", __func__); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 407 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 408 | } |
| 409 | |
| 410 | sent += limit; |
| 411 | len -= limit; |
| 412 | } |
| 413 | |
| 414 | /* Ensure TPM is not expecting more data */ |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 415 | if (cr50_i2c_wait_burststs(chip, TPM_STS_VALID, &burstcnt, &status) < 0) |
| 416 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 417 | if (status & TPM_STS_DATA_EXPECT) { |
| 418 | printk(BIOS_ERR, "%s: Data still expected\n", __func__); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 419 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 420 | } |
| 421 | |
| 422 | /* Start the TPM command */ |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 423 | if (cr50_i2c_write(chip, TPM_STS(chip->vendor.locality), tpm_go, |
| 424 | sizeof(tpm_go)) < 0) { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 425 | printk(BIOS_ERR, "%s: Start command failed\n", __func__); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 426 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 427 | } |
| 428 | return sent; |
| 429 | |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 430 | out_err: |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 431 | /* Abort current transaction if still pending */ |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 432 | if (cr50_i2c_tis_status(chip) & TPM_STS_COMMAND_READY) |
| 433 | cr50_i2c_tis_ready(chip); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 434 | return -1; |
| 435 | } |
| 436 | |
| 437 | static void cr50_vendor_init(struct tpm_chip *chip) |
| 438 | { |
| 439 | memset(&chip->vendor, 0, sizeof(struct tpm_vendor_specific)); |
| 440 | chip->vendor.req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID; |
| 441 | chip->vendor.req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID; |
| 442 | chip->vendor.req_canceled = TPM_STS_COMMAND_READY; |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 443 | chip->vendor.status = &cr50_i2c_tis_status; |
| 444 | chip->vendor.recv = &cr50_i2c_tis_recv; |
| 445 | chip->vendor.send = &cr50_i2c_tis_send; |
| 446 | chip->vendor.cancel = &cr50_i2c_tis_ready; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 447 | } |
| 448 | |
Lee Leahy | 52ab30b | 2017-03-15 09:22:11 -0700 | [diff] [blame] | 449 | int tpm_vendor_probe(unsigned int bus, uint32_t addr) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 450 | { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 451 | return 0; |
| 452 | } |
| 453 | |
Keith Short | 5143635 | 2018-12-17 14:21:46 -0700 | [diff] [blame] | 454 | static int cr50_i2c_probe(struct tpm_chip *chip, uint32_t *did_vid) |
| 455 | { |
| 456 | int retries; |
| 457 | |
| 458 | /* |
| 459 | * 150 ms should be enough to synchronize with the TPM even under the |
| 460 | * worst nested reset request conditions. In vast majority of cases |
| 461 | * there would be no wait at all. |
| 462 | */ |
| 463 | printk(BIOS_INFO, "Probing TPM I2C: "); |
| 464 | |
| 465 | for (retries = 15; retries > 0; retries--) { |
| 466 | int rc; |
| 467 | |
| 468 | rc = cr50_i2c_read(chip, TPM_DID_VID(0), (uint8_t *)did_vid, 4); |
| 469 | |
| 470 | /* Exit once DID and VID verified */ |
| 471 | if (!rc && (*did_vid == CR50_DID_VID)) { |
| 472 | printk(BIOS_INFO, "done! DID_VID 0x%08x\n", *did_vid); |
| 473 | return 0; |
| 474 | } |
| 475 | |
| 476 | /* TPM might be resetting, let's retry in a bit. */ |
| 477 | mdelay(10); |
| 478 | printk(BIOS_INFO, "."); |
| 479 | } |
| 480 | |
| 481 | /* |
| 482 | * I2C reads failed, or the DID and VID didn't match |
| 483 | */ |
| 484 | printk(BIOS_ERR, "DID_VID 0x%08x not recognized\n", *did_vid); |
| 485 | return -1; |
| 486 | } |
| 487 | |
Lee Leahy | 52ab30b | 2017-03-15 09:22:11 -0700 | [diff] [blame] | 488 | int tpm_vendor_init(struct tpm_chip *chip, unsigned int bus, uint32_t dev_addr) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 489 | { |
Keith Short | 5143635 | 2018-12-17 14:21:46 -0700 | [diff] [blame] | 490 | uint32_t did_vid = 0; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 491 | |
| 492 | if (dev_addr == 0) { |
| 493 | printk(BIOS_ERR, "%s: missing device address\n", __func__); |
| 494 | return -1; |
| 495 | } |
| 496 | |
Patrick Georgi | c9b1359 | 2019-11-29 11:47:47 +0100 | [diff] [blame] | 497 | tpm_dev.bus = bus; |
| 498 | tpm_dev.addr = dev_addr; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 499 | |
| 500 | cr50_vendor_init(chip); |
| 501 | |
Keith Short | 5143635 | 2018-12-17 14:21:46 -0700 | [diff] [blame] | 502 | if (cr50_i2c_probe(chip, &did_vid)) |
| 503 | return -1; |
| 504 | |
Julius Werner | 21a4053 | 2020-04-21 16:03:53 -0700 | [diff] [blame^] | 505 | if (ENV_SEPARATE_VERSTAGE || ENV_BOOTBLOCK) |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 506 | if (process_reset(chip)) |
| 507 | return -1; |
| 508 | |
| 509 | if (claim_locality(chip)) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 510 | return -1; |
| 511 | |
Daniel Kurtz | c4852e7 | 2017-04-21 14:11:51 +0800 | [diff] [blame] | 512 | printk(BIOS_DEBUG, "cr50 TPM 2.0 (i2c %u:0x%02x id 0x%x)\n", |
Keith Short | 5143635 | 2018-12-17 14:21:46 -0700 | [diff] [blame] | 513 | bus, dev_addr, did_vid >> 16); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 514 | |
| 515 | chip->is_open = 1; |
| 516 | return 0; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 517 | } |
| 518 | |
| 519 | void tpm_vendor_cleanup(struct tpm_chip *chip) |
| 520 | { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 521 | } |