Patrick Georgi | ac95903 | 2020-05-05 22:49:26 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 2 | |
Kyösti Mälkki | de64078 | 2019-12-03 07:30:26 +0200 | [diff] [blame] | 3 | #include <arch/bootblock.h> |
Angel Pons | b8b117c | 2020-09-15 02:26:29 +0200 | [diff] [blame] | 4 | #include <arch/mmio.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 5 | #include <device/pci_ops.h> |
Angel Pons | b8b117c | 2020-09-15 02:26:29 +0200 | [diff] [blame] | 6 | |
Arthur Heymans | 7843bd5 | 2019-11-11 21:56:37 +0100 | [diff] [blame] | 7 | #include "x4x.h" |
Kyösti Mälkki | 197a3c6 | 2019-09-27 14:32:20 +0300 | [diff] [blame] | 8 | |
Arthur Heymans | 7843bd5 | 2019-11-11 21:56:37 +0100 | [diff] [blame] | 9 | void bootblock_early_northbridge_init(void) |
Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 10 | { |
Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 11 | /* Disable LaGrande Technology (LT) */ |
Angel Pons | b8b117c | 2020-09-15 02:26:29 +0200 | [diff] [blame] | 12 | read32((void *)TPM_BASE_ADDRESS); |
Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 13 | |
Angel Pons | b8b117c | 2020-09-15 02:26:29 +0200 | [diff] [blame] | 14 | const uint32_t reg32 = CONFIG_MMCONF_BASE_ADDRESS | 16 | 1; |
Angel Pons | d1c590a | 2020-08-03 16:01:39 +0200 | [diff] [blame] | 15 | pci_io_write_config32(HOST_BRIDGE, D0F0_PCIEXBAR_LO, reg32); |
Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 16 | } |