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zbao01bd79f2012-03-23 11:36:08 +08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2012 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
Paul Menzela46a7122013-02-23 18:37:27 +010017 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
zbao01bd79f2012-03-23 11:36:08 +080018 */
Zheng Bao7bcffa52012-11-28 11:36:52 +080019#include <stdint.h>
20#include <stdlib.h>
21#include <string.h>
zbao01bd79f2012-03-23 11:36:08 +080022#include <arch/io.h>
Zheng Bao600784e2013-02-07 17:30:23 +080023#include <spi-generic.h>
zbao01bd79f2012-03-23 11:36:08 +080024#include <device/device.h>
Zheng Bao7bcffa52012-11-28 11:36:52 +080025#include <device/pci.h>
26#include <device/pci_ops.h>
zbao01bd79f2012-03-23 11:36:08 +080027
Dave Frodin9b800ae2014-06-11 13:15:56 -060028#if IS_ENABLED (CONFIG_SB800_IMC_FWM)
Martin Roth3316cf22012-12-05 16:22:54 -070029#include "SBPLATFORM.h"
30#include <vendorcode/amd/cimx/sb800/ECfan.h>
31
32static int bus_claimed = 0;
33#endif
34
Kyösti Mälkki11104952014-06-29 16:17:33 +030035#define AMD_SB_SPI_TX_LEN 8
36
Zheng Bao7bcffa52012-11-28 11:36:52 +080037static u32 spibar;
zbao01bd79f2012-03-23 11:36:08 +080038
Zheng Bao7bcffa52012-11-28 11:36:52 +080039static void reset_internal_fifo_pointer(void)
zbao01bd79f2012-03-23 11:36:08 +080040{
zbao01bd79f2012-03-23 11:36:08 +080041 do {
Zheng Bao7bcffa52012-11-28 11:36:52 +080042 write8(spibar + 2, read8(spibar + 2) | 0x10);
43 } while (read8(spibar + 0xD) & 0x7);
zbao01bd79f2012-03-23 11:36:08 +080044}
45
Zheng Bao7bcffa52012-11-28 11:36:52 +080046static void execute_command(void)
zbao01bd79f2012-03-23 11:36:08 +080047{
Zheng Bao7bcffa52012-11-28 11:36:52 +080048 write8(spibar + 2, read8(spibar + 2) | 1);
49
50 while ((read8(spibar + 2) & 1) && (read8(spibar+3) & 0x80));
zbao01bd79f2012-03-23 11:36:08 +080051}
52
Zheng Bao7bcffa52012-11-28 11:36:52 +080053void spi_init()
zbao01bd79f2012-03-23 11:36:08 +080054{
Zheng Bao7bcffa52012-11-28 11:36:52 +080055 device_t dev;
56
57 dev = dev_find_slot(0, PCI_DEVFN(0x14, 3));
58 spibar = pci_read_config32(dev, 0xA0) & ~0x1F;
zbao01bd79f2012-03-23 11:36:08 +080059}
60
Kyösti Mälkki11104952014-06-29 16:17:33 +030061unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len)
62{
63 return min(AMD_SB_SPI_TX_LEN - cmd_len, buf_len);
64}
65
Zheng Bao7bcffa52012-11-28 11:36:52 +080066int spi_xfer(struct spi_slave *slave, const void *dout,
Gabe Black93d9f922014-03-27 21:52:43 -070067 unsigned int bytesout, void *din, unsigned int bytesin)
zbao01bd79f2012-03-23 11:36:08 +080068{
Zheng Bao7bcffa52012-11-28 11:36:52 +080069 /* First byte is cmd which can not being sent through FIFO. */
70 u8 cmd = *(u8 *)dout++;
71 u8 readoffby1;
72 u8 readwrite;
Zheng Bao7bcffa52012-11-28 11:36:52 +080073 u8 count;
zbao01bd79f2012-03-23 11:36:08 +080074
Gabe Black93d9f922014-03-27 21:52:43 -070075 bytesout--;
zbao01bd79f2012-03-23 11:36:08 +080076
Zheng Bao7bcffa52012-11-28 11:36:52 +080077 readoffby1 = bytesout ? 0 : 1;
zbao01bd79f2012-03-23 11:36:08 +080078
Zheng Bao7bcffa52012-11-28 11:36:52 +080079 readwrite = (bytesin + readoffby1) << 4 | bytesout;
80 write8(spibar + 1, readwrite);
81 write8(spibar + 0, cmd);
zbao01bd79f2012-03-23 11:36:08 +080082
Zheng Bao7bcffa52012-11-28 11:36:52 +080083 reset_internal_fifo_pointer();
84 for (count = 0; count < bytesout; count++, dout++) {
85 write8(spibar + 0x0C, *(u8 *)dout);
zbao01bd79f2012-03-23 11:36:08 +080086 }
Zheng Bao7bcffa52012-11-28 11:36:52 +080087
88 reset_internal_fifo_pointer();
89 execute_command();
90
91 reset_internal_fifo_pointer();
92 /* Skip the bytes we sent. */
93 for (count = 0; count < bytesout; count++) {
94 cmd = read8(spibar + 0x0C);
95 }
96
97 reset_internal_fifo_pointer();
98 for (count = 0; count < bytesin; count++, din++) {
99 *(u8 *)din = read8(spibar + 0x0C);
100 }
101
102 return 0;
103}
Martin Roth3316cf22012-12-05 16:22:54 -0700104
Dave Frodin9b800ae2014-06-11 13:15:56 -0600105#if IS_ENABLED (CONFIG_SB800_IMC_FWM)
Martin Roth3316cf22012-12-05 16:22:54 -0700106
107static void ImcSleep(void)
108{
109 u8 cmd_val = 0x96; /* Kick off IMC Mailbox command 96 */
110 u8 reg0_val = 0; /* clear response register */
111 u8 reg1_val = 0xB4; /* request ownership flag */
112
113 WriteECmsg (MSG_REG0, AccWidthUint8, &reg0_val);
114 WriteECmsg (MSG_REG1, AccWidthUint8, &reg1_val);
115 WriteECmsg (MSG_SYS_TO_IMC, AccWidthUint8, &cmd_val);
116
117 WaitForEcLDN9MailboxCmdAck();
118}
119
120
121static void ImcWakeup(void)
122{
123 u8 cmd_val = 0x96; /* Kick off IMC Mailbox command 96 */
Idwer Volleringd26da9c2013-12-22 21:38:18 +0000124 u8 reg0_val = 0; /* clear response register */
Martin Roth3316cf22012-12-05 16:22:54 -0700125 u8 reg1_val = 0xB5; /* release ownership flag */
126
127 WriteECmsg (MSG_REG0, AccWidthUint8, &reg0_val);
128 WriteECmsg (MSG_REG1, AccWidthUint8, &reg1_val);
129 WriteECmsg (MSG_SYS_TO_IMC, AccWidthUint8, &cmd_val);
130
131 WaitForEcLDN9MailboxCmdAck();
132}
133#endif
134
Zheng Bao7bcffa52012-11-28 11:36:52 +0800135int spi_claim_bus(struct spi_slave *slave)
136{
Dave Frodin9b800ae2014-06-11 13:15:56 -0600137#if IS_ENABLED (CONFIG_SB800_IMC_FWM)
Martin Roth3316cf22012-12-05 16:22:54 -0700138
139 if (slave->rw == SPI_WRITE_FLAG) {
140 bus_claimed++;
141 if (bus_claimed == 1)
142 ImcSleep();
143 }
144#endif
145
Zheng Bao7bcffa52012-11-28 11:36:52 +0800146 return 0;
zbao01bd79f2012-03-23 11:36:08 +0800147}
148
Zheng Bao7bcffa52012-11-28 11:36:52 +0800149void spi_release_bus(struct spi_slave *slave)
zbao01bd79f2012-03-23 11:36:08 +0800150{
Dave Frodin9b800ae2014-06-11 13:15:56 -0600151#if IS_ENABLED (CONFIG_SB800_IMC_FWM)
Martin Roth3316cf22012-12-05 16:22:54 -0700152
153 if (slave->rw == SPI_WRITE_FLAG) {
154 bus_claimed--;
155 if (bus_claimed <= 0) {
156 bus_claimed = 0;
157 ImcWakeup();
158 }
159 }
160#endif
zbao01bd79f2012-03-23 11:36:08 +0800161}
162
Zheng Bao7bcffa52012-11-28 11:36:52 +0800163void spi_cs_activate(struct spi_slave *slave)
zbao01bd79f2012-03-23 11:36:08 +0800164{
Zheng Bao7bcffa52012-11-28 11:36:52 +0800165}
166
167void spi_cs_deactivate(struct spi_slave *slave)
168{
169}
170
Gabe Black1e187352014-03-27 20:37:03 -0700171struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
Zheng Bao7bcffa52012-11-28 11:36:52 +0800172{
173 struct spi_slave *slave = malloc(sizeof(*slave));
174
175 if (!slave) {
176 return NULL;
177 }
178
179 memset(slave, 0, sizeof(*slave));
180
181 return slave;
zbao01bd79f2012-03-23 11:36:08 +0800182}