Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2007 AMD |
| 5 | * (Written by Yinghai Lu <yinghailu@amd.com> for AMD) |
| 6 | * Copyright (C) 2007 Philipp Degler <pdegler@rumms.uni-mannheim.de> |
| 7 | * (Thanks to LSRA University of Mannheim for their support) |
| 8 | * Copyright (C) 2008 Jonathan A. Kollasch <jakllsch@kollasch.net> |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; either version 2 of the License, or |
| 13 | * (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
Paul Menzel | a46a712 | 2013-02-23 18:37:27 +0100 | [diff] [blame] | 22 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 23 | */ |
| 24 | |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 25 | #include <stdint.h> |
Patrick Georgi | 12aba82 | 2009-04-30 07:07:22 +0000 | [diff] [blame] | 26 | #include <string.h> |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 27 | #include <device/pci_def.h> |
| 28 | #include <arch/io.h> |
| 29 | #include <device/pnp_def.h> |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 30 | #include <cpu/x86/lapic.h> |
Edwin Beasant | eb50c7d | 2010-07-06 21:05:04 +0000 | [diff] [blame] | 31 | #include <pc80/mc146818rtc.h> |
Kyösti Mälkki | c66f1cb | 2013-08-12 16:09:00 +0300 | [diff] [blame] | 32 | #include "cpu/x86/lapic.h" |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 33 | #include "northbridge/amd/amdk8/reset_test.c" |
Edward O'Callaghan | 0dd0669 | 2014-04-29 13:59:54 +1000 | [diff] [blame^] | 34 | #include <superio/winbond/common/winbond.h> |
Edward O'Callaghan | 4f5a525 | 2014-04-03 14:40:24 +1100 | [diff] [blame] | 35 | #include <superio/winbond/w83627thg/w83627thg.h> |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 36 | #include <cpu/amd/model_fxx_rev.h> |
Patrick Georgi | 12584e2 | 2010-05-08 09:14:51 +0000 | [diff] [blame] | 37 | #include <console/console.h> |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 38 | #include "northbridge/amd/amdk8/incoherent_ht.c" |
stepan | 836ae29 | 2010-12-08 05:42:47 +0000 | [diff] [blame] | 39 | #include "southbridge/nvidia/ck804/early_smbus.h" |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 40 | #include "northbridge/amd/amdk8/raminit.h" |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 41 | #include "lib/delay.c" |
| 42 | #include "northbridge/amd/amdk8/debug.c" |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 43 | #include "cpu/x86/bist.h" |
| 44 | #include "northbridge/amd/amdk8/setup_resource_map.c" |
| 45 | #include "northbridge/amd/amdk8/coherent_ht.c" |
| 46 | #include "cpu/amd/dualcore/dualcore.c" |
Uwe Hermann | 6dc92f0 | 2010-11-21 11:36:03 +0000 | [diff] [blame] | 47 | #include <spd.h> |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 48 | |
Jonathan A. Kollasch | 0df0e14 | 2011-08-01 14:24:02 -0500 | [diff] [blame] | 49 | #if CONFIG_HAVE_OPTION_TABLE |
| 50 | #include "option_table.h" |
| 51 | #endif |
| 52 | |
Uwe Hermann | 57b2ff8 | 2010-11-21 17:29:59 +0000 | [diff] [blame] | 53 | #define SERIAL_DEV PNP_DEV(0x4e, W83627THG_SP1) |
| 54 | |
Uwe Hermann | 7b99705 | 2010-11-21 22:47:22 +0000 | [diff] [blame] | 55 | static void memreset(int controllers, const struct mem_controller *ctrl) { } |
| 56 | static void activate_spd_rom(const struct mem_controller *ctrl) { } |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 57 | |
| 58 | static inline int spd_read_byte(unsigned device, unsigned address) |
| 59 | { |
| 60 | return smbus_read_byte(device, address); |
| 61 | } |
| 62 | |
| 63 | #include "northbridge/amd/amdk8/raminit.c" |
Stefan Reinauer | c13093b | 2009-09-23 18:51:03 +0000 | [diff] [blame] | 64 | #include "lib/generic_sdram.c" |
stepan | 836ae29 | 2010-12-08 05:42:47 +0000 | [diff] [blame] | 65 | #include "southbridge/nvidia/ck804/early_setup_ss.h" |
| 66 | #include "southbridge/nvidia/ck804/early_setup_car.c" |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 67 | #include "cpu/amd/model_fxx/init_cpus.c" |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 68 | #include "northbridge/amd/amdk8/early_ht.c" |
| 69 | |
Jonathan A. Kollasch | 0df0e14 | 2011-08-01 14:24:02 -0500 | [diff] [blame] | 70 | static void ms7135_set_ram_voltage(void) |
| 71 | { |
| 72 | u8 b; |
| 73 | b = read_option(ram_voltage, 0); |
| 74 | if (b > 4) /* default if above 2.70v */ |
| 75 | b = 0; |
| 76 | printk(BIOS_INFO, "setting RAM voltage %08x\n", b); |
| 77 | ck804_smbus_write_byte(1, 0x2f, 0x00, b); |
| 78 | } |
| 79 | |
| 80 | static void ms7135_set_nf4_voltage(void) |
| 81 | { |
| 82 | u8 b; |
| 83 | b = read_option(nf4_voltage, 0); |
| 84 | if (b > 2) /* default if above 1.60v */ |
| 85 | b = 0; |
| 86 | b |= 0x10; |
| 87 | printk(BIOS_INFO, "setting NF4 voltage %08x\n", b); |
| 88 | ck804_smbus_write_byte(1, 0x2f, 0x02, b); |
| 89 | } |
| 90 | |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 91 | static void sio_setup(void) |
| 92 | { |
Jonathan A. Kollasch | c2ffc67 | 2011-08-01 14:15:28 -0500 | [diff] [blame] | 93 | u32 dword; |
| 94 | u8 byte; |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 95 | |
| 96 | /* Subject decoding */ |
| 97 | byte = pci_read_config8(PCI_DEV(0, CK804_DEVN_BASE + 1, 0), 0x7b); |
| 98 | byte |= 0x20; |
| 99 | pci_write_config8(PCI_DEV(0, CK804_DEVN_BASE + 1, 0), 0x7b, byte); |
| 100 | |
| 101 | /* LPC Positive Decode 0 */ |
| 102 | dword = pci_read_config32(PCI_DEV(0, CK804_DEVN_BASE + 1, 0), 0xa0); |
| 103 | /* Serial 0, Serial 1 */ |
| 104 | dword |= (1 << 0) | (1 << 1); |
| 105 | pci_write_config32(PCI_DEV(0, CK804_DEVN_BASE + 1, 0), 0xa0, dword); |
| 106 | } |
| 107 | |
Patrick Georgi | ce6fb1e | 2010-03-17 22:44:39 +0000 | [diff] [blame] | 108 | void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 109 | { |
Jonathan A. Kollasch | c2ffc67 | 2011-08-01 14:15:28 -0500 | [diff] [blame] | 110 | static const u16 spd_addr[] = { |
Uwe Hermann | 6dc92f0 | 2010-11-21 11:36:03 +0000 | [diff] [blame] | 111 | DIMM0, DIMM1, 0, 0, |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 112 | 0, 0, 0, 0, |
| 113 | 0, 0, 0, 0, |
| 114 | 0, 0, 0, 0, |
| 115 | }; |
| 116 | |
| 117 | int needs_reset; |
Uwe Hermann | 7b99705 | 2010-11-21 22:47:22 +0000 | [diff] [blame] | 118 | unsigned bsp_apicid = 0, nodes; |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 119 | struct mem_controller ctrl[8]; |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 120 | |
Patrick Georgi | 2bd9100 | 2010-03-18 16:46:50 +0000 | [diff] [blame] | 121 | if (!cpu_init_detectedx && boot_cpu()) { |
Patrick Georgi | ce6fb1e | 2010-03-17 22:44:39 +0000 | [diff] [blame] | 122 | /* Nothing special needs to be done to find bus 0 */ |
| 123 | /* Allow the HT devices to be found */ |
| 124 | enumerate_ht_chain(); |
Patrick Georgi | ce6fb1e | 2010-03-17 22:44:39 +0000 | [diff] [blame] | 125 | sio_setup(); |
Patrick Georgi | ce6fb1e | 2010-03-17 22:44:39 +0000 | [diff] [blame] | 126 | } |
| 127 | |
Uwe Hermann | 7b99705 | 2010-11-21 22:47:22 +0000 | [diff] [blame] | 128 | if (bist == 0) |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 129 | bsp_apicid = init_cpus(cpu_init_detectedx); |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 130 | |
Edward O'Callaghan | 0dd0669 | 2014-04-29 13:59:54 +1000 | [diff] [blame^] | 131 | winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 132 | console_init(); |
| 133 | |
| 134 | /* Halt if there was a built in self test failure */ |
| 135 | report_bist_failure(bist); |
| 136 | |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 137 | needs_reset = setup_coherent_ht_domain(); |
| 138 | |
| 139 | wait_all_core0_started(); |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 140 | #if CONFIG_LOGICAL_CPUS |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 141 | // It is said that we should start core1 after all core0 launched |
| 142 | start_other_cores(); |
| 143 | wait_all_other_cores_started(bsp_apicid); |
| 144 | #endif |
| 145 | |
| 146 | needs_reset |= ht_setup_chains_x(); |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 147 | needs_reset |= ck804_early_setup_x(); |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 148 | if (needs_reset) { |
Stefan Reinauer | 64ed2b7 | 2010-03-31 14:47:43 +0000 | [diff] [blame] | 149 | print_info("ht reset -\n"); |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 150 | soft_reset(); |
| 151 | } |
| 152 | |
| 153 | allow_all_aps_stop(bsp_apicid); |
| 154 | |
| 155 | nodes = get_nodes(); |
| 156 | //It's the time to set ctrl now; |
| 157 | fill_mem_ctrl(nodes, ctrl, spd_addr); |
| 158 | |
| 159 | enable_smbus(); |
| 160 | |
Jonathan A. Kollasch | 0df0e14 | 2011-08-01 14:24:02 -0500 | [diff] [blame] | 161 | ms7135_set_nf4_voltage(); |
| 162 | ms7135_set_ram_voltage(); |
| 163 | |
Jonathan A. Kollasch | 8e9f156 | 2011-08-03 13:56:24 -0500 | [diff] [blame] | 164 | #if CONFIG_DEBUG_SMBUS |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 165 | dump_spd_registers(&ctrl[0]); |
| 166 | dump_smbus_registers(); |
| 167 | #endif |
| 168 | |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 169 | sdram_initialize(nodes, ctrl); |
| 170 | |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 171 | post_cache_as_ram(); |
| 172 | } |