Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2007 AMD |
| 5 | * (Written by Yinghai Lu <yinghailu@amd.com> for AMD) |
| 6 | * Copyright (C) 2007 Philipp Degler <pdegler@rumms.uni-mannheim.de> |
| 7 | * (Thanks to LSRA University of Mannheim for their support) |
| 8 | * Copyright (C) 2008 Jonathan A. Kollasch <jakllsch@kollasch.net> |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; either version 2 of the License, or |
| 13 | * (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 23 | */ |
| 24 | |
| 25 | #define ASSEMBLY 1 |
Myles Watson | 1d6d45e | 2009-11-06 17:02:51 +0000 | [diff] [blame] | 26 | #define __PRE_RAM__ |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 27 | |
Jonathan A. Kollasch | 4f91417 | 2008-05-06 13:26:32 +0000 | [diff] [blame] | 28 | #define SERIAL_DEV PNP_DEV(0x4e, W83627HF_SP1) |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 29 | |
| 30 | /* Used by raminit. */ |
| 31 | #define QRANK_DIMM_SUPPORT 1 |
| 32 | |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 33 | #if CONFIG_LOGICAL_CPUS == 1 |
| 34 | #define SET_NB_CFG_54 1 |
| 35 | #endif |
| 36 | |
| 37 | #include <stdint.h> |
Patrick Georgi | 12aba82 | 2009-04-30 07:07:22 +0000 | [diff] [blame] | 38 | #include <string.h> |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 39 | #include <device/pci_def.h> |
| 40 | #include <arch/io.h> |
| 41 | #include <device/pnp_def.h> |
| 42 | #include <arch/romcc_io.h> |
| 43 | #include <cpu/x86/lapic.h> |
| 44 | #include "option_table.h" |
| 45 | #include "pc80/mc146818rtc_early.c" |
| 46 | #include "cpu/x86/lapic/boot_cpu.c" |
| 47 | #include "northbridge/amd/amdk8/reset_test.c" |
| 48 | #include "superio/winbond/w83627hf/w83627hf_early_serial.c" |
| 49 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 50 | #if CONFIG_USE_FAILOVER_IMAGE == 0 |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 51 | |
| 52 | /* Used by ck804_early_setup(). */ |
| 53 | #define CK804_NUM 1 |
| 54 | #define CK804_USE_NIC 1 |
| 55 | #define CK804_USE_ACI 1 |
| 56 | |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 57 | #include <cpu/amd/model_fxx_rev.h> |
| 58 | #include "pc80/serial.c" |
| 59 | #include "arch/i386/lib/console.c" |
Stefan Reinauer | c13093b | 2009-09-23 18:51:03 +0000 | [diff] [blame] | 60 | #include "lib/ramtest.c" |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 61 | #include "northbridge/amd/amdk8/incoherent_ht.c" |
| 62 | #include "southbridge/nvidia/ck804/ck804_early_smbus.c" |
| 63 | #include "northbridge/amd/amdk8/raminit.h" |
| 64 | #include "cpu/amd/model_fxx/apic_timer.c" |
| 65 | #include "lib/delay.c" |
| 66 | #include "northbridge/amd/amdk8/debug.c" |
| 67 | #include "cpu/amd/mtrr/amd_earlymtrr.c" |
| 68 | #include "cpu/x86/bist.h" |
| 69 | #include "northbridge/amd/amdk8/setup_resource_map.c" |
| 70 | #include "northbridge/amd/amdk8/coherent_ht.c" |
| 71 | #include "cpu/amd/dualcore/dualcore.c" |
| 72 | |
| 73 | static void memreset_setup(void) |
| 74 | { |
| 75 | /* FIXME: Nothing to do? */ |
| 76 | } |
| 77 | |
| 78 | static void memreset(int controllers, const struct mem_controller *ctrl) |
| 79 | { |
| 80 | /* FIXME: Nothing to do? */ |
| 81 | } |
| 82 | |
| 83 | static inline void activate_spd_rom(const struct mem_controller *ctrl) |
| 84 | { |
| 85 | /* FIXME: Nothing to do? */ |
| 86 | } |
| 87 | |
| 88 | static inline int spd_read_byte(unsigned device, unsigned address) |
| 89 | { |
| 90 | return smbus_read_byte(device, address); |
| 91 | } |
| 92 | |
| 93 | #include "northbridge/amd/amdk8/raminit.c" |
Stefan Reinauer | c13093b | 2009-09-23 18:51:03 +0000 | [diff] [blame] | 94 | #include "lib/generic_sdram.c" |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 95 | #include "southbridge/nvidia/ck804/ck804_early_setup_ss.h" |
| 96 | #include "southbridge/nvidia/ck804/ck804_early_setup_car.c" |
| 97 | #include "cpu/amd/car/copy_and_run.c" |
| 98 | #include "cpu/amd/car/post_cache_as_ram.c" |
| 99 | #include "cpu/amd/model_fxx/init_cpus.c" |
| 100 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 101 | #endif /* CONFIG_USE_FAILOVER_IMAGE */ |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 102 | |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 103 | #include "southbridge/nvidia/ck804/ck804_enable_rom.c" |
| 104 | #include "northbridge/amd/amdk8/early_ht.c" |
| 105 | |
| 106 | static void sio_setup(void) |
| 107 | { |
| 108 | unsigned value; |
| 109 | uint32_t dword; |
| 110 | uint8_t byte; |
| 111 | |
| 112 | /* Subject decoding */ |
| 113 | byte = pci_read_config8(PCI_DEV(0, CK804_DEVN_BASE + 1, 0), 0x7b); |
| 114 | byte |= 0x20; |
| 115 | pci_write_config8(PCI_DEV(0, CK804_DEVN_BASE + 1, 0), 0x7b, byte); |
| 116 | |
| 117 | /* LPC Positive Decode 0 */ |
| 118 | dword = pci_read_config32(PCI_DEV(0, CK804_DEVN_BASE + 1, 0), 0xa0); |
| 119 | /* Serial 0, Serial 1 */ |
| 120 | dword |= (1 << 0) | (1 << 1); |
| 121 | pci_write_config32(PCI_DEV(0, CK804_DEVN_BASE + 1, 0), 0xa0, dword); |
| 122 | } |
| 123 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 124 | #if CONFIG_USE_FAILOVER_IMAGE == 0 |
Patrick Georgi | ce6fb1e | 2010-03-17 22:44:39 +0000 | [diff] [blame] | 125 | void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 126 | { |
| 127 | static const uint16_t spd_addr[] = { |
| 128 | (0xa << 3) | 0, (0xa << 3) | 1, 0, 0, |
| 129 | 0, 0, 0, 0, |
| 130 | 0, 0, 0, 0, |
| 131 | 0, 0, 0, 0, |
| 132 | }; |
| 133 | |
| 134 | int needs_reset; |
| 135 | unsigned bsp_apicid = 0; |
| 136 | |
| 137 | struct mem_controller ctrl[8]; |
| 138 | unsigned nodes; |
| 139 | |
Patrick Georgi | 2bd9100 | 2010-03-18 16:46:50 +0000 | [diff] [blame^] | 140 | if (!cpu_init_detectedx && boot_cpu()) { |
Patrick Georgi | ce6fb1e | 2010-03-17 22:44:39 +0000 | [diff] [blame] | 141 | /* Nothing special needs to be done to find bus 0 */ |
| 142 | /* Allow the HT devices to be found */ |
| 143 | enumerate_ht_chain(); |
| 144 | |
| 145 | sio_setup(); |
| 146 | |
| 147 | /* Setup the ck804 */ |
| 148 | ck804_enable_rom(); |
| 149 | } |
| 150 | |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 151 | if (bist == 0) { |
| 152 | bsp_apicid = init_cpus(cpu_init_detectedx); |
| 153 | } |
| 154 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 155 | w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); |
Jonathan A. Kollasch | 8eff1e3 | 2008-02-20 15:59:30 +0000 | [diff] [blame] | 156 | uart_init(); |
| 157 | console_init(); |
| 158 | |
| 159 | /* Halt if there was a built in self test failure */ |
| 160 | report_bist_failure(bist); |
| 161 | |
| 162 | #if 0 |
| 163 | dump_pci_device(PCI_DEV(0, 0x18, 0)); |
| 164 | #endif |
| 165 | |
| 166 | needs_reset = setup_coherent_ht_domain(); |
| 167 | |
| 168 | wait_all_core0_started(); |
| 169 | #if CONFIG_LOGICAL_CPUS==1 |
| 170 | // It is said that we should start core1 after all core0 launched |
| 171 | start_other_cores(); |
| 172 | wait_all_other_cores_started(bsp_apicid); |
| 173 | #endif |
| 174 | |
| 175 | needs_reset |= ht_setup_chains_x(); |
| 176 | |
| 177 | needs_reset |= ck804_early_setup_x(); |
| 178 | |
| 179 | if (needs_reset) { |
| 180 | print_info("ht reset -\r\n"); |
| 181 | soft_reset(); |
| 182 | } |
| 183 | |
| 184 | allow_all_aps_stop(bsp_apicid); |
| 185 | |
| 186 | nodes = get_nodes(); |
| 187 | //It's the time to set ctrl now; |
| 188 | fill_mem_ctrl(nodes, ctrl, spd_addr); |
| 189 | |
| 190 | enable_smbus(); |
| 191 | |
| 192 | #if 0 |
| 193 | dump_spd_registers(&ctrl[0]); |
| 194 | dump_smbus_registers(); |
| 195 | #endif |
| 196 | |
| 197 | memreset_setup(); |
| 198 | sdram_initialize(nodes, ctrl); |
| 199 | |
| 200 | #if 0 |
| 201 | print_pci_devices(); |
| 202 | dump_pci_devices(); |
| 203 | #endif |
| 204 | |
| 205 | post_cache_as_ram(); |
| 206 | } |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 207 | #endif /* CONFIG_USE_FAILOVER_IMAGE */ |