Angel Pons | f23ae0b | 2020-04-02 23:48:12 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 2 | |
Stefan Reinauer | 3f8989e | 2012-04-25 22:58:23 +0200 | [diff] [blame] | 3 | /* Microcode update for Intel PIII and later CPUs */ |
| 4 | |
Elyes Haouas | deb5645 | 2022-10-07 10:06:25 +0200 | [diff] [blame] | 5 | #include <cbfs.h> |
Kyösti Mälkki | 92bb832 | 2019-09-24 22:40:43 +0300 | [diff] [blame] | 6 | #include <console/console.h> |
Elyes Haouas | ad65e8c | 2022-10-31 14:02:13 +0100 | [diff] [blame] | 7 | #include <cpu/cpu.h> |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 8 | #include <cpu/intel/microcode.h> |
Elyes Haouas | deb5645 | 2022-10-07 10:06:25 +0200 | [diff] [blame] | 9 | #include <cpu/x86/msr.h> |
Stefan Reinauer | a42e2f4 | 2012-10-15 13:18:06 -0700 | [diff] [blame] | 10 | #include <smp/spinlock.h> |
Subrata Banik | 3c1b7b4 | 2023-05-20 16:28:18 +0530 | [diff] [blame] | 11 | #include <stdio.h> |
Elyes Haouas | deb5645 | 2022-10-07 10:06:25 +0200 | [diff] [blame] | 12 | #include <types.h> |
Kyösti Mälkki | 89c0ef7 | 2019-09-24 08:56:36 +0300 | [diff] [blame] | 13 | |
Stefan Reinauer | a42e2f4 | 2012-10-15 13:18:06 -0700 | [diff] [blame] | 14 | DECLARE_SPIN_LOCK(microcode_lock) |
Vadim Bendebury | 537b4e0 | 2012-06-19 12:56:57 -0700 | [diff] [blame] | 15 | |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 16 | struct microcode { |
Stefan Reinauer | c8f8a6c | 2010-05-26 12:53:43 +0000 | [diff] [blame] | 17 | u32 hdrver; /* Header Version */ |
Stefan Reinauer | 3f8989e | 2012-04-25 22:58:23 +0200 | [diff] [blame] | 18 | u32 rev; /* Update Revision */ |
| 19 | u32 date; /* Date */ |
| 20 | u32 sig; /* Processor Signature */ |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 21 | |
Stefan Reinauer | 3f8989e | 2012-04-25 22:58:23 +0200 | [diff] [blame] | 22 | u32 cksum; /* Checksum */ |
| 23 | u32 ldrver; /* Loader Revision */ |
| 24 | u32 pf; /* Processor Flags */ |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 25 | |
Stefan Reinauer | 3f8989e | 2012-04-25 22:58:23 +0200 | [diff] [blame] | 26 | u32 data_size; /* Data Size */ |
| 27 | u32 total_size; /* Total Size */ |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 28 | |
Stefan Reinauer | c8f8a6c | 2010-05-26 12:53:43 +0000 | [diff] [blame] | 29 | u32 reserved[3]; |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 30 | }; |
| 31 | |
Rizwan Qureshi | 1aa60a9 | 2021-05-20 21:05:03 +0530 | [diff] [blame] | 32 | struct ext_sig_table { |
| 33 | u32 ext_sig_cnt; |
| 34 | u32 ext_tbl_chksm; |
| 35 | u32 res[3]; |
| 36 | }; |
| 37 | |
| 38 | struct ext_sig_entry { |
| 39 | u32 sig; |
| 40 | u32 pf; |
| 41 | u32 chksm; |
| 42 | }; |
| 43 | |
Stefan Reinauer | c8f8a6c | 2010-05-26 12:53:43 +0000 | [diff] [blame] | 44 | static inline u32 read_microcode_rev(void) |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 45 | { |
Stefan Reinauer | 3f8989e | 2012-04-25 22:58:23 +0200 | [diff] [blame] | 46 | /* Some Intel CPUs can be very finicky about the |
Stefan Reinauer | c8f8a6c | 2010-05-26 12:53:43 +0000 | [diff] [blame] | 47 | * CPUID sequence used. So this is implemented in |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 48 | * assembly so that it works reliably. |
| 49 | */ |
| 50 | msr_t msr; |
Stefan Reinauer | 3f8989e | 2012-04-25 22:58:23 +0200 | [diff] [blame] | 51 | asm volatile ( |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 52 | "xorl %%eax, %%eax\n\t" |
| 53 | "xorl %%edx, %%edx\n\t" |
| 54 | "movl $0x8b, %%ecx\n\t" |
| 55 | "wrmsr\n\t" |
| 56 | "movl $0x01, %%eax\n\t" |
| 57 | "cpuid\n\t" |
| 58 | "movl $0x08b, %%ecx\n\t" |
Elyes HAOUAS | 7c8d74c | 2016-08-23 21:41:43 +0200 | [diff] [blame] | 59 | "rdmsr\n\t" |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 60 | : /* outputs */ |
| 61 | "=a" (msr.lo), "=d" (msr.hi) |
| 62 | : /* inputs */ |
| 63 | : /* trashed */ |
Stefan Reinauer | 3b5a9ed | 2012-05-02 16:41:55 -0700 | [diff] [blame] | 64 | "ebx", "ecx" |
Stefan Reinauer | c8f8a6c | 2010-05-26 12:53:43 +0000 | [diff] [blame] | 65 | ); |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 66 | return msr.hi; |
| 67 | } |
| 68 | |
Aaron Durbin | 98ffb42 | 2013-01-15 15:15:32 -0600 | [diff] [blame] | 69 | #define MICROCODE_CBFS_FILE "cpu_microcode_blob.bin" |
| 70 | |
Subrata Banik | 7734af8 | 2022-06-20 08:10:39 +0000 | [diff] [blame] | 71 | static int load_microcode(const struct microcode *ucode_patch) |
Aaron Durbin | 98ffb42 | 2013-01-15 15:15:32 -0600 | [diff] [blame] | 72 | { |
| 73 | u32 current_rev; |
| 74 | msr_t msr; |
Subrata Banik | 7734af8 | 2022-06-20 08:10:39 +0000 | [diff] [blame] | 75 | |
| 76 | msr.lo = (unsigned long)ucode_patch + sizeof(struct microcode); |
| 77 | msr.hi = 0; |
| 78 | wrmsr(IA32_BIOS_UPDT_TRIG, msr); |
| 79 | |
| 80 | current_rev = read_microcode_rev(); |
| 81 | if (current_rev == ucode_patch->rev) { |
| 82 | printk(BIOS_INFO, "microcode: updated to revision " |
| 83 | "0x%x date=%04x-%02x-%02x\n", read_microcode_rev(), |
| 84 | ucode_patch->date & 0xffff, (ucode_patch->date >> 24) & 0xff, |
| 85 | (ucode_patch->date >> 16) & 0xff); |
| 86 | return 0; |
| 87 | } |
| 88 | |
| 89 | return -1; |
| 90 | } |
| 91 | |
| 92 | void intel_microcode_load_unlocked(const void *microcode_patch) |
| 93 | { |
| 94 | u32 current_rev; |
Aaron Durbin | 98ffb42 | 2013-01-15 15:15:32 -0600 | [diff] [blame] | 95 | const struct microcode *m = microcode_patch; |
| 96 | |
Subrata Banik | 347f5c3 | 2022-06-21 12:54:03 +0530 | [diff] [blame] | 97 | if (!m) { |
Subrata Banik | 508c290 | 2022-06-22 20:35:32 +0530 | [diff] [blame] | 98 | printk(BIOS_WARNING, "microcode: failed because no ucode was found\n"); |
Aaron Durbin | 98ffb42 | 2013-01-15 15:15:32 -0600 | [diff] [blame] | 99 | return; |
Subrata Banik | 347f5c3 | 2022-06-21 12:54:03 +0530 | [diff] [blame] | 100 | } |
Aaron Durbin | 98ffb42 | 2013-01-15 15:15:32 -0600 | [diff] [blame] | 101 | |
| 102 | current_rev = read_microcode_rev(); |
| 103 | |
Subrata Banik | 56d3103f | 2022-06-15 21:03:42 +0530 | [diff] [blame] | 104 | /* No use loading the same revision. */ |
| 105 | if (current_rev == m->rev) { |
Philipp Deppenwiese | b251c02 | 2018-11-27 14:02:15 +0100 | [diff] [blame] | 106 | printk(BIOS_INFO, "microcode: Update skipped, already up-to-date\n"); |
Aaron Durbin | 98ffb42 | 2013-01-15 15:15:32 -0600 | [diff] [blame] | 107 | return; |
Philipp Deppenwiese | b251c02 | 2018-11-27 14:02:15 +0100 | [diff] [blame] | 108 | } |
Aaron Durbin | 98ffb42 | 2013-01-15 15:15:32 -0600 | [diff] [blame] | 109 | |
Rizwan Qureshi | 30b755b | 2015-07-23 22:31:51 +0530 | [diff] [blame] | 110 | #if ENV_RAMSTAGE |
| 111 | /*SoC specific check to update microcode*/ |
| 112 | if (soc_skip_ucode_update(current_rev, m->rev)) { |
| 113 | printk(BIOS_DEBUG, "Skip microcode update\n"); |
| 114 | return; |
| 115 | } |
| 116 | #endif |
| 117 | |
Subrata Banik | 7734af8 | 2022-06-20 08:10:39 +0000 | [diff] [blame] | 118 | printk(BIOS_INFO, "microcode: load microcode patch\n"); |
| 119 | if (load_microcode(m) < 0) |
| 120 | printk(BIOS_ERR, "microcode: Update failed\n"); |
Aaron Durbin | 98ffb42 | 2013-01-15 15:15:32 -0600 | [diff] [blame] | 121 | } |
| 122 | |
Rizwan Qureshi | 0d39157 | 2018-07-02 21:12:40 +0530 | [diff] [blame] | 123 | uint32_t get_current_microcode_rev(void) |
| 124 | { |
| 125 | return read_microcode_rev(); |
| 126 | } |
| 127 | |
| 128 | uint32_t get_microcode_rev(const void *microcode) |
| 129 | { |
| 130 | return ((struct microcode *)microcode)->rev; |
| 131 | } |
| 132 | |
| 133 | uint32_t get_microcode_size(const void *microcode) |
| 134 | { |
| 135 | return ((struct microcode *)microcode)->total_size; |
| 136 | } |
| 137 | |
| 138 | uint32_t get_microcode_checksum(const void *microcode) |
| 139 | { |
| 140 | return ((struct microcode *)microcode)->cksum; |
| 141 | } |
| 142 | |
Rizwan Qureshi | 1aa60a9 | 2021-05-20 21:05:03 +0530 | [diff] [blame] | 143 | |
| 144 | static struct ext_sig_table *ucode_get_ext_sig_table(const struct microcode *ucode) |
| 145 | { |
| 146 | struct ext_sig_table *ext_tbl; |
| 147 | /* header + ucode data blob size */ |
| 148 | u32 size = ucode->data_size + sizeof(struct microcode); |
| 149 | |
Tim Wawrzynczak | 6db9dcc | 2021-07-07 13:47:47 -0600 | [diff] [blame] | 150 | ssize_t ext_tbl_len = ucode->total_size - size; |
Rizwan Qureshi | 1aa60a9 | 2021-05-20 21:05:03 +0530 | [diff] [blame] | 151 | |
Tim Wawrzynczak | 6db9dcc | 2021-07-07 13:47:47 -0600 | [diff] [blame] | 152 | if (ext_tbl_len < (ssize_t)sizeof(struct ext_sig_table)) |
Rizwan Qureshi | 1aa60a9 | 2021-05-20 21:05:03 +0530 | [diff] [blame] | 153 | return NULL; |
| 154 | |
| 155 | ext_tbl = (struct ext_sig_table *)((uintptr_t)ucode + size); |
| 156 | |
| 157 | if (ext_tbl_len < (sizeof(struct ext_sig_table) + |
| 158 | ext_tbl->ext_sig_cnt * sizeof(struct ext_sig_entry))) |
| 159 | return NULL; |
| 160 | |
| 161 | return ext_tbl; |
| 162 | } |
| 163 | |
Furquan Shaikh | f14c05f | 2021-03-08 22:08:42 -0800 | [diff] [blame] | 164 | static const void *find_cbfs_microcode(void) |
Aaron Durbin | 98ffb42 | 2013-01-15 15:15:32 -0600 | [diff] [blame] | 165 | { |
Furquan Shaikh | f14c05f | 2021-03-08 22:08:42 -0800 | [diff] [blame] | 166 | const struct microcode *ucode_updates; |
Rizwan Qureshi | 1aa60a9 | 2021-05-20 21:05:03 +0530 | [diff] [blame] | 167 | struct ext_sig_table *ext_tbl; |
Aaron Durbin | 899d13d | 2015-05-15 23:39:23 -0500 | [diff] [blame] | 168 | size_t microcode_len; |
| 169 | u32 eax; |
Alexandru Gagniuc | b1ae030 | 2013-12-08 16:30:07 -0600 | [diff] [blame] | 170 | u32 pf, rev, sig, update_size; |
Aaron Durbin | 98ffb42 | 2013-01-15 15:15:32 -0600 | [diff] [blame] | 171 | msr_t msr; |
Arthur Heymans | 9daf5f07 | 2021-01-22 19:05:16 +0100 | [diff] [blame] | 172 | struct cpuinfo_x86 c; |
Aaron Durbin | 98ffb42 | 2013-01-15 15:15:32 -0600 | [diff] [blame] | 173 | |
Arthur Heymans | 9daf5f07 | 2021-01-22 19:05:16 +0100 | [diff] [blame] | 174 | rev = read_microcode_rev(); |
Aaron Durbin | 98ffb42 | 2013-01-15 15:15:32 -0600 | [diff] [blame] | 175 | eax = cpuid_eax(1); |
Arthur Heymans | 9daf5f07 | 2021-01-22 19:05:16 +0100 | [diff] [blame] | 176 | get_fms(&c, eax); |
Aaron Durbin | 98ffb42 | 2013-01-15 15:15:32 -0600 | [diff] [blame] | 177 | sig = eax; |
| 178 | |
| 179 | pf = 0; |
Arthur Heymans | 9daf5f07 | 2021-01-22 19:05:16 +0100 | [diff] [blame] | 180 | if ((c.x86_model >= 5) || (c.x86 > 6)) { |
Elyes HAOUAS | 603963e | 2018-09-28 09:06:43 +0200 | [diff] [blame] | 181 | msr = rdmsr(IA32_PLATFORM_ID); |
Aaron Durbin | 98ffb42 | 2013-01-15 15:15:32 -0600 | [diff] [blame] | 182 | pf = 1 << ((msr.hi >> 18) & 7); |
| 183 | } |
Kyösti Mälkki | 92bb832 | 2019-09-24 22:40:43 +0300 | [diff] [blame] | 184 | |
Aaron Durbin | 98ffb42 | 2013-01-15 15:15:32 -0600 | [diff] [blame] | 185 | printk(BIOS_DEBUG, "microcode: sig=0x%x pf=0x%x revision=0x%x\n", |
| 186 | sig, pf, rev); |
Aaron Durbin | 98ffb42 | 2013-01-15 15:15:32 -0600 | [diff] [blame] | 187 | |
Subrata Banik | 3c1b7b4 | 2023-05-20 16:28:18 +0530 | [diff] [blame] | 188 | if (CONFIG(CPU_INTEL_MICROCODE_CBFS_SPLIT_BINS)) { |
| 189 | char cbfs_filename[25]; |
| 190 | snprintf(cbfs_filename, sizeof(cbfs_filename), "cpu_microcode_%x.bin", sig); |
| 191 | ucode_updates = cbfs_map(cbfs_filename, µcode_len); |
| 192 | } else { |
| 193 | ucode_updates = cbfs_map(MICROCODE_CBFS_FILE, µcode_len); |
| 194 | } |
| 195 | if (ucode_updates == NULL) |
| 196 | return NULL; |
| 197 | |
Aaron Durbin | e676767 | 2014-01-27 15:52:47 -0600 | [diff] [blame] | 198 | while (microcode_len >= sizeof(*ucode_updates)) { |
Alexandru Gagniuc | b1ae030 | 2013-12-08 16:30:07 -0600 | [diff] [blame] | 199 | /* Newer microcode updates include a size field, whereas older |
| 200 | * containers set it at 0 and are exactly 2048 bytes long */ |
Aaron Durbin | e676767 | 2014-01-27 15:52:47 -0600 | [diff] [blame] | 201 | if (ucode_updates->total_size) { |
| 202 | update_size = ucode_updates->total_size; |
Alexandru Gagniuc | b1ae030 | 2013-12-08 16:30:07 -0600 | [diff] [blame] | 203 | } else { |
Alexandru Gagniuc | 2c38f50 | 2013-12-06 23:14:54 -0600 | [diff] [blame] | 204 | printk(BIOS_SPEW, "Microcode size field is 0\n"); |
Alexandru Gagniuc | b1ae030 | 2013-12-08 16:30:07 -0600 | [diff] [blame] | 205 | update_size = 2048; |
| 206 | } |
| 207 | |
| 208 | /* Checkpoint 1: The microcode update falls within CBFS */ |
Elyes HAOUAS | cbe7464c | 2016-08-23 21:07:28 +0200 | [diff] [blame] | 209 | if (update_size > microcode_len) { |
Alexandru Gagniuc | b1ae030 | 2013-12-08 16:30:07 -0600 | [diff] [blame] | 210 | printk(BIOS_WARNING, "Microcode header corrupted!\n"); |
Alexandru Gagniuc | b1ae030 | 2013-12-08 16:30:07 -0600 | [diff] [blame] | 211 | break; |
| 212 | } |
| 213 | |
Aaron Durbin | e676767 | 2014-01-27 15:52:47 -0600 | [diff] [blame] | 214 | if ((ucode_updates->sig == sig) && (ucode_updates->pf & pf)) |
| 215 | return ucode_updates; |
Aaron Durbin | 98ffb42 | 2013-01-15 15:15:32 -0600 | [diff] [blame] | 216 | |
Rizwan Qureshi | 1aa60a9 | 2021-05-20 21:05:03 +0530 | [diff] [blame] | 217 | |
| 218 | /* Check if there is extended signature table */ |
| 219 | ext_tbl = ucode_get_ext_sig_table(ucode_updates); |
| 220 | |
| 221 | if (ext_tbl != NULL) { |
| 222 | int i; |
| 223 | struct ext_sig_entry *entry = (struct ext_sig_entry *)(ext_tbl + 1); |
| 224 | |
| 225 | for (i = 0; i < ext_tbl->ext_sig_cnt; i++, entry++) { |
Rizwan Qureshi | 1aa60a9 | 2021-05-20 21:05:03 +0530 | [diff] [blame] | 226 | if ((sig == entry->sig) && (pf & entry->pf)) { |
| 227 | return ucode_updates; |
| 228 | } |
| 229 | } |
| 230 | } |
| 231 | |
Aaron Durbin | e676767 | 2014-01-27 15:52:47 -0600 | [diff] [blame] | 232 | ucode_updates = (void *)((char *)ucode_updates + update_size); |
Alexandru Gagniuc | b1ae030 | 2013-12-08 16:30:07 -0600 | [diff] [blame] | 233 | microcode_len -= update_size; |
Aaron Durbin | 98ffb42 | 2013-01-15 15:15:32 -0600 | [diff] [blame] | 234 | } |
| 235 | |
Elyes HAOUAS | 9612a3c | 2019-12-16 05:46:16 +0100 | [diff] [blame] | 236 | return NULL; |
Aaron Durbin | 98ffb42 | 2013-01-15 15:15:32 -0600 | [diff] [blame] | 237 | } |
| 238 | |
Furquan Shaikh | f14c05f | 2021-03-08 22:08:42 -0800 | [diff] [blame] | 239 | const void *intel_microcode_find(void) |
| 240 | { |
| 241 | static bool microcode_checked; |
| 242 | static const void *ucode_update; |
| 243 | |
Subrata Banik | 0b70b0b | 2024-04-17 00:11:15 +0530 | [diff] [blame^] | 244 | if (ENV_CACHE_AS_RAM) { |
| 245 | printk(BIOS_ERR, "Microcode Error: Early microcode patching is not supported due" |
| 246 | "to NEM limitation\n"); |
| 247 | return NULL; |
| 248 | } |
| 249 | |
Furquan Shaikh | f14c05f | 2021-03-08 22:08:42 -0800 | [diff] [blame] | 250 | if (microcode_checked) |
| 251 | return ucode_update; |
| 252 | |
| 253 | /* |
| 254 | * Since this function caches the found microcode (NULL or a valid |
| 255 | * microcode pointer), it is expected to be run from BSP before starting |
| 256 | * any other APs. This sequence is not multithread safe otherwise. |
| 257 | */ |
| 258 | ucode_update = find_cbfs_microcode(); |
| 259 | microcode_checked = true; |
| 260 | |
| 261 | return ucode_update; |
| 262 | } |
| 263 | |
Aaron Durbin | 98ffb42 | 2013-01-15 15:15:32 -0600 | [diff] [blame] | 264 | void intel_update_microcode_from_cbfs(void) |
| 265 | { |
| 266 | const void *patch = intel_microcode_find(); |
| 267 | |
Aaron Durbin | 98ffb42 | 2013-01-15 15:15:32 -0600 | [diff] [blame] | 268 | spin_lock(µcode_lock); |
Aaron Durbin | 98ffb42 | 2013-01-15 15:15:32 -0600 | [diff] [blame] | 269 | |
| 270 | intel_microcode_load_unlocked(patch); |
| 271 | |
Aaron Durbin | 98ffb42 | 2013-01-15 15:15:32 -0600 | [diff] [blame] | 272 | spin_unlock(µcode_lock); |
Aaron Durbin | 98ffb42 | 2013-01-15 15:15:32 -0600 | [diff] [blame] | 273 | } |
Rizwan Qureshi | 30b755b | 2015-07-23 22:31:51 +0530 | [diff] [blame] | 274 | |
Subrata Banik | bd0aef0 | 2022-06-15 21:24:13 +0530 | [diff] [blame] | 275 | void intel_reload_microcode(void) |
| 276 | { |
| 277 | if (!CONFIG(RELOAD_MICROCODE_PATCH)) |
| 278 | return; |
| 279 | |
Subrata Banik | bd0aef0 | 2022-06-15 21:24:13 +0530 | [diff] [blame] | 280 | const struct microcode *m = intel_microcode_find(); |
| 281 | |
| 282 | if (!m) { |
Subrata Banik | 508c290 | 2022-06-22 20:35:32 +0530 | [diff] [blame] | 283 | printk(BIOS_WARNING, "microcode: failed because no ucode was found\n"); |
Subrata Banik | bd0aef0 | 2022-06-15 21:24:13 +0530 | [diff] [blame] | 284 | return; |
| 285 | } |
| 286 | |
| 287 | printk(BIOS_INFO, "microcode: Re-load microcode patch\n"); |
| 288 | |
Subrata Banik | 7734af8 | 2022-06-20 08:10:39 +0000 | [diff] [blame] | 289 | if (load_microcode(m) < 0) |
| 290 | printk(BIOS_ERR, "microcode: Re-load failed\n"); |
Subrata Banik | bd0aef0 | 2022-06-15 21:24:13 +0530 | [diff] [blame] | 291 | } |
| 292 | |
Rizwan Qureshi | 30b755b | 2015-07-23 22:31:51 +0530 | [diff] [blame] | 293 | #if ENV_RAMSTAGE |
Elyes HAOUAS | 56a676e | 2021-02-09 17:51:25 +0100 | [diff] [blame] | 294 | __weak int soc_skip_ucode_update(u32 current_patch_id, |
Lee Leahy | cdc5048 | 2017-03-15 18:26:18 -0700 | [diff] [blame] | 295 | u32 new_patch_id) |
Rizwan Qureshi | 30b755b | 2015-07-23 22:31:51 +0530 | [diff] [blame] | 296 | { |
| 297 | return 0; |
| 298 | } |
| 299 | #endif |