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Stefan Reinauer278534d2008-10-29 04:51:07 +00001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2007-2008 coresystems GmbH
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
Stefan Reinauer30140a52009-03-11 16:20:39 +00008 * the Free Software Foundation; version 2 of the License.
Stefan Reinauer278534d2008-10-29 04:51:07 +00009 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Stefan Reinauer278534d2008-10-29 04:51:07 +000014 */
15
16#ifndef RAMINIT_H
17#define RAMINIT_H
18
Stefan Reinauer6a001132017-07-13 02:20:27 +020019#include <compiler.h>
20
Stefan Reinauer278534d2008-10-29 04:51:07 +000021#define DIMM_SOCKETS 2
22
Stefan Reinauer278534d2008-10-29 04:51:07 +000023#define DIMM_TCO_BASE 0x30
24
25/* Burst length is always 8 */
26#define BURSTLENGTH 8
27
28struct sys_info {
29 u16 memory_frequency; /* 400, 533 or 667 */
Elyes HAOUASd9e65432016-12-01 19:59:12 +010030 u16 fsb_frequency; /* 945GM: 400, 533 or 667 / 945GC: 533, 800, or 1066 */
Stefan Reinauer278534d2008-10-29 04:51:07 +000031
32 u8 trp; /* calculated by sdram_detect_smallest_tRP() */
33 u8 trcd; /* calculated by sdram_detect_smallest_tRCD() */
34 u8 tras; /* calculated by sdram_detect_smallest_tRAS() */
35 u8 trfc; /* calculated by sdram_detect_smallest_tRFC() */
36 u8 twr; /* calculated by sdram_detect_smallest_tWR() */
37
38 u8 cas; /* 3, 4 or 5 */
39 u8 refresh; /* 0 = 15.6us, 1 = 7.8us */
40
41 u8 dual_channel; /* 0 or 1 */
42 u8 interleaved;
43
44 u8 mvco4x; /* 0 (8x) or 1 (4x) */
45 u8 clkcfg_bit7;
46 u8 boot_path;
Stefan Reinauer71a3d962009-07-21 21:44:24 +000047#define BOOT_PATH_NORMAL 0
48#define BOOT_PATH_RESET 1
49#define BOOT_PATH_RESUME 2
Stefan Reinauer278534d2008-10-29 04:51:07 +000050
51 u8 package; /* 0 = planar, 1 = stacked */
52#define SYSINFO_PACKAGE_PLANAR 0x00
53#define SYSINFO_PACKAGE_STACKED 0x01
54 u8 dimm[2 * DIMM_SOCKETS];
55#define SYSINFO_DIMM_X16DS 0x00
56#define SYSINFO_DIMM_X8DS 0x01
57#define SYSINFO_DIMM_X16SS 0x02
58#define SYSINFO_DIMM_X8DDS 0x03
59#define SYSINFO_DIMM_NOT_POPULATED 0x04
60
61 u8 banks[2 * DIMM_SOCKETS];
62
63 u8 banksize[2 * 2 * DIMM_SOCKETS];
Sven Schnelle541269b2011-02-21 09:39:17 +000064 const u8 *spd_addresses;
Stefan Reinauer278534d2008-10-29 04:51:07 +000065
Stefan Reinauer6a001132017-07-13 02:20:27 +020066} __packed;
Stefan Reinauer278534d2008-10-29 04:51:07 +000067
Stefan Reinauerde3206a2010-02-22 06:09:43 +000068void receive_enable_adjust(struct sys_info *sysinfo);
Sven Schnelle541269b2011-02-21 09:39:17 +000069void sdram_initialize(int boot_path, const u8 *sdram_addresses);
Stefan Reinauer53b0ea42010-03-22 11:50:52 +000070int fixup_i945_errata(void);
Patrick Georgid0835952010-10-05 09:07:10 +000071void udelay(u32 us);
Stefan Reinauer3c0bfaf2010-12-27 11:34:57 +000072
Martin Roth33232602017-06-24 14:48:50 -060073#if IS_ENABLED(CONFIG_DEBUG_RAM_SETUP)
Stefan Reinauer3c0bfaf2010-12-27 11:34:57 +000074void sdram_dump_mchbar_registers(void);
75#endif
Stefan Reinauer278534d2008-10-29 04:51:07 +000076#endif /* RAMINIT_H */