Angel Pons | fc0af1e | 2020-04-03 01:22:35 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 2 | |
| 3 | /* DefinitionBlock Statement */ |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 4 | #include <acpi/acpi.h> |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 5 | DefinitionBlock ( |
Elyes HAOUAS | 2bfaabc | 2020-10-01 17:03:55 +0200 | [diff] [blame] | 6 | "dsdt.aml", |
Elyes HAOUAS | 37509d7 | 2020-10-01 17:11:56 +0200 | [diff] [blame] | 7 | "DSDT", |
Elyes HAOUAS | 90d00de | 2020-10-05 16:38:53 +0200 | [diff] [blame] | 8 | ACPI_DSDT_REV_2, |
Elyes HAOUAS | 6d19a20 | 2018-11-22 11:15:29 +0100 | [diff] [blame] | 9 | OEM_ID, |
| 10 | ACPI_TABLE_CREATOR, |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 11 | 0x00010001 /* OEM Revision */ |
| 12 | ) |
| 13 | { /* Start of ASL file */ |
Kyösti Mälkki | cf246d5 | 2021-01-21 08:17:00 +0200 | [diff] [blame] | 14 | #include <acpi/dsdt_top.asl> |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 15 | |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 16 | |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 17 | /* |
| 18 | * Processor Object |
| 19 | * |
| 20 | */ |
Michał Żygowski | 9550e97 | 2020-03-20 13:56:46 +0100 | [diff] [blame] | 21 | Scope (\_SB) { /* define processor scope */ |
Elyes HAOUAS | d115940 | 2019-10-24 15:29:08 +0200 | [diff] [blame] | 22 | Device (C000) { |
| 23 | Name (_HID, "ACPI0007") |
| 24 | Name (_UID, 0) |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 25 | } |
Elyes HAOUAS | d115940 | 2019-10-24 15:29:08 +0200 | [diff] [blame] | 26 | Device (C001) { |
| 27 | Name (_HID, "ACPI0007") |
| 28 | Name (_UID, 1) |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 29 | } |
Elyes HAOUAS | d115940 | 2019-10-24 15:29:08 +0200 | [diff] [blame] | 30 | Device (C002) { |
| 31 | Name (_HID, "ACPI0007") |
| 32 | Name (_UID, 2) |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 33 | } |
Elyes HAOUAS | d115940 | 2019-10-24 15:29:08 +0200 | [diff] [blame] | 34 | Device (C003) { |
| 35 | Name (_HID, "ACPI0007") |
| 36 | Name (_UID, 3) |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 37 | } |
Michał Żygowski | 9550e97 | 2020-03-20 13:56:46 +0100 | [diff] [blame] | 38 | } /* End _SB scope */ |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 39 | |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 40 | /* Client Management index/data registers */ |
| 41 | OperationRegion(CMT, SystemIO, 0x00000C50, 0x00000002) |
| 42 | Field(CMT, ByteAcc, NoLock, Preserve) { |
| 43 | CMTI, 8, |
| 44 | /* Client Management Data register */ |
| 45 | G64E, 1, |
| 46 | G64O, 1, |
| 47 | G32O, 2, |
| 48 | , 2, |
| 49 | GPSL, 2, |
| 50 | } |
| 51 | |
| 52 | /* GPM Port register */ |
| 53 | OperationRegion(GPT, SystemIO, 0x00000C52, 0x00000001) |
| 54 | Field(GPT, ByteAcc, NoLock, Preserve) { |
| 55 | GPB0,1, |
| 56 | GPB1,1, |
| 57 | GPB2,1, |
| 58 | GPB3,1, |
| 59 | GPB4,1, |
| 60 | GPB5,1, |
| 61 | GPB6,1, |
| 62 | GPB7,1, |
| 63 | } |
| 64 | |
| 65 | /* Flash ROM program enable register */ |
| 66 | OperationRegion(FRE, SystemIO, 0x00000C6F, 0x00000001) |
| 67 | Field(FRE, ByteAcc, NoLock, Preserve) { |
| 68 | , 0x00000006, |
| 69 | FLRE, 0x00000001, |
| 70 | } |
| 71 | |
| 72 | /* PM2 index/data registers */ |
| 73 | OperationRegion(PM2R, SystemIO, 0x00000CD0, 0x00000002) |
| 74 | Field(PM2R, ByteAcc, NoLock, Preserve) { |
| 75 | PM2I, 0x00000008, |
| 76 | PM2D, 0x00000008, |
| 77 | } |
| 78 | |
| 79 | /* Power Management I/O registers, TODO:PMIO is quite different in SB800. */ |
| 80 | OperationRegion(PIOR, SystemIO, 0x00000CD6, 0x00000002) |
| 81 | Field(PIOR, ByteAcc, NoLock, Preserve) { |
| 82 | PIOI, 0x00000008, |
| 83 | PIOD, 0x00000008, |
| 84 | } |
| 85 | IndexField (PIOI, PIOD, ByteAcc, NoLock, Preserve) { |
Elyes HAOUAS | 48a6c01 | 2020-07-08 09:22:13 +0200 | [diff] [blame] | 86 | , 1, /* MiscControl */ |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 87 | T1EE, 1, |
| 88 | T2EE, 1, |
| 89 | Offset(0x01), /* MiscStatus */ |
| 90 | , 1, |
| 91 | T1E, 1, |
| 92 | T2E, 1, |
| 93 | Offset(0x04), /* SmiWakeUpEventEnable3 */ |
| 94 | , 7, |
| 95 | SSEN, 1, |
| 96 | Offset(0x07), /* SmiWakeUpEventStatus3 */ |
| 97 | , 7, |
| 98 | CSSM, 1, |
| 99 | Offset(0x10), /* AcpiEnable */ |
| 100 | , 6, |
| 101 | PWDE, 1, |
| 102 | Offset(0x1C), /* ProgramIoEnable */ |
| 103 | , 3, |
| 104 | MKME, 1, |
| 105 | IO3E, 1, |
| 106 | IO2E, 1, |
| 107 | IO1E, 1, |
| 108 | IO0E, 1, |
| 109 | Offset(0x1D), /* IOMonitorStatus */ |
| 110 | , 3, |
| 111 | MKMS, 1, |
| 112 | IO3S, 1, |
| 113 | IO2S, 1, |
| 114 | IO1S, 1, |
| 115 | IO0S,1, |
| 116 | Offset(0x20), /* AcpiPmEvtBlk. TODO: should be 0x60 */ |
| 117 | APEB, 16, |
| 118 | Offset(0x36), /* GEvtLevelConfig */ |
| 119 | , 6, |
| 120 | ELC6, 1, |
| 121 | ELC7, 1, |
| 122 | Offset(0x37), /* GPMLevelConfig0 */ |
| 123 | , 3, |
| 124 | PLC0, 1, |
| 125 | PLC1, 1, |
| 126 | PLC2, 1, |
| 127 | PLC3, 1, |
| 128 | PLC8, 1, |
| 129 | Offset(0x38), /* GPMLevelConfig1 */ |
| 130 | , 1, |
| 131 | PLC4, 1, |
| 132 | PLC5, 1, |
| 133 | , 1, |
| 134 | PLC6, 1, |
| 135 | PLC7, 1, |
| 136 | Offset(0x3B), /* PMEStatus1 */ |
| 137 | GP0S, 1, |
| 138 | GM4S, 1, |
| 139 | GM5S, 1, |
| 140 | APS, 1, |
| 141 | GM6S, 1, |
| 142 | GM7S, 1, |
| 143 | GP2S, 1, |
| 144 | STSS, 1, |
| 145 | Offset(0x55), /* SoftPciRst */ |
| 146 | SPRE, 1, |
| 147 | , 1, |
| 148 | , 1, |
| 149 | PNAT, 1, |
| 150 | PWMK, 1, |
| 151 | PWNS, 1, |
| 152 | |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 153 | Offset(0x65), /* UsbPMControl */ |
| 154 | , 4, |
| 155 | URRE, 1, |
| 156 | Offset(0x68), /* MiscEnable68 */ |
| 157 | , 3, |
| 158 | TMTE, 1, |
| 159 | , 1, |
| 160 | Offset(0x92), /* GEVENTIN */ |
| 161 | , 7, |
| 162 | E7IS, 1, |
| 163 | Offset(0x96), /* GPM98IN */ |
| 164 | G8IS, 1, |
| 165 | G9IS, 1, |
| 166 | Offset(0x9A), /* EnhanceControl */ |
| 167 | ,7, |
| 168 | HPDE, 1, |
| 169 | Offset(0xA8), /* PIO7654Enable */ |
| 170 | IO4E, 1, |
| 171 | IO5E, 1, |
| 172 | IO6E, 1, |
| 173 | IO7E, 1, |
| 174 | Offset(0xA9), /* PIO7654Status */ |
| 175 | IO4S, 1, |
| 176 | IO5S, 1, |
| 177 | IO6S, 1, |
| 178 | IO7S, 1, |
| 179 | } |
| 180 | |
| 181 | /* PM1 Event Block |
| 182 | * First word is PM1_Status, Second word is PM1_Enable |
| 183 | */ |
| 184 | OperationRegion(P1EB, SystemIO, APEB, 0x04) |
| 185 | Field(P1EB, ByteAcc, NoLock, Preserve) { |
| 186 | TMST, 1, |
| 187 | , 3, |
| 188 | BMST, 1, |
| 189 | GBST, 1, |
| 190 | Offset(0x01), |
| 191 | PBST, 1, |
| 192 | , 1, |
| 193 | RTST, 1, |
| 194 | , 3, |
| 195 | PWST, 1, |
| 196 | SPWS, 1, |
| 197 | Offset(0x02), |
| 198 | TMEN, 1, |
| 199 | , 4, |
| 200 | GBEN, 1, |
| 201 | Offset(0x03), |
| 202 | PBEN, 1, |
| 203 | , 1, |
| 204 | RTEN, 1, |
| 205 | , 3, |
| 206 | PWDA, 1, |
| 207 | } |
| 208 | |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 209 | #include "acpi/routing.asl" |
| 210 | |
Kyösti Mälkki | 84355a1 | 2021-02-12 07:34:12 +0200 | [diff] [blame] | 211 | #include <southbridge/amd/cimx/sb800/acpi/pcie.asl> |
| 212 | |
Kyösti Mälkki | 390ba04 | 2017-08-07 21:42:46 +0300 | [diff] [blame] | 213 | /* Contains the supported sleep states for this chipset */ |
| 214 | #include <southbridge/amd/common/acpi/sleepstates.asl> |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 215 | |
Kyösti Mälkki | bb6bf5a | 2021-02-13 23:29:14 +0200 | [diff] [blame] | 216 | /* Contains the Sleep methods (WAK, PTS, GTS, etc.) */ |
| 217 | #include "acpi/sleep.asl" |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 218 | |
Kyösti Mälkki | bb6bf5a | 2021-02-13 23:29:14 +0200 | [diff] [blame] | 219 | #include "acpi/gpe.asl" |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 220 | |
Kyösti Mälkki | bb6bf5a | 2021-02-13 23:29:14 +0200 | [diff] [blame] | 221 | #include "acpi/usb_oc.asl" |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 222 | |
Martin Roth | ec23f04 | 2017-11-22 19:21:55 -0700 | [diff] [blame] | 223 | /* System Bus */ |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 224 | Scope(\_SB) { /* Start \_SB scope */ |
| 225 | #include <arch/x86/acpi/globutil.asl> /* global utility methods expected within the \_SB scope */ |
| 226 | |
| 227 | /* _SB.PCI0 */ |
| 228 | /* Note: Only need HID on Primary Bus */ |
| 229 | Device(PCI0) { |
| 230 | External (TOM1) |
| 231 | External (TOM2) |
Mike Loptien | 061c664 | 2013-03-15 13:24:53 -0600 | [diff] [blame] | 232 | Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */ |
| 233 | Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */ |
Mike Loptien | 061c664 | 2013-03-15 13:24:53 -0600 | [diff] [blame] | 234 | |
| 235 | /* Operating System Capabilities Method */ |
Martin Roth | c7b26c3 | 2015-11-24 16:17:11 -0700 | [diff] [blame] | 236 | Method (_OSC, 4) |
| 237 | { |
| 238 | /* Check for PCI/PCI-X/PCIe GUID */ |
Elyes HAOUAS | a59b5f8 | 2020-10-06 13:37:25 +0200 | [diff] [blame] | 239 | If (Arg0 == ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")) |
Mike Loptien | 061c664 | 2013-03-15 13:24:53 -0600 | [diff] [blame] | 240 | { |
| 241 | /* Let OS control everything */ |
| 242 | Return (Arg3) |
| 243 | } |
Martin Roth | c7b26c3 | 2015-11-24 16:17:11 -0700 | [diff] [blame] | 244 | Else |
| 245 | { |
| 246 | /* Unrecognized UUID, so set bit 2 of Arg3 to 1 */ |
| 247 | CreateDWordField (Arg3, 0, CDW1) |
Elyes HAOUAS | a59b5f8 | 2020-10-06 13:37:25 +0200 | [diff] [blame] | 248 | CDW1 |= 4 |
Martin Roth | c7b26c3 | 2015-11-24 16:17:11 -0700 | [diff] [blame] | 249 | Return (Arg3) |
| 250 | } |
| 251 | } /* End _OSC */ |
Mike Loptien | 061c664 | 2013-03-15 13:24:53 -0600 | [diff] [blame] | 252 | |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 253 | Method(_BBN, 0) { /* Bus number = 0 */ |
| 254 | Return(0) |
| 255 | } |
| 256 | Method(_STA, 0) { |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 257 | Return(0x0B) /* Status is visible */ |
| 258 | } |
| 259 | |
| 260 | Method(_PRT,0) { |
Kyösti Mälkki | 3f24670 | 2021-01-25 16:48:51 +0200 | [diff] [blame] | 261 | If(PICM){ Return(APR0) } /* APIC mode */ |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 262 | Return (PR0) /* PIC Mode */ |
| 263 | } /* end _PRT */ |
| 264 | |
| 265 | /* Describe the Northbridge devices */ |
| 266 | Device(AMRT) { |
| 267 | Name(_ADR, 0x00000000) |
| 268 | } /* end AMRT */ |
| 269 | |
| 270 | /* The internal GFX bridge */ |
| 271 | Device(AGPB) { |
| 272 | Name(_ADR, 0x00010000) |
| 273 | Name(_PRW, Package() {0x18, 4}) |
| 274 | Method(_PRT,0) { |
| 275 | Return (APR1) |
| 276 | } |
| 277 | } /* end AGPB */ |
| 278 | |
| 279 | /* The external GFX bridge */ |
| 280 | Device(PBR2) { |
| 281 | Name(_ADR, 0x00020000) |
| 282 | Name(_PRW, Package() {0x18, 4}) |
| 283 | Method(_PRT,0) { |
Kyösti Mälkki | 3f24670 | 2021-01-25 16:48:51 +0200 | [diff] [blame] | 284 | If(PICM){ Return(APS2) } /* APIC mode */ |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 285 | Return (PS2) /* PIC Mode */ |
| 286 | } /* end _PRT */ |
| 287 | } /* end PBR2 */ |
| 288 | |
| 289 | /* Dev3 is also an external GFX bridge, not used in Herring */ |
| 290 | |
| 291 | Device(PBR4) { |
| 292 | Name(_ADR, 0x00040000) |
| 293 | Name(_PRW, Package() {0x18, 4}) |
| 294 | Method(_PRT,0) { |
Kyösti Mälkki | 3f24670 | 2021-01-25 16:48:51 +0200 | [diff] [blame] | 295 | If(PICM){ Return(APS4) } /* APIC mode */ |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 296 | Return (PS4) /* PIC Mode */ |
| 297 | } /* end _PRT */ |
| 298 | } /* end PBR4 */ |
| 299 | |
| 300 | Device(PBR5) { |
| 301 | Name(_ADR, 0x00050000) |
| 302 | Name(_PRW, Package() {0x18, 4}) |
| 303 | Method(_PRT,0) { |
Kyösti Mälkki | 3f24670 | 2021-01-25 16:48:51 +0200 | [diff] [blame] | 304 | If(PICM){ Return(APS5) } /* APIC mode */ |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 305 | Return (PS5) /* PIC Mode */ |
| 306 | } /* end _PRT */ |
| 307 | } /* end PBR5 */ |
| 308 | |
| 309 | Device(PBR6) { |
| 310 | Name(_ADR, 0x00060000) |
| 311 | Name(_PRW, Package() {0x18, 4}) |
| 312 | Method(_PRT,0) { |
Kyösti Mälkki | 3f24670 | 2021-01-25 16:48:51 +0200 | [diff] [blame] | 313 | If(PICM){ Return(APS6) } /* APIC mode */ |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 314 | Return (PS6) /* PIC Mode */ |
| 315 | } /* end _PRT */ |
| 316 | } /* end PBR6 */ |
| 317 | |
| 318 | /* The onboard EtherNet chip */ |
| 319 | Device(PBR7) { |
| 320 | Name(_ADR, 0x00070000) |
| 321 | Name(_PRW, Package() {0x18, 4}) |
| 322 | Method(_PRT,0) { |
Kyösti Mälkki | 3f24670 | 2021-01-25 16:48:51 +0200 | [diff] [blame] | 323 | If(PICM){ Return(APS7) } /* APIC mode */ |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 324 | Return (PS7) /* PIC Mode */ |
| 325 | } /* end _PRT */ |
| 326 | } /* end PBR7 */ |
| 327 | |
| 328 | /* GPP */ |
| 329 | Device(PBR9) { |
| 330 | Name(_ADR, 0x00090000) |
| 331 | Name(_PRW, Package() {0x18, 4}) |
| 332 | Method(_PRT,0) { |
Kyösti Mälkki | 3f24670 | 2021-01-25 16:48:51 +0200 | [diff] [blame] | 333 | If(PICM){ Return(APS9) } /* APIC mode */ |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 334 | Return (PS9) /* PIC Mode */ |
| 335 | } /* end _PRT */ |
| 336 | } /* end PBR9 */ |
| 337 | |
| 338 | Device(PBRa) { |
| 339 | Name(_ADR, 0x000A0000) |
| 340 | Name(_PRW, Package() {0x18, 4}) |
| 341 | Method(_PRT,0) { |
Paul Menzel | bd78c5a | 2021-03-01 19:55:59 +0100 | [diff] [blame] | 342 | If(PICM){ Return(APSA) } /* APIC mode */ |
| 343 | Return (PSA) /* PIC Mode */ |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 344 | } /* end _PRT */ |
| 345 | } /* end PBRa */ |
| 346 | |
| 347 | Device(PE20) { |
| 348 | Name(_ADR, 0x00150000) |
| 349 | Name(_PRW, Package() {0x18, 4}) |
| 350 | Method(_PRT,0) { |
Kyösti Mälkki | 3f24670 | 2021-01-25 16:48:51 +0200 | [diff] [blame] | 351 | If(PICM){ Return(APE0) } /* APIC mode */ |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 352 | Return (PE0) /* PIC Mode */ |
| 353 | } /* end _PRT */ |
| 354 | } /* end PE20 */ |
| 355 | Device(PE21) { |
| 356 | Name(_ADR, 0x00150001) |
| 357 | Name(_PRW, Package() {0x18, 4}) |
| 358 | Method(_PRT,0) { |
Kyösti Mälkki | 3f24670 | 2021-01-25 16:48:51 +0200 | [diff] [blame] | 359 | If(PICM){ Return(APE1) } /* APIC mode */ |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 360 | Return (PE1) /* PIC Mode */ |
| 361 | } /* end _PRT */ |
| 362 | } /* end PE21 */ |
| 363 | Device(PE22) { |
| 364 | Name(_ADR, 0x00150002) |
| 365 | Name(_PRW, Package() {0x18, 4}) |
| 366 | Method(_PRT,0) { |
Kyösti Mälkki | 3f24670 | 2021-01-25 16:48:51 +0200 | [diff] [blame] | 367 | If(PICM){ Return(APE2) } /* APIC mode */ |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 368 | Return (APE2) /* PIC Mode */ |
| 369 | } /* end _PRT */ |
| 370 | } /* end PE22 */ |
| 371 | Device(PE23) { |
| 372 | Name(_ADR, 0x00150003) |
| 373 | Name(_PRW, Package() {0x18, 4}) |
| 374 | Method(_PRT,0) { |
Kyösti Mälkki | 3f24670 | 2021-01-25 16:48:51 +0200 | [diff] [blame] | 375 | If(PICM){ Return(APE3) } /* APIC mode */ |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 376 | Return (PE3) /* PIC Mode */ |
| 377 | } /* end _PRT */ |
| 378 | } /* end PE23 */ |
| 379 | |
| 380 | /* PCI slot 1, 2, 3 */ |
| 381 | Device(PIBR) { |
| 382 | Name(_ADR, 0x00140004) |
| 383 | Name(_PRW, Package() {0x18, 4}) |
| 384 | |
| 385 | Method(_PRT, 0) { |
| 386 | Return (PCIB) |
| 387 | } |
| 388 | } |
| 389 | |
| 390 | /* Describe the Southbridge devices */ |
| 391 | Device(STCR) { |
| 392 | Name(_ADR, 0x00110000) |
| 393 | #include "acpi/sata.asl" |
| 394 | } /* end STCR */ |
| 395 | |
| 396 | Device(UOH1) { |
| 397 | Name(_ADR, 0x00120000) |
| 398 | Name(_PRW, Package() {0x0B, 3}) |
| 399 | } /* end UOH1 */ |
| 400 | |
| 401 | Device(UOH2) { |
| 402 | Name(_ADR, 0x00120002) |
| 403 | Name(_PRW, Package() {0x0B, 3}) |
| 404 | } /* end UOH2 */ |
| 405 | |
| 406 | Device(UOH3) { |
| 407 | Name(_ADR, 0x00130000) |
| 408 | Name(_PRW, Package() {0x0B, 3}) |
| 409 | } /* end UOH3 */ |
| 410 | |
| 411 | Device(UOH4) { |
| 412 | Name(_ADR, 0x00130002) |
| 413 | Name(_PRW, Package() {0x0B, 3}) |
| 414 | } /* end UOH4 */ |
| 415 | |
| 416 | Device(UOH5) { |
| 417 | Name(_ADR, 0x00160000) |
| 418 | Name(_PRW, Package() {0x0B, 3}) |
| 419 | } /* end UOH5 */ |
| 420 | |
| 421 | Device(UOH6) { |
| 422 | Name(_ADR, 0x00160002) |
| 423 | Name(_PRW, Package() {0x0B, 3}) |
| 424 | } /* end UOH5 */ |
| 425 | |
| 426 | Device(UEH1) { |
| 427 | Name(_ADR, 0x00140005) |
| 428 | Name(_PRW, Package() {0x0B, 3}) |
| 429 | } /* end UEH1 */ |
| 430 | |
| 431 | Device(SBUS) { |
| 432 | Name(_ADR, 0x00140000) |
| 433 | } /* end SBUS */ |
| 434 | |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 435 | Device(AZHD) { |
| 436 | Name(_ADR, 0x00140002) |
| 437 | OperationRegion(AZPD, PCI_Config, 0x00, 0x100) |
| 438 | Field(AZPD, AnyAcc, NoLock, Preserve) { |
| 439 | offset (0x42), |
| 440 | NSDI, 1, |
| 441 | NSDO, 1, |
| 442 | NSEN, 1, |
| 443 | offset (0x44), |
| 444 | IPCR, 4, |
| 445 | offset (0x54), |
| 446 | PWST, 2, |
| 447 | , 6, |
| 448 | PMEB, 1, |
| 449 | , 6, |
| 450 | PMST, 1, |
| 451 | offset (0x62), |
| 452 | MMCR, 1, |
| 453 | offset (0x64), |
| 454 | MMLA, 32, |
| 455 | offset (0x68), |
| 456 | MMHA, 32, |
| 457 | offset (0x6C), |
| 458 | MMDT, 16, |
| 459 | } |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 460 | } /* end AZHD */ |
| 461 | |
| 462 | Device(LIBR) { |
| 463 | Name(_ADR, 0x00140003) |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 464 | |
| 465 | /* Real Time Clock Device */ |
| 466 | Device(RTC0) { |
| 467 | Name(_HID, EISAID("PNP0B00")) /* AT Real Time Clock (not PIIX4 compatible) */ |
| 468 | Name(_CRS, ResourceTemplate() { |
| 469 | IRQNoFlags(){8} |
| 470 | IO(Decode16,0x0070, 0x0070, 0, 2) |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 471 | }) |
| 472 | } /* End Device(_SB.PCI0.LpcIsaBr.RTC0) */ |
| 473 | |
| 474 | Device(TMR) { /* Timer */ |
| 475 | Name(_HID,EISAID("PNP0100")) /* System Timer */ |
| 476 | Name(_CRS, ResourceTemplate() { |
| 477 | IRQNoFlags(){0} |
| 478 | IO(Decode16, 0x0040, 0x0040, 0, 4) |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 479 | }) |
| 480 | } /* End Device(_SB.PCI0.LpcIsaBr.TMR) */ |
| 481 | |
| 482 | Device(SPKR) { /* Speaker */ |
| 483 | Name(_HID,EISAID("PNP0800")) /* AT style speaker */ |
| 484 | Name(_CRS, ResourceTemplate() { |
| 485 | IO(Decode16, 0x0061, 0x0061, 0, 1) |
| 486 | }) |
| 487 | } /* End Device(_SB.PCI0.LpcIsaBr.SPKR) */ |
| 488 | |
| 489 | Device(PIC) { |
| 490 | Name(_HID,EISAID("PNP0000")) /* AT Interrupt Controller */ |
| 491 | Name(_CRS, ResourceTemplate() { |
| 492 | IRQNoFlags(){2} |
| 493 | IO(Decode16,0x0020, 0x0020, 0, 2) |
| 494 | IO(Decode16,0x00A0, 0x00A0, 0, 2) |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 495 | }) |
| 496 | } /* End Device(_SB.PCI0.LpcIsaBr.PIC) */ |
| 497 | |
| 498 | Device(MAD) { /* 8257 DMA */ |
| 499 | Name(_HID,EISAID("PNP0200")) /* Hardware Device ID */ |
| 500 | Name(_CRS, ResourceTemplate() { |
| 501 | DMA(Compatibility,BusMaster,Transfer8){4} |
| 502 | IO(Decode16, 0x0000, 0x0000, 0x10, 0x10) |
| 503 | IO(Decode16, 0x0081, 0x0081, 0x01, 0x03) |
| 504 | IO(Decode16, 0x0087, 0x0087, 0x01, 0x01) |
| 505 | IO(Decode16, 0x0089, 0x0089, 0x01, 0x03) |
| 506 | IO(Decode16, 0x008F, 0x008F, 0x01, 0x01) |
| 507 | IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20) |
| 508 | }) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */ |
| 509 | } /* End Device(_SB.PCI0.LpcIsaBr.MAD) */ |
| 510 | |
| 511 | Device(COPR) { |
| 512 | Name(_HID,EISAID("PNP0C04")) /* Math Coprocessor */ |
| 513 | Name(_CRS, ResourceTemplate() { |
| 514 | IO(Decode16, 0x00F0, 0x00F0, 0, 0x10) |
| 515 | IRQNoFlags(){13} |
| 516 | }) |
| 517 | } /* End Device(_SB.PCI0.LpcIsaBr.COPR) */ |
Jens Rottmann | 23d13b1 | 2013-02-28 10:24:20 +0100 | [diff] [blame] | 518 | #include "acpi/superio.asl" |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 519 | } /* end LIBR */ |
| 520 | |
| 521 | Device(HPBR) { |
| 522 | Name(_ADR, 0x00140004) |
| 523 | } /* end HostPciBr */ |
| 524 | |
| 525 | Device(ACAD) { |
| 526 | Name(_ADR, 0x00140005) |
| 527 | } /* end Ac97audio */ |
| 528 | |
| 529 | Device(ACMD) { |
| 530 | Name(_ADR, 0x00140006) |
| 531 | } /* end Ac97modem */ |
| 532 | |
| 533 | Name(CRES, ResourceTemplate() { |
Mike Loptien | 42ad200 | 2013-03-15 13:05:59 -0600 | [diff] [blame] | 534 | /* Set the Bus number and Secondary Bus number for the PCI0 device |
| 535 | * The Secondary bus range for PCI0 lets the system |
| 536 | * know what bus values are allowed on the downstream |
| 537 | * side of this PCI bus if there is a PCI-PCI bridge. |
| 538 | * PCI busses can have 256 secondary busses which |
| 539 | * range from [0-0xFF] but they do not need to be |
| 540 | * sequential. |
| 541 | */ |
| 542 | WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, |
| 543 | 0x0000, /* address granularity */ |
| 544 | 0x0000, /* range minimum */ |
| 545 | 0x00FF, /* range maximum */ |
| 546 | 0x0000, /* translation */ |
| 547 | 0x0100, /* length */ |
| 548 | ,, PSB0) /* ResourceSourceIndex, ResourceSource, DescriptorName */ |
| 549 | |
Jens Rottmann | 23d13b1 | 2013-02-28 10:24:20 +0100 | [diff] [blame] | 550 | IO(Decode16, 0x004E, 0x004E, 1, 2) /* SIO config regs */ |
Angel Pons | 2719a45 | 2020-07-08 01:58:47 +0200 | [diff] [blame] | 551 | #if CONFIG(BOARD_LIPPERT_FRONTRUNNER_AF) |
Jens Rottmann | 23d13b1 | 2013-02-28 10:24:20 +0100 | [diff] [blame] | 552 | IO(Decode16, 0x0E00, 0x0E00, 1, 0x80) /* SIO runtime regs */ |
Angel Pons | 2719a45 | 2020-07-08 01:58:47 +0200 | [diff] [blame] | 553 | #endif |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 554 | IO(Decode16, 0x0CF8, 0x0CF8, 1, 8) |
| 555 | |
| 556 | WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, |
| 557 | 0x0000, /* address granularity */ |
| 558 | 0x0000, /* range minimum */ |
| 559 | 0x0CF7, /* range maximum */ |
| 560 | 0x0000, /* translation */ |
| 561 | 0x0CF8 /* length */ |
| 562 | ) |
| 563 | |
| 564 | WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, |
| 565 | 0x0000, /* address granularity */ |
| 566 | 0x0D00, /* range minimum */ |
| 567 | 0xFFFF, /* range maximum */ |
| 568 | 0x0000, /* translation */ |
| 569 | 0xF300 /* length */ |
| 570 | ) |
| 571 | |
Elyes HAOUAS | 846a43e | 2018-05-28 13:41:05 +0200 | [diff] [blame] | 572 | Memory32Fixed(READONLY, 0x000A0000, 0x00020000, VGAM) /* VGA memory space */ |
Elyes HAOUAS | d4c89e4 | 2016-09-21 21:07:42 +0200 | [diff] [blame] | 573 | /* memory space for PCI BARs below 4GB */ |
| 574 | Memory32Fixed(ReadOnly, 0x00000000, 0x00000000, MMIO) |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 575 | }) /* End Name(_SB.PCI0.CRES) */ |
| 576 | |
| 577 | Method(_CRS, 0) { |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 578 | CreateDWordField(CRES, ^MMIO._BAS, MM1B) |
Elyes HAOUAS | d4c89e4 | 2016-09-21 21:07:42 +0200 | [diff] [blame] | 579 | CreateDWordField(CRES, ^MMIO._LEN, MM1L) |
| 580 | /* |
| 581 | * Declare memory between TOM1 and 4GB as available |
| 582 | * for PCI MMIO. |
| 583 | * Use ShiftLeft to avoid 64bit constant (for XP). |
| 584 | * This will work even if the OS does 32bit arithmetic, as |
| 585 | * 32bit (0x00000000 - TOM1) will wrap and give the same |
| 586 | * result as 64bit (0x100000000 - TOM1). |
| 587 | */ |
Elyes HAOUAS | a59b5f8 | 2020-10-06 13:37:25 +0200 | [diff] [blame] | 588 | MM1B = TOM1 |
| 589 | Local0 = 0x10000000 << 4 |
| 590 | Local0 -= TOM1 |
| 591 | MM1L = Local0 |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 592 | |
| 593 | Return(CRES) /* note to change the Name buffer */ |
| 594 | } /* end of Method(_SB.PCI0._CRS) */ |
| 595 | |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 596 | } /* End Device(PCI0) */ |
| 597 | |
| 598 | Device(PWRB) { /* Start Power button device */ |
| 599 | Name(_HID, EISAID("PNP0C0C")) |
| 600 | Name(_UID, 0xAA) |
| 601 | Name(_PRW, Package () {3, 0x04}) /* wake from S1-S4 */ |
| 602 | Name(_STA, 0x0B) /* sata is invisible */ |
| 603 | } |
| 604 | } /* End \_SB scope */ |
Jens Rottmann | 73d4965 | 2013-02-28 09:56:20 +0100 | [diff] [blame] | 605 | } |
| 606 | /* End of ASL file */ |