blob: cb07ac05557ae98cb2c132c74ae422c551282099 [file] [log] [blame]
Rex-BC Chen73e6b8e2021-11-02 10:31:53 +08001ifeq ($(CONFIG_SOC_MEDIATEK_MT8186),y)
2
3bootblock-y += bootblock.c
Rex-BC Chenac07b032021-09-27 18:50:26 +08004bootblock-y += ../common/eint_event.c
Rex-BC Chena6b3af92021-09-23 20:21:18 +08005bootblock-y += ../common/flash_controller.c
Guodong Liu09cbb062021-09-29 17:47:59 +08006bootblock-y += ../common/gpio.c gpio.c
Rex-BC Chen73e6b8e2021-11-02 10:31:53 +08007bootblock-y += ../common/mmu_operations.c
Chun-Jie Chen76e0b9d2021-09-24 18:41:06 +08008bootblock-y += ../common/pll.c pll.c
Ruwen Liu0480a192021-11-04 13:30:23 +08009bootblock-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
Rex-BC Chena74f4432021-09-27 14:12:00 +080010bootblock-y += ../common/timer.c timer.c
Rex-BC Chen73e6b8e2021-11-02 10:31:53 +080011bootblock-y += ../common/uart.c
Rex-BC Chen5db9fa72021-09-27 13:49:15 +080012bootblock-y += ../common/wdt.c wdt.c
Rex-BC Chen73e6b8e2021-11-02 10:31:53 +080013
Rex-BC Chena6b3af92021-09-23 20:21:18 +080014verstage-y += ../common/flash_controller.c
Guodong Liu09cbb062021-09-29 17:47:59 +080015verstage-y += ../common/gpio.c gpio.c
Ruwen Liu0480a192021-11-04 13:30:23 +080016verstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
Rex-BC Chena74f4432021-09-27 14:12:00 +080017verstage-y += ../common/timer.c timer.c
Rex-BC Chen73e6b8e2021-11-02 10:31:53 +080018verstage-y += ../common/uart.c
Rex-BC Chen5db9fa72021-09-27 13:49:15 +080019verstage-y += ../common/wdt.c wdt.c
Rex-BC Chen73e6b8e2021-11-02 10:31:53 +080020
21romstage-y += ../common/cbmem.c
22romstage-y += emi.c
Rex-BC Chena6b3af92021-09-23 20:21:18 +080023romstage-y += ../common/flash_controller.c
Guodong Liu09cbb062021-09-29 17:47:59 +080024romstage-y += ../common/gpio.c gpio.c
Ruwen Liu0480a192021-11-04 13:30:23 +080025romstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
Rex-BC Chena74f4432021-09-27 14:12:00 +080026romstage-y += ../common/timer.c timer.c
Rex-BC Chen73e6b8e2021-11-02 10:31:53 +080027romstage-y += ../common/uart.c
Rex-BC Chen5db9fa72021-09-27 13:49:15 +080028romstage-y += ../common/wdt.c wdt.c
Rex-BC Chen73e6b8e2021-11-02 10:31:53 +080029
30ramstage-y += emi.c
Rex-BC Chena6b3af92021-09-23 20:21:18 +080031ramstage-y += ../common/flash_controller.c
Guodong Liu09cbb062021-09-29 17:47:59 +080032ramstage-y += ../common/gpio.c gpio.c
Ruwen Liu0480a192021-11-04 13:30:23 +080033ramstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
Rex-BC Chen73e6b8e2021-11-02 10:31:53 +080034ramstage-y += soc.c
Rex-BC Chena74f4432021-09-27 14:12:00 +080035ramstage-y += ../common/timer.c timer.c
Rex-BC Chen73e6b8e2021-11-02 10:31:53 +080036ramstage-y += ../common/uart.c
Rex-BC Chen5db9fa72021-09-27 13:49:15 +080037ramstage-y += ../common/wdt.c wdt.c
Rex-BC Chen73e6b8e2021-11-02 10:31:53 +080038
39CPPFLAGS_common += -Isrc/soc/mediatek/mt8186/include
40CPPFLAGS_common += -Isrc/soc/mediatek/common/include
41
42$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
43 ./util/mtkheader/gen-bl-img.py mt8183 sf $< $@
44
45endif