| Rex-BC Chen | 73e6b8e | 2021-11-02 10:31:53 +0800 | [diff] [blame] | 1 | ifeq ($(CONFIG_SOC_MEDIATEK_MT8186),y) |
| 2 | |
| 3 | bootblock-y += bootblock.c |
| Rex-BC Chen | a6b3af9 | 2021-09-23 20:21:18 +0800 | [diff] [blame] | 4 | bootblock-y += ../common/flash_controller.c |
| Guodong Liu | 09cbb06 | 2021-09-29 17:47:59 +0800 | [diff] [blame] | 5 | bootblock-y += ../common/gpio.c gpio.c |
| Rex-BC Chen | 73e6b8e | 2021-11-02 10:31:53 +0800 | [diff] [blame] | 6 | bootblock-y += ../common/mmu_operations.c |
| Chun-Jie Chen | 76e0b9d | 2021-09-24 18:41:06 +0800 | [diff] [blame^] | 7 | bootblock-y += ../common/pll.c pll.c |
| Rex-BC Chen | 73e6b8e | 2021-11-02 10:31:53 +0800 | [diff] [blame] | 8 | bootblock-$(CONFIG_SPI_FLASH) += spi.c |
| 9 | bootblock-y += ../common/timer.c |
| 10 | bootblock-y += ../common/uart.c |
| Rex-BC Chen | 5db9fa7 | 2021-09-27 13:49:15 +0800 | [diff] [blame] | 11 | bootblock-y += ../common/wdt.c wdt.c |
| Rex-BC Chen | 73e6b8e | 2021-11-02 10:31:53 +0800 | [diff] [blame] | 12 | |
| Rex-BC Chen | a6b3af9 | 2021-09-23 20:21:18 +0800 | [diff] [blame] | 13 | verstage-y += ../common/flash_controller.c |
| Guodong Liu | 09cbb06 | 2021-09-29 17:47:59 +0800 | [diff] [blame] | 14 | verstage-y += ../common/gpio.c gpio.c |
| Rex-BC Chen | 73e6b8e | 2021-11-02 10:31:53 +0800 | [diff] [blame] | 15 | verstage-$(CONFIG_SPI_FLASH) += spi.c |
| 16 | verstage-y += ../common/timer.c |
| 17 | verstage-y += ../common/uart.c |
| Rex-BC Chen | 5db9fa7 | 2021-09-27 13:49:15 +0800 | [diff] [blame] | 18 | verstage-y += ../common/wdt.c wdt.c |
| Rex-BC Chen | 73e6b8e | 2021-11-02 10:31:53 +0800 | [diff] [blame] | 19 | |
| 20 | romstage-y += ../common/cbmem.c |
| 21 | romstage-y += emi.c |
| Rex-BC Chen | a6b3af9 | 2021-09-23 20:21:18 +0800 | [diff] [blame] | 22 | romstage-y += ../common/flash_controller.c |
| Guodong Liu | 09cbb06 | 2021-09-29 17:47:59 +0800 | [diff] [blame] | 23 | romstage-y += ../common/gpio.c gpio.c |
| Rex-BC Chen | 73e6b8e | 2021-11-02 10:31:53 +0800 | [diff] [blame] | 24 | romstage-$(CONFIG_SPI_FLASH) += spi.c |
| 25 | romstage-y += ../common/timer.c |
| 26 | romstage-y += ../common/uart.c |
| Rex-BC Chen | 5db9fa7 | 2021-09-27 13:49:15 +0800 | [diff] [blame] | 27 | romstage-y += ../common/wdt.c wdt.c |
| Rex-BC Chen | 73e6b8e | 2021-11-02 10:31:53 +0800 | [diff] [blame] | 28 | |
| 29 | ramstage-y += emi.c |
| Rex-BC Chen | a6b3af9 | 2021-09-23 20:21:18 +0800 | [diff] [blame] | 30 | ramstage-y += ../common/flash_controller.c |
| Guodong Liu | 09cbb06 | 2021-09-29 17:47:59 +0800 | [diff] [blame] | 31 | ramstage-y += ../common/gpio.c gpio.c |
| Rex-BC Chen | 73e6b8e | 2021-11-02 10:31:53 +0800 | [diff] [blame] | 32 | ramstage-$(CONFIG_SPI_FLASH) += spi.c |
| 33 | ramstage-y += soc.c |
| 34 | ramstage-y += ../common/timer.c |
| 35 | ramstage-y += ../common/uart.c |
| Rex-BC Chen | 5db9fa7 | 2021-09-27 13:49:15 +0800 | [diff] [blame] | 36 | ramstage-y += ../common/wdt.c wdt.c |
| Rex-BC Chen | 73e6b8e | 2021-11-02 10:31:53 +0800 | [diff] [blame] | 37 | |
| 38 | CPPFLAGS_common += -Isrc/soc/mediatek/mt8186/include |
| 39 | CPPFLAGS_common += -Isrc/soc/mediatek/common/include |
| 40 | |
| 41 | $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin |
| 42 | ./util/mtkheader/gen-bl-img.py mt8183 sf $< $@ |
| 43 | |
| 44 | endif |