Patrick Georgi | 02363b5 | 2020-05-05 20:48:50 +0200 | [diff] [blame^] | 1 | /* This file is part of the coreboot project. */ |
V Sowmya | c333b98 | 2017-11-27 11:31:14 +0530 | [diff] [blame] | 2 | /* |
V Sowmya | c333b98 | 2017-11-27 11:31:14 +0530 | [diff] [blame] | 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License as published by |
| 6 | * the Free Software Foundation; either version 2 of the License, or |
| 7 | * (at your option) any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | */ |
| 14 | |
| 15 | #include <device/device.h> |
| 16 | #include <device/pci.h> |
| 17 | #include <device/pci_ids.h> |
| 18 | #include <intelblocks/sram.h> |
| 19 | #include <soc/iomap.h> |
| 20 | |
Aaron Durbin | 6403167 | 2018-04-21 14:45:32 -0600 | [diff] [blame] | 21 | __weak void soc_sram_init(struct device *dev) { /* no-op */ } |
V Sowmya | c333b98 | 2017-11-27 11:31:14 +0530 | [diff] [blame] | 22 | |
| 23 | static void sram_read_resources(struct device *dev) |
| 24 | { |
| 25 | struct resource *res; |
| 26 | pci_dev_read_resources(dev); |
| 27 | |
| 28 | res = new_resource(dev, PCI_BASE_ADDRESS_0); |
| 29 | res->base = SRAM_BASE_0; |
| 30 | res->size = SRAM_SIZE_0; |
| 31 | res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
| 32 | |
| 33 | res = new_resource(dev, PCI_BASE_ADDRESS_2); |
| 34 | res->base = SRAM_BASE_2; |
| 35 | res->size = SRAM_SIZE_2; |
| 36 | res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
| 37 | } |
| 38 | |
| 39 | static const struct device_operations device_ops = { |
| 40 | .read_resources = sram_read_resources, |
| 41 | .set_resources = pci_dev_set_resources, |
| 42 | .enable_resources = pci_dev_enable_resources, |
| 43 | .init = soc_sram_init, |
Subrata Banik | 6bbc91a | 2017-12-07 14:55:51 +0530 | [diff] [blame] | 44 | .ops_pci = &pci_dev_ops_pci, |
V Sowmya | c333b98 | 2017-11-27 11:31:14 +0530 | [diff] [blame] | 45 | }; |
| 46 | |
| 47 | static const unsigned short pci_device_ids[] = { |
| 48 | PCI_DEVICE_ID_INTEL_APL_SRAM, |
| 49 | PCI_DEVICE_ID_INTEL_GLK_SRAM, |
Aamir Bohra | 9eac039 | 2018-06-30 12:07:04 +0530 | [diff] [blame] | 50 | PCI_DEVICE_ID_INTEL_ICL_SRAM, |
Ronak Kanabar | da7ffb48 | 2019-02-05 01:51:13 +0530 | [diff] [blame] | 51 | PCI_DEVICE_ID_INTEL_CMP_SRAM, |
Gaggery Tsai | 12a651c | 2019-12-05 11:23:20 -0800 | [diff] [blame] | 52 | PCI_DEVICE_ID_INTEL_CMP_H_SRAM, |
Ravi Sarawadi | 6b5bf40 | 2019-10-21 22:25:04 -0700 | [diff] [blame] | 53 | PCI_DEVICE_ID_INTEL_TGL_SRAM, |
Tan, Lean Sheng | 2613609 | 2020-01-20 19:13:56 -0800 | [diff] [blame] | 54 | PCI_DEVICE_ID_INTEL_MCC_SRAM, |
Meera Ravindranath | 3f4af0d | 2020-02-12 16:01:22 +0530 | [diff] [blame] | 55 | PCI_DEVICE_ID_INTEL_JSP_SRAM, |
V Sowmya | c333b98 | 2017-11-27 11:31:14 +0530 | [diff] [blame] | 56 | 0, |
| 57 | }; |
| 58 | |
| 59 | static const struct pci_driver sram __pci_driver = { |
| 60 | .ops = &device_ops, |
| 61 | .vendor = PCI_VENDOR_ID_INTEL, |
| 62 | .devices = pci_device_ids, |
| 63 | }; |