soc/intel/skylake: Rename PcieRpAspm devicetree config
This configuration option shares a name with the FSP UPD, but
is enumerated differently. Change its name to minimise confusion
about the options.
Change-Id: Id74f043ecd549bde4501320bff1dc080bde64057
Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45001
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index 4139570..549f403 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -210,8 +210,8 @@
sizeof(params->PcieRpHotPlug));
for (i = 0; i < CONFIG_MAX_ROOT_PORTS; i++) {
params->PcieRpMaxPayload[i] = config->PcieRpMaxPayload[i];
- if (config->PcieRpAspm[i])
- params->PcieRpAspm[i] = config->PcieRpAspm[i] - 1;
+ if (config->pcie_rp_aspm[i])
+ params->PcieRpAspm[i] = config->pcie_rp_aspm[i] - 1;
if (config->pcie_rp_l1substates[i])
params->PcieRpL1Substates[i] = config->pcie_rp_l1substates[i] - 1;
}