| ## |
| ## This file is part of the coreboot project. |
| ## |
| ## Copyright (C) 2011 Google Inc. |
| ## |
| ## This program is free software; you can redistribute it and/or modify |
| ## it under the terms of the GNU General Public License as published by |
| ## the Free Software Foundation; version 2 of the License. |
| ## |
| ## This program is distributed in the hope that it will be useful, |
| ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| ## GNU General Public License for more details. |
| ## |
| |
| config SOUTHBRIDGE_INTEL_LYNXPOINT |
| bool |
| |
| if SOUTHBRIDGE_INTEL_LYNXPOINT |
| |
| config SOUTH_BRIDGE_OPTIONS # dummy |
| def_bool y |
| select ACPI_INTEL_HARDWARE_SLEEP_VALUES |
| select SOUTHBRIDGE_INTEL_COMMON |
| select SOUTHBRIDGE_INTEL_COMMON_SMBUS |
| select SOUTHBRIDGE_INTEL_COMMON_SPI |
| select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT |
| select SOUTHBRIDGE_INTEL_COMMON_FINALIZE |
| select SOUTHBRIDGE_INTEL_COMMON_PMCLIB |
| select IOAPIC |
| select HAVE_SMI_HANDLER |
| select HAVE_USBDEBUG_OPTIONS |
| select USE_WATCHDOG_ON_BOOT |
| select PCIEXP_ASPM |
| select PCIEXP_COMMON_CLOCK |
| select INTEL_DESCRIPTOR_MODE_CAPABLE |
| select HAVE_SPI_CONSOLE_SUPPORT |
| select RTC |
| select SOUTHBRIDGE_INTEL_COMMON_GPIO if !INTEL_LYNXPOINT_LP |
| select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ |
| select HAVE_INTEL_CHIPSET_LOCKDOWN |
| select COMMON_FADT |
| select HAVE_POWER_STATE_AFTER_FAILURE |
| select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE |
| |
| config INTEL_LYNXPOINT_LP |
| bool |
| default n |
| help |
| Set this option to y for Lynxpont LP (Haswell ULT). |
| |
| config EHCI_BAR |
| hex |
| default 0xe8000000 |
| |
| config BOOTBLOCK_SOUTHBRIDGE_INIT |
| string |
| default "southbridge/intel/lynxpoint/bootblock.c" |
| |
| config SERIRQ_CONTINUOUS_MODE |
| bool |
| default n |
| help |
| If you set this option to y, the serial IRQ machine will be |
| operated in continuous mode. |
| |
| config ME_MBP_CLEAR_LATE |
| bool "Defer wait for ME MBP Cleared" |
| default y |
| help |
| If you set this option to y, the Management Engine driver |
| will defer waiting for the MBP Cleared indicator until the |
| finalize step. This can speed up boot time if the ME takes |
| a long time to indicate this status. |
| |
| config FINALIZE_USB_ROUTE_XHCI |
| bool "Route all ports to XHCI controller in finalize step" |
| default y |
| help |
| If you set this option to y, the USB ports will be routed |
| to the XHCI controller during the finalize SMM callback. |
| |
| endif |