| ## |
| ## This file is part of the coreboot project. |
| ## |
| ## Copyright (C) 2007-2009 coresystems GmbH |
| ## |
| ## This program is free software; you can redistribute it and/or modify |
| ## it under the terms of the GNU General Public License as published by |
| ## the Free Software Foundation; version 2 of the License. |
| ## |
| ## This program is distributed in the hope that it will be useful, |
| ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| ## GNU General Public License for more details. |
| ## |
| |
| config NORTHBRIDGE_INTEL_GM45 |
| bool |
| |
| if NORTHBRIDGE_INTEL_GM45 |
| |
| config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy |
| def_bool y |
| select HAVE_DEBUG_RAM_SETUP |
| select VGA |
| select INTEL_EDID |
| select INTEL_GMA_ACPI |
| select INTEL_GMA_SSC_ALTERNATE_REF |
| select RELOCATABLE_RAMSTAGE |
| |
| config CBFS_SIZE |
| hex |
| default 0x100000 |
| |
| config BOOTBLOCK_NORTHBRIDGE_INIT |
| string |
| default "northbridge/intel/gm45/bootblock.c" |
| |
| config VGA_BIOS_ID |
| string |
| default "8086,2a42" |
| |
| config MMCONF_BASE_ADDRESS |
| hex |
| default 0xf0000000 |
| |
| endif |