Paul Menzel | 2628571 | 2017-04-17 10:57:51 +0200 | [diff] [blame] | 1 | |
| 2 | |
| 3 | coreboot-4.5-1198-ga0b15f44c9 Fri Mar 10 08:12:23 UTC 2017 ramstage starting... |
| 4 | BS: BS_PRE_DEVICE times (us): entry 0 run 0 exit 0 |
| 5 | SB800 - Smbus.c - alink_ab_indx - Start. |
| 6 | SB800 - Smbus.c - alink_ab_indx - End. |
| 7 | BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 17 exit 0 |
| 8 | Enumerating buses... |
| 9 | Show all devs... Before device enumeration. |
| 10 | Root Device: enabled 1 |
| 11 | CPU_CLUSTER: 0: enabled 1 |
| 12 | APIC: 00: enabled 1 |
| 13 | DOMAIN: 0000: enabled 1 |
| 14 | PCI: 00:00.0: enabled 1 |
| 15 | PCI: 00:01.0: enabled 1 |
| 16 | PCI: 00:01.1: enabled 1 |
| 17 | PCI: 00:04.0: enabled 1 |
| 18 | PCI: 00:05.0: enabled 0 |
| 19 | PCI: 00:06.0: enabled 0 |
| 20 | PCI: 00:07.0: enabled 0 |
| 21 | PCI: 00:08.0: enabled 0 |
| 22 | PCI: 00:11.0: enabled 1 |
| 23 | PCI: 00:12.0: enabled 1 |
| 24 | PCI: 00:12.2: enabled 1 |
| 25 | PCI: 00:13.0: enabled 1 |
| 26 | PCI: 00:13.2: enabled 1 |
| 27 | PCI: 00:14.0: enabled 1 |
| 28 | I2C: 00:50: enabled 1 |
| 29 | I2C: 00:51: enabled 1 |
| 30 | PCI: 00:14.1: enabled 1 |
| 31 | PCI: 00:14.2: enabled 1 |
| 32 | PCI: 00:14.3: enabled 1 |
| 33 | PNP: 002e.0: enabled 0 |
| 34 | PNP: 002e.1: enabled 0 |
| 35 | PNP: 002e.2: enabled 1 |
| 36 | PNP: 002e.3: enabled 0 |
| 37 | PNP: 002e.5: enabled 1 |
| 38 | PNP: 002e.6: enabled 0 |
| 39 | PNP: 002e.107: enabled 0 |
| 40 | PNP: 002e.207: enabled 0 |
| 41 | PNP: 002e.307: enabled 1 |
| 42 | PNP: 002e.407: enabled 0 |
| 43 | PNP: 002e.8: enabled 0 |
| 44 | PNP: 002e.9: enabled 1 |
| 45 | PNP: 002e.109: enabled 0 |
| 46 | PNP: 002e.209: enabled 0 |
| 47 | PNP: 002e.309: enabled 0 |
| 48 | PNP: 002e.a: enabled 1 |
| 49 | PNP: 002e.b: enabled 1 |
| 50 | PNP: 002e.c: enabled 0 |
| 51 | PNP: 002e.d: enabled 1 |
| 52 | PNP: 002e.e: enabled 0 |
| 53 | PNP: 002e.f: enabled 0 |
| 54 | PCI: 00:14.4: enabled 1 |
| 55 | PCI: 00:14.5: enabled 1 |
| 56 | PCI: 00:15.0: enabled 1 |
| 57 | PCI: 00:15.1: enabled 1 |
| 58 | PCI: 00:15.2: enabled 1 |
| 59 | PCI: 00:15.3: enabled 0 |
| 60 | PCI: 00:16.0: enabled 0 |
| 61 | PCI: 00:16.2: enabled 0 |
| 62 | PCI: 00:18.0: enabled 1 |
| 63 | PCI: 00:18.1: enabled 1 |
| 64 | PCI: 00:18.2: enabled 1 |
| 65 | PCI: 00:18.3: enabled 1 |
| 66 | PCI: 00:18.4: enabled 1 |
| 67 | PCI: 00:18.5: enabled 1 |
| 68 | PCI: 00:18.6: enabled 1 |
| 69 | PCI: 00:18.7: enabled 1 |
| 70 | Compare with tree... |
| 71 | Root Device: enabled 1 |
| 72 | CPU_CLUSTER: 0: enabled 1 |
| 73 | APIC: 00: enabled 1 |
| 74 | DOMAIN: 0000: enabled 1 |
| 75 | PCI: 00:00.0: enabled 1 |
| 76 | PCI: 00:01.0: enabled 1 |
| 77 | PCI: 00:01.1: enabled 1 |
| 78 | PCI: 00:04.0: enabled 1 |
| 79 | PCI: 00:05.0: enabled 0 |
| 80 | PCI: 00:06.0: enabled 0 |
| 81 | PCI: 00:07.0: enabled 0 |
| 82 | PCI: 00:08.0: enabled 0 |
| 83 | PCI: 00:11.0: enabled 1 |
| 84 | PCI: 00:12.0: enabled 1 |
| 85 | PCI: 00:12.2: enabled 1 |
| 86 | PCI: 00:13.0: enabled 1 |
| 87 | PCI: 00:13.2: enabled 1 |
| 88 | PCI: 00:14.0: enabled 1 |
| 89 | I2C: 00:50: enabled 1 |
| 90 | I2C: 00:51: enabled 1 |
| 91 | PCI: 00:14.1: enabled 1 |
| 92 | PCI: 00:14.2: enabled 1 |
| 93 | PCI: 00:14.3: enabled 1 |
| 94 | PNP: 002e.0: enabled 0 |
| 95 | PNP: 002e.1: enabled 0 |
| 96 | PNP: 002e.2: enabled 1 |
| 97 | PNP: 002e.3: enabled 0 |
| 98 | PNP: 002e.5: enabled 1 |
| 99 | PNP: 002e.6: enabled 0 |
| 100 | PNP: 002e.107: enabled 0 |
| 101 | PNP: 002e.207: enabled 0 |
| 102 | PNP: 002e.307: enabled 1 |
| 103 | PNP: 002e.407: enabled 0 |
| 104 | PNP: 002e.8: enabled 0 |
| 105 | PNP: 002e.9: enabled 1 |
| 106 | PNP: 002e.109: enabled 0 |
| 107 | PNP: 002e.209: enabled 0 |
| 108 | PNP: 002e.309: enabled 0 |
| 109 | PNP: 002e.a: enabled 1 |
| 110 | PNP: 002e.b: enabled 1 |
| 111 | PNP: 002e.c: enabled 0 |
| 112 | PNP: 002e.d: enabled 1 |
| 113 | PNP: 002e.e: enabled 0 |
| 114 | PNP: 002e.f: enabled 0 |
| 115 | PCI: 00:14.4: enabled 1 |
| 116 | PCI: 00:14.5: enabled 1 |
| 117 | PCI: 00:15.0: enabled 1 |
| 118 | PCI: 00:15.1: enabled 1 |
| 119 | PCI: 00:15.2: enabled 1 |
| 120 | PCI: 00:15.3: enabled 0 |
| 121 | PCI: 00:16.0: enabled 0 |
| 122 | PCI: 00:16.2: enabled 0 |
| 123 | PCI: 00:18.0: enabled 1 |
| 124 | PCI: 00:18.1: enabled 1 |
| 125 | PCI: 00:18.2: enabled 1 |
| 126 | PCI: 00:18.3: enabled 1 |
| 127 | PCI: 00:18.4: enabled 1 |
| 128 | PCI: 00:18.5: enabled 1 |
| 129 | PCI: 00:18.6: enabled 1 |
| 130 | PCI: 00:18.7: enabled 1 |
| 131 | Mainboard E350M1 Enable. |
| 132 | Root Device scanning... |
| 133 | root_dev_scan_bus for Root Device |
| 134 | setup_bsp_ramtop, TOP MEM: msr.lo = 0xe0000000, msr.hi = 0x00000000 |
| 135 | setup_bsp_ramtop, TOP MEM2: msr.lo = 0x1f000000, msr.hi = 0x00000002 |
| 136 | setup_uma_memory: uma size 0x18000000, memory start 0xc8000000 |
| 137 | CPU_CLUSTER: 0 enabled |
| 138 | DOMAIN: 0000 enabled |
| 139 | CPU_CLUSTER: 0 scanning... |
| 140 | AP siblings=1 |
| 141 | CPU: APIC: 00 enabled |
| 142 | CPU: APIC: 01 enabled |
| 143 | scan_bus: scanning of bus CPU_CLUSTER: 0 took 9 usecs |
| 144 | DOMAIN: 0000 scanning... |
| 145 | PCI: pci_scan_bus for bus 00 |
| 146 | PCI: 00:00.0 [1022/1510] ops |
| 147 | PCI: 00:00.0 [1022/1510] enabled |
| 148 | PCI: 00:01.0 [1002/9802] enabled |
| 149 | PCI: 00:01.1 [1002/1314] enabled |
| 150 | PCI: Static device PCI: 00:04.0 not found, disabling it. |
| 151 | PCI: 00:11.0 [1002/4390] enabled |
| 152 | PCI: 00:12.0 [1002/4397] ops |
| 153 | PCI: 00:12.0 [1002/4397] enabled |
| 154 | PCI: 00:12.2 [1002/4396] ops |
| 155 | PCI: 00:12.2 [1002/4396] enabled |
| 156 | PCI: 00:13.0 [1002/4397] ops |
| 157 | PCI: 00:13.0 [1002/4397] enabled |
| 158 | PCI: 00:13.2 [1002/4396] ops |
| 159 | PCI: 00:13.2 [1002/4396] enabled |
| 160 | IOAPIC: Clearing IOAPIC at fec00000 |
| 161 | IOAPIC: 24 interrupts |
| 162 | IOAPIC: reg 0x00000000 value 0x00000000 0x00010000 |
| 163 | IOAPIC: reg 0x00000001 value 0x00000000 0x00010000 |
| 164 | IOAPIC: reg 0x00000002 value 0x00000000 0x00010000 |
| 165 | IOAPIC: reg 0x00000003 value 0x00000000 0x00010000 |
| 166 | IOAPIC: reg 0x00000004 value 0x00000000 0x00010000 |
| 167 | IOAPIC: reg 0x00000005 value 0x00000000 0x00010000 |
| 168 | IOAPIC: reg 0x00000006 value 0x00000000 0x00010000 |
| 169 | IOAPIC: reg 0x00000007 value 0x00000000 0x00010000 |
| 170 | IOAPIC: reg 0x00000008 value 0x00000000 0x00010000 |
| 171 | IOAPIC: reg 0x00000009 value 0x00000000 0x00010000 |
| 172 | IOAPIC: reg 0x0000000a value 0x00000000 0x00010000 |
| 173 | IOAPIC: reg 0x0000000b value 0x00000000 0x00010000 |
| 174 | IOAPIC: reg 0x0000000c value 0x00000000 0x00010000 |
| 175 | IOAPIC: reg 0x0000000d value 0x00000000 0x00010000 |
| 176 | IOAPIC: reg 0x0000000e value 0x00000000 0x00010000 |
| 177 | IOAPIC: reg 0x0000000f value 0x00000000 0x00010000 |
| 178 | IOAPIC: reg 0x00000010 value 0x00000000 0x00010000 |
| 179 | IOAPIC: reg 0x00000011 value 0x00000000 0x00010000 |
| 180 | IOAPIC: reg 0x00000012 value 0x00000000 0x00010000 |
| 181 | IOAPIC: reg 0x00000013 value 0x00000000 0x00010000 |
| 182 | IOAPIC: reg 0x00000014 value 0x00000000 0x00010000 |
| 183 | IOAPIC: reg 0x00000015 value 0x00000000 0x00010000 |
| 184 | IOAPIC: reg 0x00000016 value 0x00000000 0x00010000 |
| 185 | IOAPIC: reg 0x00000017 value 0x00000000 0x00010000 |
| 186 | IOAPIC: Initializing IOAPIC at 0xfec00000 |
| 187 | IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| 188 | IOAPIC: ID = 0x02 |
| 189 | IOAPIC: Dumping registers |
| 190 | reg 0x0000: 0x02000000 |
| 191 | reg 0x0001: 0x00178021 |
| 192 | reg 0x0002: 0x02000000 |
| 193 | IOAPIC: 24 interrupts |
| 194 | IOAPIC: Enabling interrupts on FSB |
| 195 | IOAPIC: reg 0x00000000 value 0x00000000 0x00000700 |
| 196 | IOAPIC: reg 0x00000001 value 0x00000000 0x00010000 |
| 197 | IOAPIC: reg 0x00000002 value 0x00000000 0x00010000 |
| 198 | IOAPIC: reg 0x00000003 value 0x00000000 0x00010000 |
| 199 | IOAPIC: reg 0x00000004 value 0x00000000 0x00010000 |
| 200 | IOAPIC: reg 0x00000005 value 0x00000000 0x00010000 |
| 201 | IOAPIC: reg 0x00000006 value 0x00000000 0x00010000 |
| 202 | IOAPIC: reg 0x00000007 value 0x00000000 0x00010000 |
| 203 | IOAPIC: reg 0x00000008 value 0x00000000 0x00010000 |
| 204 | IOAPIC: reg 0x00000009 value 0x00000000 0x00010000 |
| 205 | IOAPIC: reg 0x0000000a value 0x00000000 0x00010000 |
| 206 | IOAPIC: reg 0x0000000b value 0x00000000 0x00010000 |
| 207 | IOAPIC: reg 0x0000000c value 0x00000000 0x00010000 |
| 208 | IOAPIC: reg 0x0000000d value 0x00000000 0x00010000 |
| 209 | IOAPIC: reg 0x0000000e value 0x00000000 0x00010000 |
| 210 | IOAPIC: reg 0x0000000f value 0x00000000 0x00010000 |
| 211 | IOAPIC: reg 0x00000010 value 0x00000000 0x00010000 |
| 212 | IOAPIC: reg 0x00000011 value 0x00000000 0x00010000 |
| 213 | IOAPIC: reg 0x00000012 value 0x00000000 0x00010000 |
| 214 | IOAPIC: reg 0x00000013 value 0x00000000 0x00010000 |
| 215 | IOAPIC: reg 0x00000014 value 0x00000000 0x00010000 |
| 216 | IOAPIC: reg 0x00000015 value 0x00000000 0x00010000 |
| 217 | IOAPIC: reg 0x00000016 value 0x00000000 0x00010000 |
| 218 | IOAPIC: reg 0x00000017 value 0x00000000 0x00010000 |
| 219 | PCI: 00:14.0 [1002/4385] enabled |
| 220 | PCI: Static device PCI: 00:14.1 not found, disabling it. |
| 221 | PCI: 00:14.2 [1002/4383] ops |
| 222 | PCI: 00:14.2 [1002/4383] enabled |
| 223 | PCI: 00:14.3 [1002/439d] bus ops |
| 224 | PCI: 00:14.3 [1002/439d] enabled |
| 225 | PCI: 00:14.4 [1002/4384] enabled |
| 226 | PCI: 00:14.5 [1002/4399] ops |
| 227 | PCI: 00:14.5 [1002/4399] enabled |
| 228 | Capability: type 0x01 @ 0x50 |
| 229 | Capability: type 0x10 @ 0x58 |
| 230 | Capability: type 0x0d @ 0xb0 |
| 231 | Capability: type 0x08 @ 0xb8 |
| 232 | Capability: type 0x01 @ 0x50 |
| 233 | Capability: type 0x10 @ 0x58 |
| 234 | PCI: 00:15.0 subordinate bus PCI Express |
| 235 | PCI: 00:15.0 [1002/43a0] enabled |
| 236 | Capability: type 0x01 @ 0x50 |
| 237 | Capability: type 0x10 @ 0x58 |
| 238 | Capability: type 0x0d @ 0xb0 |
| 239 | Capability: type 0x08 @ 0xb8 |
| 240 | Capability: type 0x01 @ 0x50 |
| 241 | Capability: type 0x10 @ 0x58 |
| 242 | PCI: 00:15.1 subordinate bus PCI Express |
| 243 | PCI: 00:15.1 [1002/43a1] enabled |
| 244 | Capability: type 0x01 @ 0x50 |
| 245 | Capability: type 0x10 @ 0x58 |
| 246 | Capability: type 0x0d @ 0xb0 |
| 247 | Capability: type 0x08 @ 0xb8 |
| 248 | Capability: type 0x01 @ 0x50 |
| 249 | Capability: type 0x10 @ 0x58 |
| 250 | PCI: 00:15.2 subordinate bus PCI Express |
| 251 | PCI: 00:15.2 [1002/43a2] enabled |
| 252 | Capability: type 0x01 @ 0x50 |
| 253 | Capability: type 0x10 @ 0x58 |
| 254 | Capability: type 0x0d @ 0xb0 |
| 255 | Capability: type 0x08 @ 0xb8 |
| 256 | Capability: type 0x01 @ 0x50 |
| 257 | Capability: type 0x10 @ 0x58 |
| 258 | PCI: 00:15.3 subordinate bus PCI Express |
| 259 | PCI: 00:15.3 [1002/43a3] disabled |
| 260 | PCI: 00:16.0 [1002/4397] ops |
| 261 | PCI: 00:16.0 [1002/4397] disabled |
| 262 | PCI: 00:18.0 [1022/1700] enabled |
| 263 | PCI: 00:18.1 [1022/1701] enabled |
| 264 | PCI: 00:18.2 [1022/1702] enabled |
| 265 | PCI: 00:18.3 [1022/1703] enabled |
| 266 | PCI: 00:18.4 [1022/1704] enabled |
| 267 | PCI: 00:18.5 [1022/1718] enabled |
| 268 | PCI: 00:18.6 [1022/1716] enabled |
| 269 | PCI: 00:18.7 [1022/1719] enabled |
| 270 | PCI: 00:14.3 scanning... |
| 271 | scan_lpc_bus for PCI: 00:14.3 |
| 272 | PNP: 002e.0 disabled |
| 273 | PNP: 002e.1 disabled |
| 274 | PNP: 002e.2 enabled |
| 275 | PNP: 002e.3 disabled |
| 276 | PNP: 002e.5 enabled |
| 277 | PNP: 002e.6 disabled |
| 278 | PNP: 002e.107 disabled |
| 279 | PNP: 002e.207 disabled |
| 280 | PNP: 002e.307 enabled |
| 281 | PNP: 002e.407 disabled |
| 282 | PNP: 002e.8 disabled |
| 283 | PNP: 002e.9 enabled |
| 284 | PNP: 002e.109 disabled |
| 285 | PNP: 002e.209 disabled |
| 286 | PNP: 002e.309 disabled |
| 287 | PNP: 002e.a enabled |
| 288 | PNP: 002e.b enabled |
| 289 | PNP: 002e.c disabled |
| 290 | PNP: 002e.d enabled |
| 291 | PNP: 002e.e disabled |
| 292 | PNP: 002e.f disabled |
| 293 | scan_lpc_bus for PCI: 00:14.3 done |
| 294 | scan_bus: scanning of bus PCI: 00:14.3 took 537 usecs |
| 295 | PCI: 00:14.4 scanning... |
| 296 | do_pci_scan_bridge for PCI: 00:14.4 |
| 297 | PCI: pci_scan_bus for bus 01 |
| 298 | scan_bus: scanning of bus PCI: 00:14.4 took 74 usecs |
| 299 | PCI: 00:15.0 scanning... |
| 300 | do_pci_scan_bridge for PCI: 00:15.0 |
| 301 | PCI: pci_scan_bus for bus 02 |
| 302 | scan_bus: scanning of bus PCI: 00:15.0 took 61 usecs |
| 303 | PCI: 00:15.1 scanning... |
| 304 | do_pci_scan_bridge for PCI: 00:15.1 |
| 305 | PCI: pci_scan_bus for bus 03 |
| 306 | PCI: 03:00.0 [10ec/8168] enabled |
| 307 | Capability: type 0x01 @ 0x40 |
| 308 | Capability: type 0x05 @ 0x50 |
| 309 | Capability: type 0x10 @ 0x70 |
| 310 | Capability: type 0x01 @ 0x50 |
| 311 | Capability: type 0x10 @ 0x58 |
| 312 | ASPM: Enabled L0s and L1 |
| 313 | scan_bus: scanning of bus PCI: 00:15.1 took 119 usecs |
| 314 | PCI: 00:15.2 scanning... |
| 315 | do_pci_scan_bridge for PCI: 00:15.2 |
| 316 | PCI: pci_scan_bus for bus 04 |
| 317 | scan_bus: scanning of bus PCI: 00:15.2 took 62 usecs |
| 318 | scan_bus: scanning of bus DOMAIN: 0000 took 93837 usecs |
| 319 | root_dev_scan_bus for Root Device done |
| 320 | scan_bus: scanning of bus Root Device took 93866 usecs |
| 321 | done |
| 322 | BS: BS_DEV_ENUMERATE times (us): entry 0 run 94077 exit 0 |
| 323 | found VGA at PCI: 00:01.0 |
| 324 | Setting up VGA for PCI: 00:01.0 |
| 325 | Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| 326 | Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| 327 | Allocating resources... |
| 328 | Reading resources... |
| 329 | Root Device read_resources bus 0 link: 0 |
| 330 | CPU_CLUSTER: 0 read_resources bus 0 link: 0 |
| 331 | CPU_CLUSTER: 0 read_resources bus 0 link: 0 done |
| 332 | |
| 333 | Fam14h - domain_read_resources |
| 334 | DOMAIN: 0000 read_resources bus 0 link: 0 |
| 335 | |
| 336 | Fam14h - nb_read_resources |
| 337 | Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000. |
| 338 | PCI: 00:14.0 read_resources bus 0 link: 0 |
| 339 | I2C: 00:50 missing read_resources |
| 340 | I2C: 00:51 missing read_resources |
| 341 | PCI: 00:14.0 read_resources bus 0 link: 0 done |
| 342 | SB800 - Lpc.c - lpc_read_resources - Start. |
| 343 | SB800 - Lpc.c - lpc_read_resources - End. |
| 344 | PCI: 00:14.3 read_resources bus 0 link: 0 |
| 345 | PCI: 00:14.3 read_resources bus 0 link: 0 done |
| 346 | PCI: 00:14.4 read_resources bus 1 link: 0 |
| 347 | PCI: 00:14.4 read_resources bus 1 link: 0 done |
| 348 | PCI: 00:15.0 read_resources bus 2 link: 0 |
| 349 | PCI: 00:15.0 read_resources bus 2 link: 0 done |
| 350 | PCI: 00:15.1 read_resources bus 3 link: 0 |
| 351 | PCI: 00:15.1 read_resources bus 3 link: 0 done |
| 352 | PCI: 00:15.2 register 10(ffffffff), read-only ignoring it |
| 353 | PCI: 00:15.2 register 14(ffffffff), read-only ignoring it |
| 354 | PCI: 00:15.2 register 38(ffffffff), read-only ignoring it |
| 355 | PCI: 00:15.2 read_resources bus 4 link: 0 |
| 356 | PCI: 00:15.2 read_resources bus 4 link: 0 done |
| 357 | DOMAIN: 0000 read_resources bus 0 link: 0 done |
| 358 | Root Device read_resources bus 0 link: 0 done |
| 359 | Done reading resources. |
| 360 | Show resources in subtree (Root Device)...After reading. |
| 361 | Root Device child on link 0 CPU_CLUSTER: 0 |
| 362 | CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| 363 | APIC: 00 |
| 364 | APIC: 01 |
| 365 | DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| 366 | DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 |
| 367 | DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 |
| 368 | PCI: 00:00.0 |
| 369 | PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 |
| 370 | PCI: 00:01.0 |
| 371 | PCI: 00:01.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10 |
| 372 | PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 14 |
| 373 | PCI: 00:01.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 18 |
| 374 | PCI: 00:01.1 |
| 375 | PCI: 00:01.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10 |
| 376 | PCI: 00:04.0 |
| 377 | PCI: 00:05.0 |
| 378 | PCI: 00:06.0 |
| 379 | PCI: 00:07.0 |
| 380 | PCI: 00:08.0 |
| 381 | PCI: 00:11.0 |
| 382 | PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 |
| 383 | PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 |
| 384 | PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 |
| 385 | PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c |
| 386 | PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 |
| 387 | PCI: 00:11.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 24 |
| 388 | PCI: 00:12.0 |
| 389 | PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 |
| 390 | PCI: 00:12.2 |
| 391 | PCI: 00:12.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| 392 | PCI: 00:13.0 |
| 393 | PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 |
| 394 | PCI: 00:13.2 |
| 395 | PCI: 00:13.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| 396 | PCI: 00:14.0 child on link 0 I2C: 00:50 |
| 397 | I2C: 00:50 |
| 398 | I2C: 00:51 |
| 399 | PCI: 00:14.1 |
| 400 | PCI: 00:14.2 |
| 401 | PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 |
| 402 | PCI: 00:14.3 child on link 0 PNP: 002e.0 |
| 403 | PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| 404 | PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| 405 | PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2 |
| 406 | PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| 407 | PNP: 002e.0 |
| 408 | PNP: 002e.1 |
| 409 | PNP: 002e.2 |
| 410 | PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60 |
| 411 | PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| 412 | PNP: 002e.3 |
| 413 | PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60 |
| 414 | PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| 415 | PNP: 002e.5 |
| 416 | PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60 |
| 417 | PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62 |
| 418 | PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| 419 | PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72 |
| 420 | PNP: 002e.6 |
| 421 | PNP: 002e.6 resource base 100 size 8 align 3 gran 3 limit fff flags c0000100 index 60 |
| 422 | PNP: 002e.6 resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| 423 | PNP: 002e.107 |
| 424 | PNP: 002e.207 |
| 425 | PNP: 002e.307 |
| 426 | PNP: 002e.307 resource base 28 size 0 align 0 gran 0 limit 0 flags c0000400 index 23 |
| 427 | PNP: 002e.307 resource base bf size 0 align 0 gran 0 limit 0 flags c0000400 index e4 |
| 428 | PNP: 002e.307 resource base 27 size 0 align 0 gran 0 limit 0 flags c0000400 index ed |
| 429 | PNP: 002e.407 |
| 430 | PNP: 002e.8 |
| 431 | PNP: 002e.9 |
| 432 | PNP: 002e.9 resource base 42 size 0 align 0 gran 0 limit 0 flags c0000400 index 2a |
| 433 | PNP: 002e.9 resource base e3 size 0 align 0 gran 0 limit 0 flags c0000400 index e0 |
| 434 | PNP: 002e.109 |
| 435 | PNP: 002e.209 |
| 436 | PNP: 002e.309 |
| 437 | PNP: 002e.a |
| 438 | PNP: 002e.a resource base 10 size 0 align 0 gran 0 limit 0 flags c0000400 index e7 |
| 439 | PNP: 002e.b |
| 440 | PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit fff flags c0000100 index 60 |
| 441 | PNP: 002e.b resource base 0 size 2 align 1 gran 1 limit fff flags c0000100 index 62 |
| 442 | PNP: 002e.b resource base 5 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| 443 | PNP: 002e.c |
| 444 | PNP: 002e.d |
| 445 | PNP: 002e.d resource base 90 size 0 align 0 gran 0 limit 0 flags c0000400 index ec |
| 446 | PNP: 002e.e |
| 447 | PNP: 002e.e resource base 0 size 8 align 3 gran 3 limit fff flags c0000100 index 60 |
| 448 | PNP: 002e.e resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| 449 | PNP: 002e.f |
| 450 | PCI: 00:14.4 |
| 451 | PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| 452 | PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24 |
| 453 | PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| 454 | PCI: 00:14.5 |
| 455 | PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 |
| 456 | PCI: 00:15.0 |
| 457 | PCI: 00:15.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c |
| 458 | PCI: 00:15.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| 459 | PCI: 00:15.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| 460 | PCI: 00:15.1 child on link 0 PCI: 03:00.0 |
| 461 | PCI: 00:15.1 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c |
| 462 | PCI: 00:15.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| 463 | PCI: 00:15.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| 464 | PCI: 03:00.0 |
| 465 | PCI: 03:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10 |
| 466 | PCI: 03:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 1201 index 18 |
| 467 | PCI: 03:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20 |
| 468 | PCI: 00:15.2 |
| 469 | PCI: 00:15.3 |
| 470 | PCI: 00:16.0 |
| 471 | PCI: 00:16.2 |
| 472 | PCI: 00:18.0 |
| 473 | PCI: 00:18.1 |
| 474 | PCI: 00:18.2 |
| 475 | PCI: 00:18.3 |
| 476 | PCI: 00:18.4 |
| 477 | PCI: 00:18.5 |
| 478 | PCI: 00:18.6 |
| 479 | PCI: 00:18.7 |
| 480 | DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff |
| 481 | PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff |
| 482 | PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done |
| 483 | PCI: 00:15.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff |
| 484 | PCI: 00:15.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done |
| 485 | PCI: 00:15.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff |
| 486 | PCI: 03:00.0 10 * [0x0 - 0xff] io |
| 487 | PCI: 00:15.1 io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done |
| 488 | PCI: 00:15.1 1c * [0x0 - 0xfff] io |
| 489 | PCI: 00:01.0 14 * [0x1000 - 0x10ff] io |
| 490 | PCI: 00:11.0 20 * [0x1400 - 0x140f] io |
| 491 | PCI: 00:11.0 10 * [0x1410 - 0x1417] io |
| 492 | PCI: 00:11.0 18 * [0x1418 - 0x141f] io |
| 493 | PCI: 00:11.0 14 * [0x1420 - 0x1423] io |
| 494 | PCI: 00:11.0 1c * [0x1424 - 0x1427] io |
| 495 | DOMAIN: 0000 io: base: 1428 size: 1428 align: 12 gran: 0 limit: ffff done |
| 496 | DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff |
| 497 | PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| 498 | PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| 499 | PCI: 00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| 500 | PCI: 00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| 501 | PCI: 00:15.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| 502 | PCI: 00:15.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| 503 | PCI: 00:15.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| 504 | PCI: 00:15.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| 505 | PCI: 00:15.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| 506 | PCI: 03:00.0 20 * [0x0 - 0x3fff] prefmem |
| 507 | PCI: 03:00.0 18 * [0x4000 - 0x4fff] prefmem |
| 508 | PCI: 00:15.1 prefmem: base: 5000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done |
| 509 | PCI: 00:15.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff |
| 510 | PCI: 00:15.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done |
| 511 | PCI: 00:01.0 10 * [0x0 - 0xfffffff] prefmem |
| 512 | PCI: 00:15.1 24 * [0x10000000 - 0x100fffff] prefmem |
| 513 | PCI: 00:01.0 18 * [0x10100000 - 0x1013ffff] mem |
| 514 | PCI: 00:01.1 10 * [0x10140000 - 0x10143fff] mem |
| 515 | PCI: 00:14.2 10 * [0x10144000 - 0x10147fff] mem |
| 516 | PCI: 00:12.0 10 * [0x10148000 - 0x10148fff] mem |
| 517 | PCI: 00:13.0 10 * [0x10149000 - 0x10149fff] mem |
| 518 | PCI: 00:14.5 10 * [0x1014a000 - 0x1014afff] mem |
| 519 | PCI: 00:11.0 24 * [0x1014b000 - 0x1014b3ff] mem |
| 520 | PCI: 00:12.2 10 * [0x1014c000 - 0x1014c0ff] mem |
| 521 | PCI: 00:13.2 10 * [0x1014d000 - 0x1014d0ff] mem |
| 522 | DOMAIN: 0000 mem: base: 1014d100 size: 1014d100 align: 28 gran: 0 limit: ffffffff done |
| 523 | avoid_fixed_resources: DOMAIN: 0000 |
| 524 | avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff |
| 525 | avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff |
| 526 | constrain_resources: PCI: 00:00.0 c0010058 base f8000000 limit fbffffff mem (fixed) |
| 527 | constrain_resources: PCI: 00:14.3 10000000 base 00000000 limit 00000fff io (fixed) |
| 528 | skipping PNP: 002e.307@23 fixed resource, size=0! |
| 529 | skipping PNP: 002e.307@e4 fixed resource, size=0! |
| 530 | skipping PNP: 002e.307@ed fixed resource, size=0! |
| 531 | skipping PNP: 002e.9@2a fixed resource, size=0! |
| 532 | skipping PNP: 002e.9@e0 fixed resource, size=0! |
| 533 | skipping PNP: 002e.a@e7 fixed resource, size=0! |
| 534 | skipping PNP: 002e.d@ec fixed resource, size=0! |
| 535 | avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff |
| 536 | avoid_fixed_resources:@DOMAIN: 0000 10000100 base e0000000 limit f7ffffff |
| 537 | Setting resources... |
| 538 | DOMAIN: 0000 io: base:1000 size:1428 align:12 gran:0 limit:ffff |
| 539 | PCI: 00:15.1 1c * [0x1000 - 0x1fff] io |
| 540 | PCI: 00:01.0 14 * [0x2000 - 0x20ff] io |
| 541 | PCI: 00:11.0 20 * [0x2400 - 0x240f] io |
| 542 | PCI: 00:11.0 10 * [0x2410 - 0x2417] io |
| 543 | PCI: 00:11.0 18 * [0x2418 - 0x241f] io |
| 544 | PCI: 00:11.0 14 * [0x2420 - 0x2423] io |
| 545 | PCI: 00:11.0 1c * [0x2424 - 0x2427] io |
| 546 | DOMAIN: 0000 io: next_base: 2428 size: 1428 align: 12 gran: 0 done |
| 547 | PCI: 00:14.4 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| 548 | PCI: 00:14.4 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| 549 | PCI: 00:15.0 io: base:ffff size:0 align:12 gran:12 limit:ffff |
| 550 | PCI: 00:15.0 io: next_base: ffff size: 0 align: 12 gran: 12 done |
| 551 | PCI: 00:15.1 io: base:1000 size:1000 align:12 gran:12 limit:1fff |
| 552 | PCI: 03:00.0 10 * [0x1000 - 0x10ff] io |
| 553 | PCI: 00:15.1 io: next_base: 1100 size: 1000 align: 12 gran: 12 done |
| 554 | DOMAIN: 0000 mem: base:e0000000 size:1014d100 align:28 gran:0 limit:f7ffffff |
| 555 | PCI: 00:01.0 10 * [0xe0000000 - 0xefffffff] prefmem |
| 556 | PCI: 00:15.1 24 * [0xf0000000 - 0xf00fffff] prefmem |
| 557 | PCI: 00:01.0 18 * [0xf0100000 - 0xf013ffff] mem |
| 558 | PCI: 00:01.1 10 * [0xf0140000 - 0xf0143fff] mem |
| 559 | PCI: 00:14.2 10 * [0xf0144000 - 0xf0147fff] mem |
| 560 | PCI: 00:12.0 10 * [0xf0148000 - 0xf0148fff] mem |
| 561 | PCI: 00:13.0 10 * [0xf0149000 - 0xf0149fff] mem |
| 562 | PCI: 00:14.5 10 * [0xf014a000 - 0xf014afff] mem |
| 563 | PCI: 00:11.0 24 * [0xf014b000 - 0xf014b3ff] mem |
| 564 | PCI: 00:12.2 10 * [0xf014c000 - 0xf014c0ff] mem |
| 565 | PCI: 00:13.2 10 * [0xf014d000 - 0xf014d0ff] mem |
| 566 | DOMAIN: 0000 mem: next_base: f014d100 size: 1014d100 align: 28 gran: 0 done |
| 567 | PCI: 00:14.4 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| 568 | PCI: 00:14.4 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| 569 | PCI: 00:14.4 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| 570 | PCI: 00:14.4 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| 571 | PCI: 00:15.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| 572 | PCI: 00:15.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| 573 | PCI: 00:15.0 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| 574 | PCI: 00:15.0 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| 575 | PCI: 00:15.1 prefmem: base:f0000000 size:100000 align:20 gran:20 limit:f00fffff |
| 576 | PCI: 03:00.0 20 * [0xf0000000 - 0xf0003fff] prefmem |
| 577 | PCI: 03:00.0 18 * [0xf0004000 - 0xf0004fff] prefmem |
| 578 | PCI: 00:15.1 prefmem: next_base: f0005000 size: 100000 align: 20 gran: 20 done |
| 579 | PCI: 00:15.1 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff |
| 580 | PCI: 00:15.1 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done |
| 581 | Root Device assign_resources, bus 0 link: 0 |
| 582 | |
| 583 | Fam14h - domain_set_resources |
| 584 | amsr - incoming dev = 00135040 |
| 585 | adsr: (before) basek = 0, limitk = 21effffff. |
| 586 | adsr: (after) basek = 0, limitk = 87bfff, sizek = 87c000. |
| 587 | adsr - 0xa0000 to 0xbffff resource. |
| 588 | adsr: mmio_basek=00380000, basek=00000300, limitk=0087bfff |
| 589 | 0: mmio_basek=00380000, basek=00400000, limitk=0087bfff |
| 590 | adsr - mmio_basek = 380000. |
| 591 | DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| 592 | |
| 593 | Fam14h - nb_set_resources |
| 594 | |
| 595 | Fam14h - create_vga_resource |
| 596 | |
| 597 | Fam14h - set_resource |
| 598 | PCI: 00:01.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem |
| 599 | PCI: 00:01.0 14 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io |
| 600 | PCI: 00:01.0 18 <- [0x00f0100000 - 0x00f013ffff] size 0x00040000 gran 0x12 mem |
| 601 | PCI: 00:01.1 10 <- [0x00f0140000 - 0x00f0143fff] size 0x00004000 gran 0x0e mem |
| 602 | PCI: 00:11.0 10 <- [0x0000002410 - 0x0000002417] size 0x00000008 gran 0x03 io |
| 603 | PCI: 00:11.0 14 <- [0x0000002420 - 0x0000002423] size 0x00000004 gran 0x02 io |
| 604 | PCI: 00:11.0 18 <- [0x0000002418 - 0x000000241f] size 0x00000008 gran 0x03 io |
| 605 | PCI: 00:11.0 1c <- [0x0000002424 - 0x0000002427] size 0x00000004 gran 0x02 io |
| 606 | PCI: 00:11.0 20 <- [0x0000002400 - 0x000000240f] size 0x00000010 gran 0x04 io |
| 607 | PCI: 00:11.0 24 <- [0x00f014b000 - 0x00f014b3ff] size 0x00000400 gran 0x0a mem |
| 608 | PCI: 00:12.0 10 <- [0x00f0148000 - 0x00f0148fff] size 0x00001000 gran 0x0c mem |
| 609 | PCI: 00:12.2 10 <- [0x00f014c000 - 0x00f014c0ff] size 0x00000100 gran 0x08 mem |
| 610 | PCI: 00:13.0 10 <- [0x00f0149000 - 0x00f0149fff] size 0x00001000 gran 0x0c mem |
| 611 | PCI: 00:13.2 10 <- [0x00f014d000 - 0x00f014d0ff] size 0x00000100 gran 0x08 mem |
| 612 | PCI: 00:14.2 10 <- [0x00f0144000 - 0x00f0147fff] size 0x00004000 gran 0x0e mem64 |
| 613 | SB800 - Lpc.c - lpc_set_resources - Start. |
| 614 | PCI: 00:14.3 assign_resources, bus 0 link: 0 |
| 615 | PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io |
| 616 | PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq |
| 617 | PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io |
| 618 | PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io |
| 619 | PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq |
| 620 | PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq |
| 621 | PNP: 002e.307 23 <- [0x0000000028 - 0x0000000027] size 0x00000000 gran 0x00 irq |
| 622 | PNP: 002e.307 e4 <- [0x00000000bf - 0x00000000be] size 0x00000000 gran 0x00 irq |
| 623 | PNP: 002e.307 ed <- [0x0000000027 - 0x0000000026] size 0x00000000 gran 0x00 irq |
| 624 | PNP: 002e.9 2a <- [0x0000000042 - 0x0000000041] size 0x00000000 gran 0x00 irq |
| 625 | PNP: 002e.9 e0 <- [0x00000000e3 - 0x00000000e2] size 0x00000000 gran 0x00 irq |
| 626 | PNP: 002e.a e7 <- [0x0000000010 - 0x000000000f] size 0x00000000 gran 0x00 irq |
| 627 | PNP: 002e.b 60 <- [0x0000000290 - 0x0000000291] size 0x00000002 gran 0x01 io |
| 628 | PNP: 002e.b 62 <- [0x0000000000 - 0x0000000001] size 0x00000002 gran 0x01 io |
| 629 | PNP: 002e.b 70 <- [0x0000000005 - 0x0000000005] size 0x00000001 gran 0x00 irq |
| 630 | PNP: 002e.d ec <- [0x0000000090 - 0x000000008f] size 0x00000000 gran 0x00 irq |
| 631 | PCI: 00:14.3 assign_resources, bus 0 link: 0 |
| 632 | SB800 - Lpc.c - lpc_set_resources - End. |
| 633 | PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io |
| 634 | PCI: 00:14.4 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem |
| 635 | PCI: 00:14.4 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 mem |
| 636 | PCI: 00:14.5 10 <- [0x00f014a000 - 0x00f014afff] size 0x00001000 gran 0x0c mem |
| 637 | PCI: 00:15.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io |
| 638 | PCI: 00:15.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem |
| 639 | PCI: 00:15.0 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 mem |
| 640 | PCI: 00:15.1 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 03 io |
| 641 | PCI: 00:15.1 24 <- [0x00f0000000 - 0x00f00fffff] size 0x00100000 gran 0x14 bus 03 prefmem |
| 642 | PCI: 00:15.1 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 03 mem |
| 643 | PCI: 00:15.1 assign_resources, bus 3 link: 0 |
| 644 | PCI: 03:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io |
| 645 | PCI: 03:00.0 18 <- [0x00f0004000 - 0x00f0004fff] size 0x00001000 gran 0x0c prefmem64 |
| 646 | PCI: 03:00.0 20 <- [0x00f0000000 - 0x00f0003fff] size 0x00004000 gran 0x0e prefmem64 |
| 647 | PCI: 00:15.1 assign_resources, bus 3 link: 0 |
| 648 | DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| 649 | adsr - leaving this lovely routine. |
| 650 | Root Device assign_resources, bus 0 link: 0 |
| 651 | Done setting resources. |
| 652 | Show resources in subtree (Root Device)...After assigning values. |
| 653 | Root Device child on link 0 CPU_CLUSTER: 0 |
| 654 | CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| 655 | APIC: 00 |
| 656 | APIC: 01 |
| 657 | DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| 658 | DOMAIN: 0000 resource base 1000 size 1428 align 12 gran 0 limit ffff flags 40040100 index 10000000 |
| 659 | DOMAIN: 0000 resource base e0000000 size 1014d100 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100 |
| 660 | DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10 |
| 661 | DOMAIN: 0000 resource base c0000 size dff40000 align 0 gran 0 limit 0 flags e0004200 index 20 |
| 662 | DOMAIN: 0000 resource base 100000000 size 11efffc00 align 0 gran 0 limit 0 flags e0004200 index 30 |
| 663 | DOMAIN: 0000 resource base c8000000 size 18000000 align 0 gran 0 limit 0 flags f0000200 index 7 |
| 664 | PCI: 00:00.0 |
| 665 | PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 |
| 666 | PCI: 00:01.0 |
| 667 | PCI: 00:01.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001200 index 10 |
| 668 | PCI: 00:01.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 14 |
| 669 | PCI: 00:01.0 resource base f0100000 size 40000 align 18 gran 18 limit f013ffff flags 60000200 index 18 |
| 670 | PCI: 00:01.1 |
| 671 | PCI: 00:01.1 resource base f0140000 size 4000 align 14 gran 14 limit f0143fff flags 60000200 index 10 |
| 672 | PCI: 00:04.0 |
| 673 | PCI: 00:05.0 |
| 674 | PCI: 00:06.0 |
| 675 | PCI: 00:07.0 |
| 676 | PCI: 00:08.0 |
| 677 | PCI: 00:11.0 |
| 678 | PCI: 00:11.0 resource base 2410 size 8 align 3 gran 3 limit 2417 flags 60000100 index 10 |
| 679 | PCI: 00:11.0 resource base 2420 size 4 align 2 gran 2 limit 2423 flags 60000100 index 14 |
| 680 | PCI: 00:11.0 resource base 2418 size 8 align 3 gran 3 limit 241f flags 60000100 index 18 |
| 681 | PCI: 00:11.0 resource base 2424 size 4 align 2 gran 2 limit 2427 flags 60000100 index 1c |
| 682 | PCI: 00:11.0 resource base 2400 size 10 align 4 gran 4 limit 240f flags 60000100 index 20 |
| 683 | PCI: 00:11.0 resource base f014b000 size 400 align 12 gran 10 limit f014b3ff flags 60000200 index 24 |
| 684 | PCI: 00:12.0 |
| 685 | PCI: 00:12.0 resource base f0148000 size 1000 align 12 gran 12 limit f0148fff flags 60000200 index 10 |
| 686 | PCI: 00:12.2 |
| 687 | PCI: 00:12.2 resource base f014c000 size 100 align 12 gran 8 limit f014c0ff flags 60000200 index 10 |
| 688 | PCI: 00:13.0 |
| 689 | PCI: 00:13.0 resource base f0149000 size 1000 align 12 gran 12 limit f0149fff flags 60000200 index 10 |
| 690 | PCI: 00:13.2 |
| 691 | PCI: 00:13.2 resource base f014d000 size 100 align 12 gran 8 limit f014d0ff flags 60000200 index 10 |
| 692 | PCI: 00:14.0 child on link 0 I2C: 00:50 |
| 693 | I2C: 00:50 |
| 694 | I2C: 00:51 |
| 695 | PCI: 00:14.1 |
| 696 | PCI: 00:14.2 |
| 697 | PCI: 00:14.2 resource base f0144000 size 4000 align 14 gran 14 limit f0147fff flags 60000201 index 10 |
| 698 | PCI: 00:14.3 child on link 0 PNP: 002e.0 |
| 699 | PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| 700 | PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| 701 | PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2 |
| 702 | PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| 703 | PNP: 002e.0 |
| 704 | PNP: 002e.1 |
| 705 | PNP: 002e.2 |
| 706 | PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit fff flags e0000100 index 60 |
| 707 | PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| 708 | PNP: 002e.3 |
| 709 | PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60 |
| 710 | PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| 711 | PNP: 002e.5 |
| 712 | PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60 |
| 713 | PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62 |
| 714 | PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| 715 | PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72 |
| 716 | PNP: 002e.6 |
| 717 | PNP: 002e.6 resource base 100 size 8 align 3 gran 3 limit fff flags c0000100 index 60 |
| 718 | PNP: 002e.6 resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| 719 | PNP: 002e.107 |
| 720 | PNP: 002e.207 |
| 721 | PNP: 002e.307 |
| 722 | PNP: 002e.307 resource base 28 size 0 align 0 gran 0 limit 0 flags e0000400 index 23 |
| 723 | PNP: 002e.307 resource base bf size 0 align 0 gran 0 limit 0 flags e0000400 index e4 |
| 724 | PNP: 002e.307 resource base 27 size 0 align 0 gran 0 limit 0 flags e0000400 index ed |
| 725 | PNP: 002e.407 |
| 726 | PNP: 002e.8 |
| 727 | PNP: 002e.9 |
| 728 | PNP: 002e.9 resource base 42 size 0 align 0 gran 0 limit 0 flags e0000400 index 2a |
| 729 | PNP: 002e.9 resource base e3 size 0 align 0 gran 0 limit 0 flags e0000400 index e0 |
| 730 | PNP: 002e.109 |
| 731 | PNP: 002e.209 |
| 732 | PNP: 002e.309 |
| 733 | PNP: 002e.a |
| 734 | PNP: 002e.a resource base 10 size 0 align 0 gran 0 limit 0 flags e0000400 index e7 |
| 735 | PNP: 002e.b |
| 736 | PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit fff flags e0000100 index 60 |
| 737 | PNP: 002e.b resource base 0 size 2 align 1 gran 1 limit fff flags e0000100 index 62 |
| 738 | PNP: 002e.b resource base 5 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 |
| 739 | PNP: 002e.c |
| 740 | PNP: 002e.d |
| 741 | PNP: 002e.d resource base 90 size 0 align 0 gran 0 limit 0 flags e0000400 index ec |
| 742 | PNP: 002e.e |
| 743 | PNP: 002e.e resource base 0 size 8 align 3 gran 3 limit fff flags c0000100 index 60 |
| 744 | PNP: 002e.e resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 |
| 745 | PNP: 002e.f |
| 746 | PCI: 00:14.4 |
| 747 | PCI: 00:14.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| 748 | PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 |
| 749 | PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20 |
| 750 | PCI: 00:14.5 |
| 751 | PCI: 00:14.5 resource base f014a000 size 1000 align 12 gran 12 limit f014afff flags 60000200 index 10 |
| 752 | PCI: 00:15.0 |
| 753 | PCI: 00:15.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c |
| 754 | PCI: 00:15.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 |
| 755 | PCI: 00:15.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20 |
| 756 | PCI: 00:15.1 child on link 0 PCI: 03:00.0 |
| 757 | PCI: 00:15.1 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c |
| 758 | PCI: 00:15.1 resource base f0000000 size 100000 align 20 gran 20 limit f00fffff flags 60081202 index 24 |
| 759 | PCI: 00:15.1 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20 |
| 760 | PCI: 03:00.0 |
| 761 | PCI: 03:00.0 resource base 1000 size 100 align 8 gran 8 limit 10ff flags 60000100 index 10 |
| 762 | PCI: 03:00.0 resource base f0004000 size 1000 align 12 gran 12 limit f0004fff flags 60001201 index 18 |
| 763 | PCI: 03:00.0 resource base f0000000 size 4000 align 14 gran 14 limit f0003fff flags 60001201 index 20 |
| 764 | PCI: 00:15.2 |
| 765 | PCI: 00:15.3 |
| 766 | PCI: 00:16.0 |
| 767 | PCI: 00:16.2 |
| 768 | PCI: 00:18.0 |
| 769 | PCI: 00:18.1 |
| 770 | PCI: 00:18.2 |
| 771 | PCI: 00:18.3 |
| 772 | PCI: 00:18.4 |
| 773 | PCI: 00:18.5 |
| 774 | PCI: 00:18.6 |
| 775 | PCI: 00:18.7 |
| 776 | Done allocating resources. |
| 777 | BS: BS_DEV_RESOURCES times (us): entry 0 run 3378 exit 0 |
| 778 | Warning: Can't write PCI_INTR 0xC00/0xC01 registers because |
| 779 | 'mainboard_picr_data' or 'mainboard_intr_data' tables are NULL |
| 780 | Warning: Can't write PCI IRQ assignments because 'mainboard_pirq_data' structure does not exist |
| 781 | Enabling resources... |
| 782 | |
| 783 | Fam14h - domain_enable_resources |
| 784 | AmdInitMid: Start |
| 785 | |
| 786 | DispatchCpuFeatures: MidStart |
| 787 | DispatchCpuFeatures: MidEnd |
| 788 | GfxInitAtMidPost Enter |
| 789 | S3 Save: PCI WR Address: 0x000c10bc Data: 0x00000000 |
| 790 | S3 Save: PCI WR Address: 0x000c10b8 Data: 0x00000000 |
| 791 | S3 Save: PCI WR Address: 0x000c10b4 Data: 0x00000000 |
| 792 | S3 Save: PCI WR Address: 0x000c10b0 Data: 0x00000000 |
| 793 | S3 Save: PCI WR Address: 0x000c10ac Data: 0x00000000 |
| 794 | S3 Save: PCI WR Address: 0x000c10a8 Data: 0x00000000 |
| 795 | S3 Save: PCI WR Address: 0x000c10a4 Data: 0x00000000 |
| 796 | S3 Save: PCI WR Address: 0x000c10a0 Data: 0x00000000 |
| 797 | S3 Save: PCI WR Address: 0x000c109c Data: 0x00000000 |
| 798 | S3 Save: PCI WR Address: 0x000c1098 Data: 0x00000000 |
| 799 | S3 Save: PCI WR Address: 0x000c1094 Data: 0x00000000 |
| 800 | S3 Save: PCI WR Address: 0x000c1090 Data: 0x00000000 |
| 801 | S3 Save: PCI WR Address: 0x000c108c Data: 0x00fecf00 |
| 802 | S3 Save: PCI WR Address: 0x000c1088 Data: 0x00e00003 |
| 803 | S3 Save: PCI WR Address: 0x000c1084 Data: 0x00fedf80 |
| 804 | S3 Save: PCI WR Address: 0x000c1080 Data: 0x00fed003 |
| 805 | S3 Save: PCI WR Address: 0x00008024 Data: 0x00000000 |
| 806 | S3 Save: PCI WR Address: 0x00008020 Data: 0x00000000 |
| 807 | S3 Save: PCI WR Address: 0x0000801c Data: 0x00000000 |
| 808 | S3 Save: PCI WR Address: 0x00008018 Data: 0xf0100000 |
| 809 | S3 Save: PCI WR Address: 0x00008014 Data: 0x00002001 |
| 810 | S3 Save: PCI WR Address: 0x00008010 Data: 0xe0000008 |
| 811 | S3 Save: PCI WR Address: 0x00008004 Data: 0x0006 |
| 812 | GfxGmcInit Enter |
| 813 | S3 Save: MEM WR Address: 0xf01020c0 Data: 0x00000c80 |
| 814 | S3 Save: MEM WR Address: 0xf01020b8 Data: 0x00000400 |
| 815 | S3 Save: MEM WR Address: 0xf01020bc Data: 0x00000400 |
| 816 | S3 Save: MEM WR Address: 0xf0102640 Data: 0x00000400 |
| 817 | S3 Save: MEM WR Address: 0xf010263c Data: 0x00000400 |
| 818 | S3 Save: MEM WR Address: 0xf0102638 Data: 0x00000400 |
| 819 | S3 Save: MEM WR Address: 0xf01015c0 Data: 0x00081401 |
| 820 | S3 Save: MEM WR Address: 0xf010281c Data: 0x00000001 |
| 821 | S3 Save: MEM WR Address: 0xf0102824 Data: 0x00000109 |
| 822 | S3 Save: MEM WR Address: 0xf010282c Data: 0x00000201 |
| 823 | S3 Save: MEM WR Address: 0xf0102834 Data: 0x00000309 |
| 824 | S3 Save: MEM WR Address: 0xf010283c Data: 0x01f83ce0 |
| 825 | S3 Save: MEM WR Address: 0xf0102840 Data: 0x01f83ce0 |
| 826 | S3 Save: MEM WR Address: 0xf010284c Data: 0x00020077 |
| 827 | S3 Save: MEM WR Address: 0xf010284c Data: 0x00030077 |
| 828 | S3 Save: MEM WR Address: 0xf010284c Data: 0x00030077 |
| 829 | S3 Save: MEM WR Address: 0xf0102854 Data: 0x00000100 |
| 830 | S3 Save: MEM WR Address: 0xf0102858 Data: 0x00000200 |
| 831 | S3 Save: MEM WR Address: 0xf010285c Data: 0x60002001 |
| 832 | S3 Save: MEM WR Address: 0xf010277c Data: 0x0e0e0808 |
| 833 | S3 Save: MEM WR Address: 0xf01028d8 Data: 0x0e0e0808 |
| 834 | S3 Save: MEM WR Address: 0xf0102780 Data: 0x0a110715 |
| 835 | S3 Save: MEM WR Address: 0xf01028dc Data: 0x0a110715 |
| 836 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x00000000 |
| 837 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x001e0a07 |
| 838 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x00000020 |
| 839 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x00050500 |
| 840 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x00000027 |
| 841 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x0001050c |
| 842 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x0000002a |
| 843 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x0001051c |
| 844 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x0000002d |
| 845 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x00030534 |
| 846 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x00000032 |
| 847 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x0001053e |
| 848 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x00000035 |
| 849 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x00010546 |
| 850 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x00000038 |
| 851 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x0002054e |
| 852 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x0000003c |
| 853 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x00010557 |
| 854 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x0000003f |
| 855 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x0001055f |
| 856 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x00000042 |
| 857 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x00010567 |
| 858 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x00000045 |
| 859 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x0001056f |
| 860 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x00000048 |
| 861 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x00050572 |
| 862 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x0000004f |
| 863 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x00000800 |
| 864 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x00000051 |
| 865 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x00260801 |
| 866 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x00000079 |
| 867 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x004b082d |
| 868 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x000000c6 |
| 869 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x0013088d |
| 870 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x000000db |
| 871 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x100008a1 |
| 872 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x00000040 |
| 873 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x00000040 |
| 874 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x000000df |
| 875 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x000008a2 |
| 876 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x000000e1 |
| 877 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x0001094d |
| 878 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x000000e4 |
| 879 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x00000952 |
| 880 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x000000e6 |
| 881 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x00010954 |
| 882 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x000000e9 |
| 883 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x0009095a |
| 884 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x000000f4 |
| 885 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x0022096e |
| 886 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x00000118 |
| 887 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x000e0997 |
| 888 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x00000128 |
| 889 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x100009a6 |
| 890 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x00000040 |
| 891 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x00000040 |
| 892 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x0000012c |
| 893 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x000009a7 |
| 894 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x0000012e |
| 895 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x002e09d7 |
| 896 | S3 Save: MEM WR Address: 0xf0102b8c Data: 0x0000015e |
| 897 | S3 Save: MEM WR Address: 0xf0102b90 Data: 0x00170a26 |
| 898 | S3 Save: MEM WR Address: 0xf0102b94 Data: 0x5d976000 |
| 899 | S3 Save: MEM WR Address: 0xf0102b98 Data: 0x410af020 |
| 900 | S3 Save: MEM WR Address: 0xf0102024 Data: 0x0f170f00 |
| 901 | S3 Save: MEM WR Address: 0xf0102898 Data: 0x0f000c80 |
| 902 | S3 Save: MEM WR Address: 0xf0102c04 Data: 0x0f000000 |
| 903 | S3 Save: MEM WR Address: 0xf0105428 Data: 0x18000000 |
| 904 | S3 Save: MEM WR Address: 0xf0105490 Data: 0x00000001 |
| 905 | S3 Save: MEM WR Address: 0xf0105490 Data: 0x00000003 |
| 906 | S3 Save: MEM WR Address: 0xf010286c Data: 0x00000c80 |
| 907 | S3 Save: MEM WR Address: 0xf010287c Data: 0x00000dff |
| 908 | S3 Save: MEM WR Address: 0xf0102894 Data: 0x000dfffb |
| 909 | S3 Save: MEM WR Address: 0xf0102870 Data: 0x000fffff |
| 910 | S3 Save: MEM WR Address: 0xf0102874 Data: 0x000fffff |
| 911 | S3 Save: MEM WR Address: 0xf0102878 Data: 0x000fffff |
| 912 | S3 Save: MEM WR Address: 0xf010288c Data: 0x000021f0 |
| 913 | S3 Save: MEM WR Address: 0xf0102890 Data: 0x000021ff |
| 914 | S3 Save: MEM WR Address: 0xf0102864 Data: 0x32100876 |
| 915 | S3 Save: MEM WR Address: 0xf0102b98 Data: 0x490af020 |
| 916 | S3 Save: MEM WR Address: 0xf01027cc Data: 0x00032005 |
| 917 | S3 Save: MEM WR Address: 0xf01027dc Data: 0x00734847 |
| 918 | S3 Save: MEM WR Address: 0xf01027d0 Data: 0x00012008 |
| 919 | S3 Save: MEM WR Address: 0xf01027e0 Data: 0x00003d3c |
| 920 | S3 Save: MEM WR Address: 0xf0102784 Data: 0x00000007 |
| 921 | S3 Save: MEM WR Address: 0xf01021c8 Data: 0x0000a1f1 |
| 922 | S3 Save: MEM WR Address: 0xf010217c Data: 0x0000a1f1 |
| 923 | S3 Save: MEM WR Address: 0xf0102188 Data: 0x000221b1 |
| 924 | S3 Save: MEM WR Address: 0xf0102814 Data: 0x00000200 |
| 925 | S3 Save: MEM WR Address: 0xf010201c Data: 0x03330003 |
| 926 | S3 Save: MEM WR Address: 0xf0102020 Data: 0x70760007 |
| 927 | S3 Save: MEM WR Address: 0xf0102018 Data: 0x00000050 |
| 928 | S3 Save: MEM WR Address: 0xf0102014 Data: 0x00005500 |
| 929 | S3 Save: MEM WR Address: 0xf0102610 Data: 0x44111222 |
| 930 | S3 Save: MEM WR Address: 0xf0102618 Data: 0x00006664 |
| 931 | S3 Save: MEM WR Address: 0xf0102614 Data: 0x11333111 |
| 932 | S3 Save: MEM WR Address: 0xf010261c Data: 0x00000003 |
| 933 | S3 Save: MEM WR Address: 0xf010279c Data: 0xfcfcfdfc |
| 934 | S3 Save: MEM WR Address: 0xf01027a0 Data: 0xfcfcfdfc |
| 935 | S3 Save: MEM WR Address: 0xf01025c8 Data: 0x007f605f |
| 936 | S3 Save: MEM WR Address: 0xf01025cc Data: 0x00007f7e |
| 937 | S3 Save: MEM WR Address: 0xf01020b4 Data: 0x00000000 |
| 938 | S3 Save: MEM WR Address: 0xf01028c8 Data: 0x00000003 |
| 939 | S3 Save: MEM WR Address: 0xf010202c Data: 0x0003ffff |
| 940 | S3 Save: MEM WR Address: 0xf01025c0 Data: 0x00000000 |
| 941 | S3 Save: MEM WR Address: 0xf01020ec Data: 0x000001fc |
| 942 | S3 Save: MEM WR Address: 0xf01020d4 Data: 0x00000016 |
| 943 | S3 Save: MEM WR Address: 0xf01020c0 Data: 0x00040c80 |
| 944 | S3 Save: MEM WR Address: 0xf01020b8 Data: 0x00040400 |
| 945 | S3 Save: MEM WR Address: 0xf01020bc Data: 0x00040400 |
| 946 | S3 Save: MEM WR Address: 0xf0102640 Data: 0x00040400 |
| 947 | S3 Save: MEM WR Address: 0xf010263c Data: 0x00040400 |
| 948 | S3 Save: MEM WR Address: 0xf0102638 Data: 0x00040400 |
| 949 | S3 Save: MEM WR Address: 0xf01015c0 Data: 0x000c1401 |
| 950 | S3 Save: MEM WR Address: 0xf0102b94 Data: 0x5d976001 |
| 951 | S3 Save: MEM WR Address: 0xf0102b98 Data: 0x490af820 |
| 952 | GfxGmcInit Exit |
| 953 | GfxSetBootUpVoltage Enter |
| 954 | S3 Save: MEM WR Address: 0xf0100770 Data: 0x0000000e |
| 955 | S3 Save: MEM WR Address: 0xf0100770 Data: 0x0000000b |
| 956 | GfxSetBootUpVoltage Exit |
| 957 | S3 Save: PCI WR Address: 0x0000804c Data: 0x98021002 |
| 958 | S3 Save: PCI WR Address: 0x0000904c Data: 0x13141002 |
| 959 | GfxInitAtMidPost Exit [0x0] |
| 960 | GfxIntegratedInfoTableEntry Enter |
| 961 | GfxIntegratedInfoTableInit Enter |
| 962 | GfxIntegratedEnumerateAllConnectors Enter |
| 963 | Allocate Display Connector at Primary sPath[0] |
| 964 | usDeviceConnector = 0x3113 |
| 965 | usDeviceTag = 0x8 |
| 966 | usDeviceACPIEnum = 0x210 |
| 967 | usExtEncoderObjId = 0x0 |
| 968 | ucChannelMapping = 0xe4 |
| 969 | Allocate Display Connector at Primary sPath[1] |
| 970 | usDeviceConnector = 0x3213 |
| 971 | usDeviceTag = 0x80 |
| 972 | usDeviceACPIEnum = 0x220 |
| 973 | usExtEncoderObjId = 0x0 |
| 974 | ucChannelMapping = 0xe4 |
| 975 | GfxIntegratedEnumerateAllConnectors Exit [0x0] |
| 976 | < --- Power Play Table ------ > |
| 977 | Table Revision = 1 |
| 978 | State #1 |
| 979 | Classification 0x4000 |
| 980 | VCLK = 40000kHz |
| 981 | DCLK = 30477kHz |
| 982 | DPM State Index: 0 |
| 983 | State #2 |
| 984 | Classification 0x400 |
| 985 | VCLK = 53334kHz |
| 986 | DCLK = 40000kHz |
| 987 | DPM State Index: 1 |
| 988 | State #3 |
| 989 | Classification 0x1 |
| 990 | VCLK = 0kHz |
| 991 | DCLK = 0kHz |
| 992 | DPM State Index: 0 |
| 993 | State #4 |
| 994 | Classification 0x5 |
| 995 | VCLK = 0kHz |
| 996 | DCLK = 0kHz |
| 997 | DPM State Index: 0 2 |
| 998 | State #5 |
| 999 | Classification 0x8 |
| 1000 | VCLK = 0kHz |
| 1001 | DCLK = 0kHz |
| 1002 | DPM State Index: 3 |
| 1003 | State #6 |
| 1004 | Classification 0x10 |
| 1005 | VCLK = 0kHz |
| 1006 | DCLK = 0kHz |
| 1007 | DPM State Index: 4 |
| 1008 | DPM State #0 |
| 1009 | SCLK = 27827 |
| 1010 | VID index = 0 |
| 1011 | tdpLimit = 0 |
| 1012 | DPM State #1 |
| 1013 | SCLK = 49231 |
| 1014 | VID index = 2 |
| 1015 | tdpLimit = 0 |
| 1016 | DPM State #2 |
| 1017 | SCLK = 49231 |
| 1018 | VID index = 1 |
| 1019 | tdpLimit = 0 |
| 1020 | DPM State #3 |
| 1021 | SCLK = 20000 |
| 1022 | VID index = 0 |
| 1023 | tdpLimit = 0 |
| 1024 | DPM State #4 |
| 1025 | SCLK = 17778 |
| 1026 | VID index = 0 |
| 1027 | tdpLimit = 0 |
| 1028 | ulSB_MMIO_Base_Addr = 0xfed80000 |
| 1029 | GfxIntegratedInfoTableInit Exit [0x0] |
| 1030 | GfxIntegratedInfoTableEntry Exit[0x0] |
| 1031 | PcieInitAtMid Enter |
| 1032 | S3 Save: PCI WR Address: 0x00000060 Data: 0x0000008c |
| 1033 | S3 Save: PCI WR Address: 0x00000064 Data: 0x00000000 |
| 1034 | S3 Save: PCI WR Address: 0x00000060 Data: 0x00000080 |
| 1035 | S3 Save: PCI WR Address: 0x00000064 Data: 0x00000042 |
| 1036 | *WR PCIEIND_P (0:4:0):0x00a2 = 0x00601436 |
| 1037 | S3 Save: PCI WR Address: 0x000200e0 Data: 0x000200a2 |
| 1038 | S3 Save: PCI WR Address: 0x000200e4 Data: 0x00601436 |
| 1039 | *WR PCIEIND_P (0:4:0):0x00c0 = 0x00008000 |
| 1040 | S3 Save: PCI WR Address: 0x000200e0 Data: 0x000200c0 |
| 1041 | S3 Save: PCI WR Address: 0x000200e4 Data: 0x00008000 |
| 1042 | PcieAspmCallback for Device = 0:4:0 |
| 1043 | S3 Save: PCI WR Address: 0x00020018 Data: 0x00000000 |
| 1044 | *WR PCIEIND_P (0:8:0):0x00a2 = 0x00701636 |
| 1045 | S3 Save: PCI WR Address: 0x000400e0 Data: 0x000200a2 |
| 1046 | S3 Save: PCI WR Address: 0x000400e4 Data: 0x00701636 |
| 1047 | *WR PCIEIND_P (0:8:0):0x00c0 = 0x00008000 |
| 1048 | S3 Save: PCI WR Address: 0x000400e0 Data: 0x000200c0 |
| 1049 | S3 Save: PCI WR Address: 0x000400e4 Data: 0x00008000 |
| 1050 | S3 Save: PCI WR Address: 0x0004006c Data: 0x00442580 |
| 1051 | S3 Save: IO WR Address: 0x00000cd8 Data: 0x40000038 |
| 1052 | S3 Save: IO WR Address: 0x00000cdc Data: 0x000000a0 |
| 1053 | S3 Save: IO WR Address: 0x00000cd8 Data: 0x4000003c |
| 1054 | S3 Save: IO WR Address: 0x00000cdc Data: 0x60006930 |
| 1055 | S3 Save: IO WR Address: 0x00000cd8 Data: 0x80000068 |
| 1056 | S3 Save: IO WR Address: 0x00000cdc Data: 0x10410003 |
| 1057 | S3 Save: PCI WR Address: 0x00040068 Data: 0x03 |
| 1058 | PcieFmSetBootUpVoltage Enter |
| 1059 | *WR SMUx0B:0x8600 = 0x18650a2 |
| 1060 | *WR SMUx0B:0x8604 = 0x7000fe04 |
| 1061 | *WR SMUx0B:0x8608 = 0xc0000000 |
| 1062 | NbSmuServiceRequest Enter [0x0b] |
| 1063 | NbSmuServiceRequest Exit |
| 1064 | Set Voltage for Gen 2, Vid Index 3 |
| 1065 | S3 Save: PCI WR Address: 0x00000060 Data: 0x000000ea |
| 1066 | S3 Save: PCI WR Address: 0x00000060 Data: 0x000000ea |
| 1067 | S3 Save: PCI WR Address: 0x00000064 Data: 0x0000001e |
| 1068 | S3 Save: PCI WR Address: 0x00000060 Data: 0x000000ea |
| 1069 | S3 Save: PCI WR Address: 0x00000064 Data: 0x00000012 |
| 1070 | S3 Save: PCI WR Address: 0x00000060 Data: 0x000000eb |
| 1071 | S3 Save: PCI WR Address: 0x00000060 Data: 0x000000ea |
| 1072 | S3 Save: PCI WR Address: 0x00000060 Data: 0x000000ea |
| 1073 | S3 Save: PCI WR Address: 0x00000064 Data: 0x00000012 |
| 1074 | S3 Save: PCI WR Address: 0x00000060 Data: 0x000000ea |
| 1075 | S3 Save: PCI WR Address: 0x00000064 Data: 0x0000001e |
| 1076 | S3 Save: PCI WR Address: 0x00000060 Data: 0x000000eb |
| 1077 | PcieFmSetBootUpVoltage Exit |
| 1078 | PcieLateInit Enter |
| 1079 | PciePwrPowerDownUnusedLanes Enter |
| 1080 | *WR GPP WRAP (0:0:0):0x01308023 = 0x0000000f |
| 1081 | S3 Save: PCI WR Address: 0x000000e0 Data: 0x01308023 |
| 1082 | S3 Save: PCI WR Address: 0x000000e4 Data: 0x0000000f |
| 1083 | PciePifPllPowerDown Enter |
| 1084 | *WR GPP PIF0 (0:0:0):0x01100013 = 0x00011ff7 |
| 1085 | S3 Save: PCI WR Address: 0x000000e0 Data: 0x01100013 |
| 1086 | S3 Save: PCI WR Address: 0x000000e4 Data: 0x00011ff7 |
| 1087 | PciePifPllPowerDown Exit |
| 1088 | PciePwrPowerDownUnusedLanes Exit |
| 1089 | PciePwrPowerDownPllInL1 Enter |
| 1090 | PcieLanesToPowerDownPllInL1 Enter |
| 1091 | Engine 4 Active Lanes 0x0, Hotplug Lanes 0x0 |
| 1092 | Engine 5 Active Lanes 0x0, Hotplug Lanes 0x0 |
| 1093 | Engine 6 Active Lanes 0x0, Hotplug Lanes 0x0 |
| 1094 | Engine 7 Active Lanes 0x0, Hotplug Lanes 0x0 |
| 1095 | Engine 8 Active Lanes 0xf, Hotplug Lanes 0x0 |
| 1096 | Index 0 Final Latency 255 |
| 1097 | Index 1 Final Latency 255 |
| 1098 | Index 2 Final Latency 255 |
| 1099 | Index 3 Final Latency 255 |
| 1100 | Lane bitmap ffff |
| 1101 | PcieLanesToPowerDownPllInL1 Exit |
| 1102 | *WR GPP PIF0 (0:0:0):0x01100012 = 0x01011fa2 |
| 1103 | S3 Save: PCI WR Address: 0x000000e0 Data: 0x01100012 |
| 1104 | S3 Save: PCI WR Address: 0x000000e4 Data: 0x01011fa2 |
| 1105 | *WR GPP PIF0 (0:0:0):0x01100013 = 0x01011fa2 |
| 1106 | S3 Save: PCI WR Address: 0x000000e0 Data: 0x01100013 |
| 1107 | S3 Save: PCI WR Address: 0x000000e4 Data: 0x01011fa2 |
| 1108 | PciePwrPowerDownPllInL1 Exir |
| 1109 | PciePwrClockGating Enter |
| 1110 | *WR GPP WRAP (0:0:0):0x01308014 = 0xfff11003 |
| 1111 | S3 Save: PCI WR Address: 0x000000e0 Data: 0x01308014 |
| 1112 | S3 Save: PCI WR Address: 0x000000e4 Data: 0xfff11003 |
| 1113 | *WR GPP WRAP (0:0:0):0x01308012 = 0x07810781 |
| 1114 | S3 Save: PCI WR Address: 0x000000e0 Data: 0x01308012 |
| 1115 | S3 Save: PCI WR Address: 0x000000e4 Data: 0x07810781 |
| 1116 | *WR GPP WRAP (0:0:0):0x01308011 = 0x817ffeff |
| 1117 | S3 Save: PCI WR Address: 0x000000e0 Data: 0x01308011 |
| 1118 | S3 Save: PCI WR Address: 0x000000e4 Data: 0x817ffeff |
| 1119 | *WR GPP CORE (0:0:0):0x01010011 = 0x0000000f |
| 1120 | S3 Save: PCI WR Address: 0x000000e0 Data: 0x01010011 |
| 1121 | S3 Save: PCI WR Address: 0x000000e4 Data: 0x0000000f |
| 1122 | *WR GPP WRAP (0:0:0):0x01308016 = 0x00ff0000 |
| 1123 | S3 Save: PCI WR Address: 0x000000e0 Data: 0x01308016 |
| 1124 | S3 Save: PCI WR Address: 0x000000e4 Data: 0x00ff0000 |
| 1125 | PciePwrClockGating Exit |
| 1126 | PcieLockRegisters Enter |
| 1127 | *WR GPP CORE (0:0:0):0x01010010 = 0x80631201 |
| 1128 | S3 Save: PCI WR Address: 0x000000e0 Data: 0x01010010 |
| 1129 | S3 Save: PCI WR Address: 0x000000e4 Data: 0x80631201 |
| 1130 | PcieLockRegisters Exit |
| 1131 | PcieLateInit Exit [0x0] |
| 1132 | S3 Save: PCI WR Address: 0x00000060 Data: 0x0000008c |
| 1133 | S3 Save: PCI WR Address: 0x00000064 Data: 0x000000f0 |
| 1134 | S3 Save: PCI WR Address: 0x00000060 Data: 0x00000080 |
| 1135 | S3 Save: PCI WR Address: 0x00000064 Data: 0x00000002 |
| 1136 | PcieInitAtMid Exit [0x0] |
| 1137 | NbInitAtLatePost Enter |
| 1138 | NbInitLclkDeepSleep Enter |
| 1139 | LCLK Deep Sleep [Enabled] |
| 1140 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x1b, 0x82, 0x00, 0x00, 0x00, 0x05, 0xff, 0x00, 0x00 |
| 1141 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x1d, 0x82, 0x00, 0x00, 0x00, 0x0f, 0x10, 0x00, 0x00 |
| 1142 | NbInitLclkDeepSleep Exit |
| 1143 | NbInitClockGating Enter |
| 1144 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x6f, 0x83, 0x00, 0x00, 0x00, 0xf0, 0x01, 0x60, 0x00 |
| 1145 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x71, 0x83, 0x00, 0x00, 0x00, 0xf0, 0x01, 0x70, 0x00 |
| 1146 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x73, 0x82, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00 |
| 1147 | S3 Save: PCI WR Address: 0x00000094 Data: 0x00000149 |
| 1148 | S3 Save: PCI WR Address: 0x00000098 Data: 0x003f8100 |
| 1149 | S3 Save: PCI WR Address: 0x00000094 Data: 0x0000014a |
| 1150 | S3 Save: PCI WR Address: 0x00000098 Data: 0x003f8100 |
| 1151 | S3 Save: PCI WR Address: 0x00000094 Data: 0x0000014b |
| 1152 | S3 Save: PCI WR Address: 0x00000098 Data: 0x00200100 |
| 1153 | *WR SMUx0B:0x8600 = 0x18650f5 |
| 1154 | *WR SMUx0B:0x8604 = 0x130ff04 |
| 1155 | *WR SMUx0B:0x8608 = 0xc0000000 |
| 1156 | NbSmuServiceRequest Enter [0x0b] |
| 1157 | NbSmuServiceRequest Exit |
| 1158 | *WR SRBM (GMM):0xff3001f5 = 0xffffcfff |
| 1159 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x00, 0x86, 0x11, 0x00 |
| 1160 | *WR SMUx0B:0x8600 = 0x18650f5 |
| 1161 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0xf5, 0x50, 0x86, 0x01 |
| 1162 | *WR SMUx0B:0x8604 = 0x130ff04 |
| 1163 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x04, 0xff, 0x30, 0x01 |
| 1164 | *WR SMUx0B:0x8608 = 0xc0010000 |
| 1165 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xc0 |
| 1166 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x50, 0x86, 0x11, 0x00 |
| 1167 | *WR SMUx0B:0x8650 = 0xffffcfff |
| 1168 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0xff, 0xcf, 0xff, 0xff |
| 1169 | NbSmuServiceRequest Enter [0x0b] |
| 1170 | S3 Save: DISPATCH Function Id: 0x01, Context: 0x0b |
| 1171 | NbSmuServiceRequest Exit |
| 1172 | S3 Save: PCI WR Address: 0x00000060 Data: 0x000000a2 |
| 1173 | S3 Save: PCI WR Address: 0x00000064 Data: 0x033f8100 |
| 1174 | S3 Save: PCI WR Address: 0x00000060 Data: 0x000000a3 |
| 1175 | S3 Save: PCI WR Address: 0x00000064 Data: 0x073f8100 |
| 1176 | S3 Save: PCI WR Address: 0x00000060 Data: 0x000000a4 |
| 1177 | S3 Save: PCI WR Address: 0x00000064 Data: 0x183c0100 |
| 1178 | *WR SMUx0B:0x8600 = 0x18650f5 |
| 1179 | *WR SMUx0B:0x8604 = 0x130ff04 |
| 1180 | *WR SMUx0B:0x8608 = 0xc0000000 |
| 1181 | NbSmuServiceRequest Enter [0x0b] |
| 1182 | NbSmuServiceRequest Exit |
| 1183 | *WR SRBM (GMM):0xff3001f5 = 0xffff0fff |
| 1184 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x00, 0x86, 0x11, 0x00 |
| 1185 | *WR SMUx0B:0x8600 = 0x18650f5 |
| 1186 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0xf5, 0x50, 0x86, 0x01 |
| 1187 | *WR SMUx0B:0x8604 = 0x130ff04 |
| 1188 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x04, 0xff, 0x30, 0x01 |
| 1189 | *WR SMUx0B:0x8608 = 0xc0010000 |
| 1190 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xc0 |
| 1191 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x50, 0x86, 0x11, 0x00 |
| 1192 | *WR SMUx0B:0x8650 = 0xffff0fff |
| 1193 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0xff, 0x0f, 0xff, 0xff |
| 1194 | NbSmuServiceRequest Enter [0x0b] |
| 1195 | S3 Save: DISPATCH Function Id: 0x01, Context: 0x0b |
| 1196 | NbSmuServiceRequest Exit |
| 1197 | *WR SMUx0B:0x8600 = 0x18650f4 |
| 1198 | *WR SMUx0B:0x8604 = 0x130ff04 |
| 1199 | *WR SMUx0B:0x8608 = 0xc0000000 |
| 1200 | NbSmuServiceRequest Enter [0x0b] |
| 1201 | NbSmuServiceRequest Exit |
| 1202 | *WR SRBM (GMM):0xff3001f4 = 0xffbfffff |
| 1203 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x00, 0x86, 0x11, 0x00 |
| 1204 | *WR SMUx0B:0x8600 = 0x18650f4 |
| 1205 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0xf4, 0x50, 0x86, 0x01 |
| 1206 | *WR SMUx0B:0x8604 = 0x130ff04 |
| 1207 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x04, 0xff, 0x30, 0x01 |
| 1208 | *WR SMUx0B:0x8608 = 0xc0010000 |
| 1209 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xc0 |
| 1210 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x50, 0x86, 0x11, 0x00 |
| 1211 | *WR SMUx0B:0x8650 = 0xffbfffff |
| 1212 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0xff, 0xff, 0xbf, 0xff |
| 1213 | NbSmuServiceRequest Enter [0x0b] |
| 1214 | S3 Save: DISPATCH Function Id: 0x01, Context: 0x0b |
| 1215 | NbSmuServiceRequest Exit |
| 1216 | *WR SMUx0B:0x8600 = 0x1865012 |
| 1217 | *WR SMUx0B:0x8604 = 0x1530ff04 |
| 1218 | *WR SMUx0B:0x8608 = 0xc0000000 |
| 1219 | NbSmuServiceRequest Enter [0x0b] |
| 1220 | NbSmuServiceRequest Exit |
| 1221 | *WR SRBM (GMM):0xff301512 = 0x40600100 |
| 1222 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x00, 0x86, 0x11, 0x00 |
| 1223 | *WR SMUx0B:0x8600 = 0x1865012 |
| 1224 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x12, 0x50, 0x86, 0x01 |
| 1225 | *WR SMUx0B:0x8604 = 0x1530ff04 |
| 1226 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x04, 0xff, 0x30, 0x15 |
| 1227 | *WR SMUx0B:0x8608 = 0xc0010000 |
| 1228 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xc0 |
| 1229 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x50, 0x86, 0x11, 0x00 |
| 1230 | *WR SMUx0B:0x8650 = 0x40600100 |
| 1231 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x00, 0x01, 0x60, 0x40 |
| 1232 | NbSmuServiceRequest Enter [0x0b] |
| 1233 | S3 Save: DISPATCH Function Id: 0x01, Context: 0x0b |
| 1234 | NbSmuServiceRequest Exit |
| 1235 | *WR SMUx0B:0x8600 = 0x18650f4 |
| 1236 | *WR SMUx0B:0x8604 = 0x130ff04 |
| 1237 | *WR SMUx0B:0x8608 = 0xc0000000 |
| 1238 | NbSmuServiceRequest Enter [0x0b] |
| 1239 | NbSmuServiceRequest Exit |
| 1240 | *WR SRBM (GMM):0xff3001f4 = 0xe7bfffff |
| 1241 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x00, 0x86, 0x11, 0x00 |
| 1242 | *WR SMUx0B:0x8600 = 0x18650f4 |
| 1243 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0xf4, 0x50, 0x86, 0x01 |
| 1244 | *WR SMUx0B:0x8604 = 0x130ff04 |
| 1245 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x04, 0xff, 0x30, 0x01 |
| 1246 | *WR SMUx0B:0x8608 = 0xc0010000 |
| 1247 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xc0 |
| 1248 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x50, 0x86, 0x11, 0x00 |
| 1249 | *WR SMUx0B:0x8650 = 0xe7bfffff |
| 1250 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0xff, 0xff, 0xbf, 0xe7 |
| 1251 | NbSmuServiceRequest Enter [0x0b] |
| 1252 | S3 Save: DISPATCH Function Id: 0x01, Context: 0x0b |
| 1253 | NbSmuServiceRequest Exit |
| 1254 | *WR SMUx0B:0x8600 = 0x18650f5 |
| 1255 | *WR SMUx0B:0x8604 = 0x130ff04 |
| 1256 | *WR SMUx0B:0x8608 = 0xc0000000 |
| 1257 | NbSmuServiceRequest Enter [0x0b] |
| 1258 | NbSmuServiceRequest Exit |
| 1259 | *WR SRBM (GMM):0xff3001f5 = 0xffff07ff |
| 1260 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x00, 0x86, 0x11, 0x00 |
| 1261 | *WR SMUx0B:0x8600 = 0x18650f5 |
| 1262 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0xf5, 0x50, 0x86, 0x01 |
| 1263 | *WR SMUx0B:0x8604 = 0x130ff04 |
| 1264 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x04, 0xff, 0x30, 0x01 |
| 1265 | *WR SMUx0B:0x8608 = 0xc0010000 |
| 1266 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xc0 |
| 1267 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x50, 0x86, 0x11, 0x00 |
| 1268 | *WR SMUx0B:0x8650 = 0xffff07ff |
| 1269 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0xff, 0x07, 0xff, 0xff |
| 1270 | NbSmuServiceRequest Enter [0x0b] |
| 1271 | S3 Save: DISPATCH Function Id: 0x01, Context: 0x0b |
| 1272 | NbSmuServiceRequest Exit |
| 1273 | *WR SMUx0B:0x8600 = 0x1865034 |
| 1274 | *WR SMUx0B:0x8604 = 0x130ff04 |
| 1275 | *WR SMUx0B:0x8608 = 0xc0000000 |
| 1276 | NbSmuServiceRequest Enter [0x0b] |
| 1277 | NbSmuServiceRequest Exit |
| 1278 | *WR SRBM (GMM):0xff300134 = 0x113c71 |
| 1279 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x00, 0x86, 0x11, 0x00 |
| 1280 | *WR SMUx0B:0x8600 = 0x1865034 |
| 1281 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x34, 0x50, 0x86, 0x01 |
| 1282 | *WR SMUx0B:0x8604 = 0x130ff04 |
| 1283 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x04, 0xff, 0x30, 0x01 |
| 1284 | *WR SMUx0B:0x8608 = 0xc0010000 |
| 1285 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xc0 |
| 1286 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x50, 0x86, 0x11, 0x00 |
| 1287 | *WR SMUx0B:0x8650 = 0x113c71 |
| 1288 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x71, 0x3c, 0x11, 0x00 |
| 1289 | NbSmuServiceRequest Enter [0x0b] |
| 1290 | S3 Save: DISPATCH Function Id: 0x01, Context: 0x0b |
| 1291 | NbSmuServiceRequest Exit |
| 1292 | *WR SMUx0B:0x8600 = 0x18650f4 |
| 1293 | *WR SMUx0B:0x8604 = 0x130ff04 |
| 1294 | *WR SMUx0B:0x8608 = 0xc0000000 |
| 1295 | NbSmuServiceRequest Enter [0x0b] |
| 1296 | NbSmuServiceRequest Exit |
| 1297 | *WR SRBM (GMM):0xff3001f4 = 0xe5bfffff |
| 1298 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x00, 0x86, 0x11, 0x00 |
| 1299 | *WR SMUx0B:0x8600 = 0x18650f4 |
| 1300 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0xf4, 0x50, 0x86, 0x01 |
| 1301 | *WR SMUx0B:0x8604 = 0x130ff04 |
| 1302 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x04, 0xff, 0x30, 0x01 |
| 1303 | *WR SMUx0B:0x8608 = 0xc0010000 |
| 1304 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xc0 |
| 1305 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x50, 0x86, 0x11, 0x00 |
| 1306 | *WR SMUx0B:0x8650 = 0xe5bfffff |
| 1307 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0xff, 0xff, 0xbf, 0xe5 |
| 1308 | NbSmuServiceRequest Enter [0x0b] |
| 1309 | S3 Save: DISPATCH Function Id: 0x01, Context: 0x0b |
| 1310 | NbSmuServiceRequest Exit |
| 1311 | *WR SMUx0B:0x8600 = 0x1865034 |
| 1312 | *WR SMUx0B:0x8604 = 0x130ff04 |
| 1313 | *WR SMUx0B:0x8608 = 0xc0000000 |
| 1314 | NbSmuServiceRequest Enter [0x0b] |
| 1315 | NbSmuServiceRequest Exit |
| 1316 | *WR SRBM (GMM):0xff300134 = 0x113c70 |
| 1317 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x00, 0x86, 0x11, 0x00 |
| 1318 | *WR SMUx0B:0x8600 = 0x1865034 |
| 1319 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x34, 0x50, 0x86, 0x01 |
| 1320 | *WR SMUx0B:0x8604 = 0x130ff04 |
| 1321 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x04, 0xff, 0x30, 0x01 |
| 1322 | *WR SMUx0B:0x8608 = 0xc0010000 |
| 1323 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xc0 |
| 1324 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x50, 0x86, 0x11, 0x00 |
| 1325 | *WR SMUx0B:0x8650 = 0x113c70 |
| 1326 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x70, 0x3c, 0x11, 0x00 |
| 1327 | NbSmuServiceRequest Enter [0x0b] |
| 1328 | S3 Save: DISPATCH Function Id: 0x01, Context: 0x0b |
| 1329 | NbSmuServiceRequest Exit |
| 1330 | *WR SMUx0B:0x8600 = 0x186507c |
| 1331 | *WR SMUx0B:0x8604 = 0x1b30ff04 |
| 1332 | *WR SMUx0B:0x8608 = 0xc0000000 |
| 1333 | NbSmuServiceRequest Enter [0x0b] |
| 1334 | NbSmuServiceRequest Exit |
| 1335 | *WR SRBM (GMM):0xff301b7c = 0x6260 |
| 1336 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x00, 0x86, 0x11, 0x00 |
| 1337 | *WR SMUx0B:0x8600 = 0x186507c |
| 1338 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x7c, 0x50, 0x86, 0x01 |
| 1339 | *WR SMUx0B:0x8604 = 0x1b30ff04 |
| 1340 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x04, 0xff, 0x30, 0x1b |
| 1341 | *WR SMUx0B:0x8608 = 0xc0010000 |
| 1342 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xc0 |
| 1343 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x50, 0x86, 0x11, 0x00 |
| 1344 | *WR SMUx0B:0x8650 = 0x6260 |
| 1345 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x60, 0x62, 0x00, 0x00 |
| 1346 | NbSmuServiceRequest Enter [0x0b] |
| 1347 | S3 Save: DISPATCH Function Id: 0x01, Context: 0x0b |
| 1348 | NbSmuServiceRequest Exit |
| 1349 | *WR SMUx0B:0x8600 = 0x186507c |
| 1350 | *WR SMUx0B:0x8604 = 0x1e30ff04 |
| 1351 | *WR SMUx0B:0x8608 = 0xc0000000 |
| 1352 | NbSmuServiceRequest Enter [0x0b] |
| 1353 | NbSmuServiceRequest Exit |
| 1354 | *WR SRBM (GMM):0xff301e7c = 0x6260 |
| 1355 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x00, 0x86, 0x11, 0x00 |
| 1356 | *WR SMUx0B:0x8600 = 0x186507c |
| 1357 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x7c, 0x50, 0x86, 0x01 |
| 1358 | *WR SMUx0B:0x8604 = 0x1e30ff04 |
| 1359 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x04, 0xff, 0x30, 0x1e |
| 1360 | *WR SMUx0B:0x8608 = 0xc0010000 |
| 1361 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xc0 |
| 1362 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x50, 0x86, 0x11, 0x00 |
| 1363 | *WR SMUx0B:0x8650 = 0x6260 |
| 1364 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x60, 0x62, 0x00, 0x00 |
| 1365 | NbSmuServiceRequest Enter [0x0b] |
| 1366 | S3 Save: DISPATCH Function Id: 0x01, Context: 0x0b |
| 1367 | NbSmuServiceRequest Exit |
| 1368 | *WR SMUx0B:0x8600 = 0x18650f5 |
| 1369 | *WR SMUx0B:0x8604 = 0x130ff04 |
| 1370 | *WR SMUx0B:0x8608 = 0xc0000000 |
| 1371 | NbSmuServiceRequest Enter [0x0b] |
| 1372 | NbSmuServiceRequest Exit |
| 1373 | *WR SRBM (GMM):0xff3001f5 = 0xefff07ff |
| 1374 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x00, 0x86, 0x11, 0x00 |
| 1375 | *WR SMUx0B:0x8600 = 0x18650f5 |
| 1376 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0xf5, 0x50, 0x86, 0x01 |
| 1377 | *WR SMUx0B:0x8604 = 0x130ff04 |
| 1378 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x04, 0xff, 0x30, 0x01 |
| 1379 | *WR SMUx0B:0x8608 = 0xc0010000 |
| 1380 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xc0 |
| 1381 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x50, 0x86, 0x11, 0x00 |
| 1382 | *WR SMUx0B:0x8650 = 0xefff07ff |
| 1383 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0xff, 0x07, 0xff, 0xef |
| 1384 | NbSmuServiceRequest Enter [0x0b] |
| 1385 | S3 Save: DISPATCH Function Id: 0x01, Context: 0x0b |
| 1386 | NbSmuServiceRequest Exit |
| 1387 | *WR SMUx0B:0x8600 = 0x18650f4 |
| 1388 | *WR SMUx0B:0x8604 = 0x130ff04 |
| 1389 | *WR SMUx0B:0x8608 = 0xc0000000 |
| 1390 | NbSmuServiceRequest Enter [0x0b] |
| 1391 | NbSmuServiceRequest Exit |
| 1392 | *WR SMUx0B:0x8600 = 0x18650f5 |
| 1393 | *WR SMUx0B:0x8604 = 0x130ff04 |
| 1394 | *WR SMUx0B:0x8608 = 0xc0000000 |
| 1395 | NbSmuServiceRequest Enter [0x0b] |
| 1396 | NbSmuServiceRequest Exit |
| 1397 | *WR SMUx0B:0x8600 = 0x1865012 |
| 1398 | *WR SMUx0B:0x8604 = 0x1530ff04 |
| 1399 | *WR SMUx0B:0x8608 = 0xc0000000 |
| 1400 | NbSmuServiceRequest Enter [0x0b] |
| 1401 | NbSmuServiceRequest Exit |
| 1402 | Clock Gating FCRxFF30_01F4 - 0xe5bfffff |
| 1403 | Clock Gating FCRxFF30_01F5 - 0xefff07ff |
| 1404 | Clock Gating FCRxFF30_1512 - 0x40600100 |
| 1405 | NbInitClockGating End |
| 1406 | S3 Save: PCI WR Address: 0x00000060 Data: 0x00000080 |
| 1407 | S3 Save: PCI WR Address: 0x00000064 Data: 0x00000082 |
| 1408 | NbInitAtLatePost Exit[0x0] |
| 1409 | F14NbLclkNclkRatioFeature Enter |
| 1410 | Offset for Nclk = 533 Lclk = 320 |
| 1411 | S3 Save: PCI WR Address: 0x000c6110 Data: 0x98a8a011 |
| 1412 | Offset for Nclk = 533 Lclk = 492 |
| 1413 | S3 Save: PCI WR Address: 0x000c6114 Data: 0x989aa071 |
| 1414 | Offset for Nclk = 336 Lclk = 320 |
| 1415 | S3 Save: PCI WR Address: 0x000c6118 Data: 0xa6a8a072 |
| 1416 | Offset for Nclk = 336 Lclk = 492 |
| 1417 | S3 Save: PCI WR Address: 0x000c611c Data: 0xa69aa033 |
| 1418 | F14NbLclkNclkRatioFeature Exit |
| 1419 | NbLclkDpmFeature Enter |
| 1420 | NbFmInitLclkDpmRcActivity F14 Enter |
| 1421 | Fused State Index:2 LCLK DPM State [7]: LclkScalingDid - 0x1a, ActivityThreshold - 0x40ffff, SamplingPeriod - 0xc350 |
| 1422 | Fused State Index:1 LCLK DPM State [6]: LclkScalingDid - 0x1a, ActivityThreshold - 0x40ffff, SamplingPeriod - 0xc350 |
| 1423 | Fused State Index:0 LCLK DPM State [5]: LclkScalingDid - 0x28, ActivityThreshold - 0x100, SamplingPeriod - 0x1388 |
| 1424 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x33, 0x83, 0x00, 0x00, 0x00, 0xff, 0x33, 0x80, 0x01 |
| 1425 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x34, 0x84, 0x00, 0x00 |
| 1426 | *WR SMUx0B:0x8434 = 0xc3500013 |
| 1427 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x13, 0x00, 0x50, 0xc3 |
| 1428 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0xac, 0x84, 0x00, 0x00 |
| 1429 | *WR SMUx0B:0x84ac = 0x0 |
| 1430 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 |
| 1431 | *WR SMUx0B:0x84b0 = 0x0 |
| 1432 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 |
| 1433 | *WR SMUx0B:0x84b4 = 0x0 |
| 1434 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 |
| 1435 | *WR SMUx0B:0x84b8 = 0x0 |
| 1436 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 |
| 1437 | ActivityThreshold[4] - 0x0 ActivityThreshold[5] - 0x100 ActivityThreshold[6] - 0x40ffff ActivityThreshold[7] - 0x40ffff |
| 1438 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x70, 0x84, 0x00, 0x00 |
| 1439 | *WR SMUx0B:0x8470 = 0x0 |
| 1440 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 |
| 1441 | *WR SMUx0B:0x8474 = 0x100 |
| 1442 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00 |
| 1443 | *WR SMUx0B:0x8478 = 0x40ffff |
| 1444 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0xff, 0xff, 0x40, 0x00 |
| 1445 | *WR SMUx0B:0x847c = 0x40ffff |
| 1446 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0xff, 0xff, 0x40, 0x00 |
| 1447 | SamplingPeriod[4] - 0x1388 SamplingPeriod[5] - 0x0 SamplingPeriod[6] - 0xc350 SamplingPeriod[7] - 0xc350 |
| 1448 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x40, 0x84, 0x00, 0x00 |
| 1449 | *WR SMUx0B:0x8440 = 0x1388 |
| 1450 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x88, 0x13, 0x00, 0x00 |
| 1451 | *WR SMUx0B:0x8444 = 0xc350c350 |
| 1452 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x50, 0xc3, 0x50, 0xc3 |
| 1453 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x8c, 0x84, 0x00, 0x00 |
| 1454 | *WR SMUx0B:0x848c = 0x281a1a |
| 1455 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x1a, 0x1a, 0x28, 0x00 |
| 1456 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x98, 0x84, 0x00, 0x00 |
| 1457 | *WR SMUx0B:0x8498 = 0x103 |
| 1458 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x03, 0x01, 0x00, 0x00 |
| 1459 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x90, 0x84, 0x12, 0x00 |
| 1460 | *WR SMUx0B:0x8490 = 0xa0 |
| 1461 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x00, 0x00 |
| 1462 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x35, 0x83, 0x00, 0x00, 0x00, 0x24, 0x90, 0x00, 0x00 |
| 1463 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x37, 0x83, 0x00, 0x00, 0x00, 0x22, 0x88, 0x00, 0x00 |
| 1464 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x39, 0x83, 0x00, 0x00, 0x00, 0x22, 0x88, 0x00, 0x00 |
| 1465 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x3b, 0x83, 0x00, 0x00, 0x00, 0x22, 0x88, 0x00, 0x00 |
| 1466 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x3d, 0x83, 0x00, 0x00, 0x00, 0x22, 0x88, 0x00, 0x00 |
| 1467 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x3f, 0x83, 0x00, 0x00, 0x00, 0x22, 0x88, 0x00, 0x00 |
| 1468 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x41, 0x83, 0x00, 0x00, 0x00, 0x22, 0x88, 0x00, 0x00 |
| 1469 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x43, 0x83, 0x00, 0x00, 0x00, 0x22, 0x88, 0x00, 0x00 |
| 1470 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x45, 0x83, 0x00, 0x00, 0x00, 0x22, 0x88, 0x00, 0x00 |
| 1471 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x47, 0x83, 0x00, 0x00, 0x00, 0x22, 0x88, 0x00, 0x00 |
| 1472 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x49, 0x83, 0x00, 0x00, 0x00, 0x22, 0x88, 0x00, 0x00 |
| 1473 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x4b, 0x83, 0x00, 0x00, 0x00, 0x22, 0x88, 0x00, 0x00 |
| 1474 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x4d, 0x83, 0x00, 0x00, 0x00, 0x22, 0x88, 0x00, 0x00 |
| 1475 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x4f, 0x83, 0x00, 0x00, 0x00, 0x22, 0x88, 0x00, 0x00 |
| 1476 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x51, 0x83, 0x00, 0x00, 0x00, 0x22, 0x88, 0x00, 0x00 |
| 1477 | *WR SMUx0B:0x8600 = 0x18650e4 |
| 1478 | *WR SMUx0B:0x8604 = 0x130ff04 |
| 1479 | *WR SMUx0B:0x8608 = 0xc0000000 |
| 1480 | NbSmuServiceRequest Enter [0x0b] |
| 1481 | NbSmuServiceRequest Exit |
| 1482 | *WR SRBM (GMM):0xff3001e4 = 0x100000 |
| 1483 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x00, 0x86, 0x11, 0x00 |
| 1484 | *WR SMUx0B:0x8600 = 0x18650e4 |
| 1485 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0xe4, 0x50, 0x86, 0x01 |
| 1486 | *WR SMUx0B:0x8604 = 0x130ff04 |
| 1487 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x04, 0xff, 0x30, 0x01 |
| 1488 | *WR SMUx0B:0x8608 = 0xc0010000 |
| 1489 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xc0 |
| 1490 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x0b, 0x82, 0x00, 0x00, 0x00, 0x50, 0x86, 0x11, 0x00 |
| 1491 | *WR SMUx0B:0x8650 = 0x100000 |
| 1492 | S3 Save: DISPATCH Function Id: 0x03, Context: 0x05, 0x83, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00 |
| 1493 | NbSmuServiceRequest Enter [0x0b] |
| 1494 | S3 Save: DISPATCH Function Id: 0x01, Context: 0x0b |
| 1495 | NbSmuServiceRequest Exit |
| 1496 | NbSmuServiceRequest Enter [0x08] |
| 1497 | S3 Save: DISPATCH Function Id: 0x01, Context: 0x08 |
| 1498 | NbSmuServiceRequest Exit |
| 1499 | NbFmInitLclkDpmRcActivity F14 Exit [0x0] |
| 1500 | NbLclkDpmFeature Exit [0x0] |
| 1501 | |
| 1502 | AmdInitMid: End |
| 1503 | |
| 1504 | agesawrapper_amdinitmid() returned AGESA_SUCCESS |
| 1505 | ader - leaving domain_enable_resources. |
| 1506 | PCI: 00:00.0 cmd <- 06 |
| 1507 | PCI: 00:01.0 subsystem <- 1022/1510 |
| 1508 | PCI: 00:01.0 cmd <- 07 |
| 1509 | PCI: 00:01.1 subsystem <- 1022/1510 |
| 1510 | PCI: 00:01.1 cmd <- 02 |
| 1511 | PCI: 00:11.0 subsystem <- 1022/1510 |
| 1512 | PCI: 00:11.0 cmd <- 03 |
| 1513 | PCI: 00:12.0 subsystem <- 1022/1510 |
| 1514 | PCI: 00:12.0 cmd <- 02 |
| 1515 | PCI: 00:12.2 subsystem <- 1022/1510 |
| 1516 | PCI: 00:12.2 cmd <- 02 |
| 1517 | PCI: 00:13.0 subsystem <- 1022/1510 |
| 1518 | PCI: 00:13.0 cmd <- 02 |
| 1519 | PCI: 00:13.2 subsystem <- 1022/1510 |
| 1520 | PCI: 00:13.2 cmd <- 02 |
| 1521 | PCI: 00:14.0 subsystem <- 1022/1510 |
| 1522 | PCI: 00:14.0 cmd <- 403 |
| 1523 | PCI: 00:14.2 subsystem <- 1022/1510 |
| 1524 | PCI: 00:14.2 cmd <- 02 |
| 1525 | PCI: 00:14.3 subsystem <- 1022/1510 |
| 1526 | PCI: 00:14.3 cmd <- 0f |
| 1527 | PCI: 00:14.4 bridge ctrl <- 0003 |
| 1528 | PCI: 00:14.4 cmd <- 21 |
| 1529 | PCI: 00:14.5 subsystem <- 1022/1510 |
| 1530 | PCI: 00:14.5 cmd <- 02 |
| 1531 | PCI: 00:15.0 bridge ctrl <- 0003 |
| 1532 | PCI: 00:15.0 cmd <- 00 |
| 1533 | PCI: 00:15.1 bridge ctrl <- 0003 |
| 1534 | PCI: 00:15.1 cmd <- 07 |
| 1535 | PCI: 00:15.2 bridge ctrl <- ffff |
| 1536 | PCI: 00:15.2 cmd <- ffff |
| 1537 | PCI: 00:18.0 subsystem <- 1022/1510 |
| 1538 | PCI: 00:18.0 cmd <- 00 |
| 1539 | PCI: 00:18.1 subsystem <- 1022/1510 |
| 1540 | PCI: 00:18.1 cmd <- 00 |
| 1541 | PCI: 00:18.2 subsystem <- 1022/1510 |
| 1542 | PCI: 00:18.2 cmd <- 00 |
| 1543 | PCI: 00:18.3 subsystem <- 1022/1510 |
| 1544 | PCI: 00:18.3 cmd <- 00 |
| 1545 | PCI: 00:18.4 subsystem <- 1022/1510 |
| 1546 | PCI: 00:18.4 cmd <- 00 |
| 1547 | PCI: 00:18.5 subsystem <- 1022/1510 |
| 1548 | PCI: 00:18.5 cmd <- 00 |
| 1549 | PCI: 00:18.6 subsystem <- 1022/1510 |
| 1550 | PCI: 00:18.6 cmd <- 00 |
| 1551 | PCI: 00:18.7 subsystem <- 1022/1510 |
| 1552 | PCI: 00:18.7 cmd <- 00 |
| 1553 | PCI: 03:00.0 cmd <- 03 |
| 1554 | done. |
| 1555 | BS: BS_DEV_ENABLE times (us): entry 5 run 11993 exit 0 |
| 1556 | Initializing devices... |
| 1557 | Root Device init ... |
| 1558 | Root Device init finished in 0 usecs |
| 1559 | CPU_CLUSTER: 0 init ... |
| 1560 | start_eip=0x00001000, code_size=0x00000031 |
| 1561 | Initializing CPU #0 |
| 1562 | CPU: vendor AMD device 500f20 |
| 1563 | CPU: family 14, model 02, stepping 00 |
| 1564 | Model 14 Init. |
| 1565 | |
| 1566 | MTRR check |
| 1567 | Fixed MTRRs : Enabled |
| 1568 | Variable MTRRs: Enabled |
| 1569 | |
| 1570 | Enabling cache |
| 1571 | Setting up local APIC... apic_id: 0x00 done. |
| 1572 | model_14_init done. |
| 1573 | CPU #0 initialized |
| 1574 | CPU1: stack_base 00138000, stack_end 00138ff8 |
| 1575 | Asserting INIT. |
| 1576 | Waiting for send to finish... |
| 1577 | +Deasserting INIT. |
| 1578 | Waiting for send to finish... |
| 1579 | +#startup loops: 2. |
| 1580 | Sending STARTUP #1 to 1. |
| 1581 | After apic_write. |
| 1582 | Startup point 1. |
| 1583 | Waiting for send to finish... |
| 1584 | +Sending STARTUP #2 to 1. |
| 1585 | After apic_write. |
| 1586 | Startup point 1. |
| 1587 | Waiting for send to finish... |
| 1588 | +After Startup. |
| 1589 | Initializing CPU #1 |
| 1590 | Waiting for 1 CPUS to stop |
| 1591 | CPU: vendor AMD device 500f20 |
| 1592 | CPU: family 14, model 02, stepping 00 |
| 1593 | Model 14 Init. |
| 1594 | |
| 1595 | MTRR check |
| 1596 | Fixed MTRRs : Enabled |
| 1597 | Variable MTRRs: Enabled |
| 1598 | |
| 1599 | Enabling cache |
| 1600 | Setting up local APIC... apic_id: 0x01 done. |
| 1601 | model_14_init done. |
| 1602 | CPU #1 initialized |
| 1603 | All AP CPUs stopped (76 loops) |
| 1604 | CPU0: stack: 00139000 - 0013a000, lowest used address 00139700, stack used: 2304 bytes |
| 1605 | CPU1: stack: 00138000 - 00139000, lowest used address 00138e04, stack used: 508 bytes |
| 1606 | CPU_CLUSTER: 0 init finished in 12688 usecs |
| 1607 | DOMAIN: 0000 init ... |
| 1608 | DOMAIN: 0000 init finished in 1 usecs |
| 1609 | PCI: 00:00.0 init ... |
| 1610 | Northbridge init |
| 1611 | PCI: 00:00.0 init finished in 2 usecs |
| 1612 | PCI: 00:01.0 init ... |
| 1613 | PCI: 00:01.0 init finished in 1 usecs |
| 1614 | PCI: 00:01.1 init ... |
| 1615 | PCI: 00:01.1 init finished in 1 usecs |
| 1616 | PCI: 00:11.0 init ... |
| 1617 | PCI: 00:11.0 init finished in 1 usecs |
| 1618 | PCI: 00:14.0 init ... |
| 1619 | PCI: 00:14.0 init finished in 1 usecs |
| 1620 | PCI: 00:14.3 init ... |
| 1621 | SB800 - Late.c - lpc_init - Start. |
| 1622 | RTC Init |
| 1623 | RTC: coreboot checksum invalid |
| 1624 | SB800 - Late.c - lpc_init - End. |
| 1625 | PCI: 00:14.3 init finished in 416 usecs |
| 1626 | PCI: 00:18.0 init ... |
| 1627 | PCI: 00:18.0 init finished in 1 usecs |
| 1628 | PCI: 00:18.1 init ... |
| 1629 | PCI: 00:18.1 init finished in 1 usecs |
| 1630 | PCI: 00:18.2 init ... |
| 1631 | PCI: 00:18.2 init finished in 1 usecs |
| 1632 | PCI: 00:18.3 init ... |
| 1633 | PCI: 00:18.3 init finished in 1 usecs |
| 1634 | PCI: 00:18.4 init ... |
| 1635 | PCI: 00:18.4 init finished in 1 usecs |
| 1636 | PCI: 00:18.5 init ... |
| 1637 | PCI: 00:18.5 init finished in 1 usecs |
| 1638 | PCI: 00:18.6 init ... |
| 1639 | PCI: 00:18.6 init finished in 1 usecs |
| 1640 | PCI: 00:18.7 init ... |
| 1641 | PCI: 00:18.7 init finished in 1 usecs |
| 1642 | PNP: 002e.2 init ... |
| 1643 | PNP: 002e.2 init finished in 1 usecs |
| 1644 | PNP: 002e.5 init ... |
| 1645 | PNP: 002e.5 init finished in 24 usecs |
| 1646 | PNP: 002e.307 init ... |
| 1647 | PNP: 002e.307 init finished in 1 usecs |
| 1648 | PNP: 002e.9 init ... |
| 1649 | PNP: 002e.9 init finished in 1 usecs |
| 1650 | PNP: 002e.a init ... |
| 1651 | CBFS: 'Master Header Locator' located CBFS at [100:3fffc0) |
| 1652 | CBFS: Locating 'cmos_layout.bin' |
| 1653 | CBFS: Found @ offset 50b40 size 5b0 |
| 1654 | set power off after power fail |
| 1655 | PNP: 002e.a init finished in 437 usecs |
| 1656 | PNP: 002e.b init ... |
| 1657 | PNP: 002e.b init finished in 1 usecs |
| 1658 | PNP: 002e.d init ... |
| 1659 | PNP: 002e.d init finished in 1 usecs |
| 1660 | PCI: 03:00.0 init ... |
| 1661 | PCI: 03:00.0 init finished in 1 usecs |
| 1662 | Devices initialized |
| 1663 | Show all devs... After init. |
| 1664 | Root Device: enabled 1 |
| 1665 | CPU_CLUSTER: 0: enabled 1 |
| 1666 | APIC: 00: enabled 1 |
| 1667 | DOMAIN: 0000: enabled 1 |
| 1668 | PCI: 00:00.0: enabled 1 |
| 1669 | PCI: 00:01.0: enabled 1 |
| 1670 | PCI: 00:01.1: enabled 1 |
| 1671 | PCI: 00:04.0: enabled 0 |
| 1672 | PCI: 00:05.0: enabled 0 |
| 1673 | PCI: 00:06.0: enabled 0 |
| 1674 | PCI: 00:07.0: enabled 0 |
| 1675 | PCI: 00:08.0: enabled 0 |
| 1676 | PCI: 00:11.0: enabled 1 |
| 1677 | PCI: 00:12.0: enabled 1 |
| 1678 | PCI: 00:12.2: enabled 1 |
| 1679 | PCI: 00:13.0: enabled 1 |
| 1680 | PCI: 00:13.2: enabled 1 |
| 1681 | PCI: 00:14.0: enabled 1 |
| 1682 | I2C: 00:50: enabled 1 |
| 1683 | I2C: 00:51: enabled 1 |
| 1684 | PCI: 00:14.1: enabled 0 |
| 1685 | PCI: 00:14.2: enabled 1 |
| 1686 | PCI: 00:14.3: enabled 1 |
| 1687 | PNP: 002e.0: enabled 0 |
| 1688 | PNP: 002e.1: enabled 0 |
| 1689 | PNP: 002e.2: enabled 1 |
| 1690 | PNP: 002e.3: enabled 0 |
| 1691 | PNP: 002e.5: enabled 1 |
| 1692 | PNP: 002e.6: enabled 0 |
| 1693 | PNP: 002e.107: enabled 0 |
| 1694 | PNP: 002e.207: enabled 0 |
| 1695 | PNP: 002e.307: enabled 1 |
| 1696 | PNP: 002e.407: enabled 0 |
| 1697 | PNP: 002e.8: enabled 0 |
| 1698 | PNP: 002e.9: enabled 1 |
| 1699 | PNP: 002e.109: enabled 0 |
| 1700 | PNP: 002e.209: enabled 0 |
| 1701 | PNP: 002e.309: enabled 0 |
| 1702 | PNP: 002e.a: enabled 1 |
| 1703 | PNP: 002e.b: enabled 1 |
| 1704 | PNP: 002e.c: enabled 0 |
| 1705 | PNP: 002e.d: enabled 1 |
| 1706 | PNP: 002e.e: enabled 0 |
| 1707 | PNP: 002e.f: enabled 0 |
| 1708 | PCI: 00:14.4: enabled 1 |
| 1709 | PCI: 00:14.5: enabled 1 |
| 1710 | PCI: 00:15.0: enabled 1 |
| 1711 | PCI: 00:15.1: enabled 1 |
| 1712 | PCI: 00:15.2: enabled 1 |
| 1713 | PCI: 00:15.3: enabled 0 |
| 1714 | PCI: 00:16.0: enabled 0 |
| 1715 | PCI: 00:16.2: enabled 0 |
| 1716 | PCI: 00:18.0: enabled 1 |
| 1717 | PCI: 00:18.1: enabled 1 |
| 1718 | PCI: 00:18.2: enabled 1 |
| 1719 | PCI: 00:18.3: enabled 1 |
| 1720 | PCI: 00:18.4: enabled 1 |
| 1721 | PCI: 00:18.5: enabled 1 |
| 1722 | PCI: 00:18.6: enabled 1 |
| 1723 | PCI: 00:18.7: enabled 1 |
| 1724 | APIC: 01: enabled 1 |
| 1725 | PCI: 03:00.0: enabled 1 |
| 1726 | BS: BS_DEV_INIT times (us): entry 0 run 14675 exit 0 |
| 1727 | CBMEM: |
| 1728 | IMD: root @ c7fff000 254 entries. |
| 1729 | IMD: root @ c7ffec00 62 entries. |
| 1730 | Moving GDT to c7ffea00...ok |
| 1731 | Finalize devices... |
| 1732 | Devices finalized |
| 1733 | AmdInitLate: Start |
| 1734 | |
| 1735 | CreatSystemTable: Start |
| 1736 | SSDT is created |
| 1737 | CreatSystemTable: End |
| 1738 | DispatchCpuFeatures: LateStart |
| 1739 | DispatchCpuFeatures: LateEnd |
| 1740 | AmdCpuLate: Start |
| 1741 | AmdCpuLate: End |
| 1742 | PcieFmAlibBuildAcpiTable Enter |
| 1743 | PcieFmAlibBuildAcpiTable Exit[0x0] |
| 1744 | |
| 1745 | AmdInitLate: End |
| 1746 | |
| 1747 | agesawrapper_amdinitlate() returned AGESA_SUCCESS |
| 1748 | ~Fn2_040 = 1 |
| 1749 | ~Fn2_044 = 109 |
| 1750 | ~Fn2_048 = 201 |
| 1751 | ~Fn2_04c = 309 |
| 1752 | ~Fn2_098 = 8d0f0f1f |
| 1753 | ~Fn2_09C_d0f0f1f = 2002 |
| 1754 | ~Fn2_098 = 8d0f2f1f |
| 1755 | ~Fn2_09C_d0f2f1f = 2000 |
| 1756 | ~Fn2_098 = 8d0f4009 |
| 1757 | ~Fn2_09C_d0f4009 = 2010 |
| 1758 | ~Fn2_098 = 8d0f8f1f |
| 1759 | ~Fn2_09C_d0f8f1f = 2000 |
| 1760 | ~Fn2_098 = 8d0fc01f |
| 1761 | ~Fn2_09C_d0fc01f = 2000 |
| 1762 | ~Fn2_098 = 8d0f0f1e |
| 1763 | ~Fn2_09C_d0f0f1e = 5220 |
| 1764 | ~Fn2_098 = 8d0f2f1e |
| 1765 | ~Fn2_09C_d0f2f1e = 5020 |
| 1766 | ~Fn2_098 = 8d0f8f1e |
| 1767 | ~Fn2_09C_d0f8f1e = 5020 |
| 1768 | ~Fn2_098 = 8d0fcf1e |
| 1769 | ~Fn2_09C_d0fcf1e = 5020 |
| 1770 | ~Fn2_098 = 8d0f0f38 |
| 1771 | ~Fn2_09C_d0f0f38 = 0 |
| 1772 | ~Fn2_094 = 3e40888a |
| 1773 | ~Fn2_098 = 8d0fe006 |
| 1774 | ~Fn2_09C_d0fe006 = f |
| 1775 | ~Fn2_098 = 8d0f0f31 |
| 1776 | ~Fn2_09C_d0f0f31 = 6ffa |
| 1777 | ~Fn2_098 = 8d0f2f31 |
| 1778 | ~Fn2_09C_d0f2f31 = 1a |
| 1779 | ~Fn2_098 = 8d0f8f31 |
| 1780 | ~Fn2_09C_d0f8f31 = 1a |
| 1781 | ~Fn2_098 = 8d0fc031 |
| 1782 | ~Fn2_09C_d0fc031 = 1a |
| 1783 | ~Fn2_098 = 8d0f0f00 |
| 1784 | ~Fn2_09C_d0f0f00 = 32 |
| 1785 | ~Fn2_098 = 8d0f0f08 |
| 1786 | ~Fn2_09C_d0f0f08 = 32 |
| 1787 | ~Fn2_098 = 8d0f0f06 |
| 1788 | ~Fn2_09C_d0f0f06 = ff6 |
| 1789 | ~Fn2_098 = 8d0f0f0a |
| 1790 | ~Fn2_09C_d0f0f0a = ff6 |
| 1791 | ~Fn2_098 = 8d0f0f02 |
| 1792 | ~Fn2_09C_d0f0f02 = ff6 |
| 1793 | ~Fn2_098 = 8d0f8006 |
| 1794 | ~Fn2_09C_d0f8006 = 6db |
| 1795 | ~Fn2_098 = 8d0f800a |
| 1796 | ~Fn2_09C_d0f800a = 6db |
| 1797 | ~Fn2_098 = 8d0f8106 |
| 1798 | ~Fn2_09C_d0f8106 = 6db |
| 1799 | ~Fn2_098 = 8d0f810a |
| 1800 | ~Fn2_09C_d0f810a = 6db |
| 1801 | ~Fn2_098 = 8d0fc006 |
| 1802 | ~Fn2_09C_d0fc006 = 6db |
| 1803 | ~Fn2_098 = 8d0fc00a |
| 1804 | ~Fn2_09C_d0fc00a = 6db |
| 1805 | ~Fn2_098 = 8d0fc00e |
| 1806 | ~Fn2_09C_d0fc00e = 6db |
| 1807 | ~Fn2_098 = 8d0fc012 |
| 1808 | ~Fn2_09C_d0fc012 = 6db |
| 1809 | ~Fn2_098 = 8d0f8002 |
| 1810 | ~Fn2_09C_d0f8002 = 6db |
| 1811 | ~Fn2_098 = 8d0f8102 |
| 1812 | ~Fn2_09C_d0f8102 = 6db |
| 1813 | ~Fn2_098 = 8d0fc002 |
| 1814 | ~Fn2_09C_d0fc002 = 6db |
| 1815 | ~Fn2_098 = 8d0f2002 |
| 1816 | ~Fn2_09C_d0f2002 = ff6 |
| 1817 | ~Fn2_098 = 8d0f2102 |
| 1818 | ~Fn2_09C_d0f2102 = ff6 |
| 1819 | ~Fn2_098 = 8d0fe003 |
| 1820 | ~Fn2_09C_d0fe003 = 4820 |
| 1821 | ~Fn2_098 = 8d0f2030 |
| 1822 | ~Fn2_09C_d0f2030 = 4 |
| 1823 | ~Fn2_098 = 8d0f2130 |
| 1824 | ~Fn2_09C_d0f2130 = 4 |
| 1825 | ~Fn2_098 = 8d0f0f13 |
| 1826 | ~Fn2_09C_d0f0f13 = 40a3 |
| 1827 | ~Fn2_098 = 8d0f812f |
| 1828 | ~Fn2_09C_d0f812f = a1 |
| 1829 | ~Fn2_098 = 8d0fc000 |
| 1830 | ~Fn2_09C_d0fc000 = 3 |
| 1831 | ~Fn2_098 = 8d0f0f10 |
| 1832 | ~Fn2_09C_d0f0f10 = 1337 |
| 1833 | ~Fn2_090 = 6600000 |
| 1834 | agesawrapper_amdS3Save() returned AGESA_SUCCESS |
| 1835 | Manufacturer: ef |
| 1836 | SF: Detected W25Q32 with sector size 0x1000, total 0x400000 |
| 1837 | SF: Successfully erased 4096 bytes @ 0xffff1000 |
| 1838 | Manufacturer: ef |
| 1839 | SF: Detected W25Q32 with sector size 0x1000, total 0x400000 |
| 1840 | SF: Successfully erased 4096 bytes @ 0xffff0000 |
| 1841 | BS: BS_POST_DEVICE times (us): entry 66 run 4 exit 175672 |
| 1842 | BS: BS_OS_RESUME_CHECK times (us): entry 0 run 1 exit 0 |
| 1843 | Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done. |
| 1844 | Writing IRQ routing tables to 0xc7e6b000...write_pirq_routing_table done. |
| 1845 | PIRQ table: 48 bytes. |
| 1846 | Wrote the mp table end at: 000f0410 - 000f05fc |
| 1847 | Wrote the mp table end at: c7e6a010 - c7e6a1fc |
| 1848 | MP table: 508 bytes. |
| 1849 | CBFS: 'Master Header Locator' located CBFS at [100:3fffc0) |
| 1850 | CBFS: Locating 'fallback/dsdt.aml' |
| 1851 | CBFS: Found @ offset 59400 size 24c9 |
| 1852 | CBFS: 'Master Header Locator' located CBFS at [100:3fffc0) |
| 1853 | CBFS: Locating 'fallback/slic' |
| 1854 | CBFS: 'fallback/slic' not found. |
| 1855 | ACPI: Writing ACPI tables at c7e46000. |
| 1856 | ACPI: * FACS |
| 1857 | ACPI: * DSDT |
| 1858 | ACPI: * FADT |
| 1859 | ACPI_BLK_BASE: 0x0800 |
| 1860 | ACPI: added table 1/32, length now 40 |
| 1861 | ACPI: * SSDT |
| 1862 | ACPI: added table 2/32, length now 44 |
| 1863 | ACPI: * MCFG |
| 1864 | ACPI: * TCPA |
| 1865 | TCPA log created at c7e36000 |
| 1866 | ACPI: added table 3/32, length now 48 |
| 1867 | ACPI: * MADT |
| 1868 | ACPI: added table 4/32, length now 52 |
| 1869 | current = c7e48980 |
| 1870 | ACPI: added table 5/32, length now 56 |
| 1871 | ACPI: * SRAT at c7e489a8 |
| 1872 | AGESA SRAT table NULL. Skipping. |
| 1873 | ACPI: * SLIT at c7e489a8 |
| 1874 | AGESA SLIT table NULL. Skipping. |
| 1875 | ACPI: * AGESA ALIB SSDT at c7e489b0 |
| 1876 | ACPI: added table 6/32, length now 60 |
| 1877 | ACPI: * AGESA SSDT Pstate at c7e4a040 |
| 1878 | ACPI: added table 7/32, length now 64 |
| 1879 | CBFS: 'Master Header Locator' located CBFS at [100:3fffc0) |
| 1880 | CBFS: Locating 'pci1002,9802.rom' |
| 1881 | CBFS: 'pci1002,9802.rom' not found. |
| 1882 | ACPI: * HPET |
| 1883 | ACPI: added table 8/32, length now 68 |
| 1884 | ACPI: done. |
| 1885 | ACPI tables: 17504 bytes. |
| 1886 | smbios_write_tables: c7e35000 |
| 1887 | Root Device (ASROCK E350M1) |
| 1888 | CPU_CLUSTER: 0 (AMD Family 14h Root Complex) |
| 1889 | APIC: 00 (AMD CPU Family 14h Model 00h-0Fh) |
| 1890 | DOMAIN: 0000 (AMD Family 14h Root Complex) |
| 1891 | PCI: 00:00.0 (AMD Family 14h Northbridge) |
| 1892 | PCI: 00:01.0 (AMD Family 14h Northbridge) |
| 1893 | PCI: 00:01.1 (AMD Family 14h Northbridge) |
| 1894 | PCI: 00:04.0 (AMD Family 14h Northbridge) |
| 1895 | PCI: 00:05.0 (AMD Family 14h Northbridge) |
| 1896 | PCI: 00:06.0 (AMD Family 14h Northbridge) |
| 1897 | PCI: 00:07.0 (AMD Family 14h Northbridge) |
| 1898 | PCI: 00:08.0 (AMD Family 14h Northbridge) |
| 1899 | PCI: 00:11.0 (ATI SB800) |
| 1900 | PCI: 00:12.0 (ATI SB800) |
| 1901 | PCI: 00:12.2 (ATI SB800) |
| 1902 | PCI: 00:13.0 (ATI SB800) |
| 1903 | PCI: 00:13.2 (ATI SB800) |
| 1904 | PCI: 00:14.0 (ATI SB800) |
| 1905 | I2C: 00:50 (unknown) |
| 1906 | I2C: 00:51 (unknown) |
| 1907 | PCI: 00:14.1 (ATI SB800) |
| 1908 | PCI: 00:14.2 (ATI SB800) |
| 1909 | PCI: 00:14.3 (ATI SB800) |
| 1910 | PNP: 002e.0 (NUVOTON NCT5572D Super I/O) |
| 1911 | PNP: 002e.1 (NUVOTON NCT5572D Super I/O) |
| 1912 | PNP: 002e.2 (NUVOTON NCT5572D Super I/O) |
| 1913 | PNP: 002e.3 (NUVOTON NCT5572D Super I/O) |
| 1914 | PNP: 002e.5 (NUVOTON NCT5572D Super I/O) |
| 1915 | PNP: 002e.6 (NUVOTON NCT5572D Super I/O) |
| 1916 | PNP: 002e.107 (NUVOTON NCT5572D Super I/O) |
| 1917 | PNP: 002e.207 (NUVOTON NCT5572D Super I/O) |
| 1918 | PNP: 002e.307 (NUVOTON NCT5572D Super I/O) |
| 1919 | PNP: 002e.407 (NUVOTON NCT5572D Super I/O) |
| 1920 | PNP: 002e.8 (NUVOTON NCT5572D Super I/O) |
| 1921 | PNP: 002e.9 (NUVOTON NCT5572D Super I/O) |
| 1922 | PNP: 002e.109 (NUVOTON NCT5572D Super I/O) |
| 1923 | PNP: 002e.209 (NUVOTON NCT5572D Super I/O) |
| 1924 | PNP: 002e.309 (NUVOTON NCT5572D Super I/O) |
| 1925 | PNP: 002e.a (NUVOTON NCT5572D Super I/O) |
| 1926 | PNP: 002e.b (NUVOTON NCT5572D Super I/O) |
| 1927 | PNP: 002e.c (NUVOTON NCT5572D Super I/O) |
| 1928 | PNP: 002e.d (NUVOTON NCT5572D Super I/O) |
| 1929 | PNP: 002e.e (NUVOTON NCT5572D Super I/O) |
| 1930 | PNP: 002e.f (NUVOTON NCT5572D Super I/O) |
| 1931 | PCI: 00:14.4 (ATI SB800) |
| 1932 | PCI: 00:14.5 (ATI SB800) |
| 1933 | PCI: 00:15.0 (ATI SB800) |
| 1934 | PCI: 00:15.1 (ATI SB800) |
| 1935 | PCI: 00:15.2 (ATI SB800) |
| 1936 | PCI: 00:15.3 (ATI SB800) |
| 1937 | PCI: 00:16.0 (ATI SB800) |
| 1938 | PCI: 00:16.2 (ATI SB800) |
| 1939 | PCI: 00:18.0 (AMD Family 14h Northbridge) |
| 1940 | PCI: 00:18.1 (AMD Family 14h Northbridge) |
| 1941 | PCI: 00:18.2 (AMD Family 14h Northbridge) |
| 1942 | PCI: 00:18.3 (AMD Family 14h Northbridge) |
| 1943 | PCI: 00:18.4 (AMD Family 14h Northbridge) |
| 1944 | PCI: 00:18.5 (AMD Family 14h Northbridge) |
| 1945 | PCI: 00:18.6 (AMD Family 14h Northbridge) |
| 1946 | PCI: 00:18.7 (AMD Family 14h Northbridge) |
| 1947 | APIC: 01 (unknown) |
| 1948 | PCI: 03:00.0 (unknown) |
| 1949 | SMBIOS tables: 339 bytes. |
| 1950 | Writing table forward entry at 0x00000500 |
| 1951 | Wrote coreboot table at: 00000500, 0x10 bytes, checksum 77f7 |
| 1952 | Writing coreboot table at 0xc7e6c000 |
| 1953 | CBFS: 'Master Header Locator' located CBFS at [100:3fffc0) |
| 1954 | CBFS: Locating 'cmos_layout.bin' |
| 1955 | CBFS: Found @ offset 50b40 size 5b0 |
| 1956 | 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1957 | 1. 0000000000001000-000000000009ffff: RAM |
| 1958 | 2. 00000000000c0000-00000000c7e34fff: RAM |
| 1959 | 3. 00000000c7e35000-00000000c7ffffff: CONFIGURATION TABLES |
| 1960 | 4. 00000000c8000000-00000000dfffffff: RESERVED |
| 1961 | 5. 00000000f8000000-00000000fbffffff: RESERVED |
| 1962 | 6. 0000000100000000-000000021effffff: RAM |
| 1963 | CBFS: 'Master Header Locator' located CBFS at [100:3fffc0) |
| 1964 | FMAP: Found "FLASH" version 1.1 at 0. |
| 1965 | FMAP: base = ffc00000 size = 400000 #areas = 3 |
| 1966 | Wrote coreboot table at: c7e6c000, 0x874 bytes, checksum a95 |
| 1967 | coreboot table: 2188 bytes. |
| 1968 | IMD ROOT 0. c7fff000 00001000 |
| 1969 | IMD SMALL 1. c7ffe000 00001000 |
| 1970 | CONSOLE 2. c7fde000 00020000 |
| 1971 | TIME STAMP 3. c7fdd000 00000400 |
| 1972 | ROMSTG STCK 4. c7fc5000 00018000 |
| 1973 | ACPISCRATCH 5. c7f95000 00030000 |
| 1974 | ACPI RESUME 6. c7e74000 00121000 |
| 1975 | COREBOOT 7. c7e6c000 00008000 |
| 1976 | IRQ TABLE 8. c7e6b000 00001000 |
| 1977 | SMP TABLE 9. c7e6a000 00001000 |
| 1978 | ACPI 10. c7e46000 00024000 |
| 1979 | TCPA LOG 11. c7e36000 00010000 |
| 1980 | SMBIOS 12. c7e35000 00000800 |
| 1981 | IMD small region: |
| 1982 | IMD ROOT 0. c7ffec00 00000400 |
| 1983 | GDT 1. c7ffea00 00000200 |
| 1984 | BS: BS_WRITE_TABLES times (us): entry 0 run 5080 exit 0 |
| 1985 | CBFS: 'Master Header Locator' located CBFS at [100:3fffc0) |
| 1986 | CBFS: Locating 'fallback/payload' |
| 1987 | CBFS: Found @ offset 94500 size c1ed |
| 1988 | Loading segment from ROM address 0xffc94638 |
| 1989 | code (compression=1) |
| 1990 | New segment dstaddr 0xe92e0 memsize 0x16d20 srcaddr 0xffc94670 filesize 0xc1b5 |
| 1991 | Loading segment from ROM address 0xffc94654 |
| 1992 | Entry Point 0x000ff06e |
| 1993 | Bounce Buffer at c7bf6000, 2353248 bytes |
| 1994 | Loading Segment: addr: 0x00000000000e92e0 memsz: 0x0000000000016d20 filesz: 0x000000000000c1b5 |
| 1995 | lb: [0x0000000000100000, 0x000000000021f430) |
| 1996 | Post relocation: addr: 0x00000000000e92e0 memsz: 0x0000000000016d20 filesz: 0x000000000000c1b5 |
| 1997 | using LZMA |
| 1998 | [ 0x000e92e0, 00100000, 0x00100000) <- ffc94670 |
| 1999 | dest 000e92e0, end 00100000, bouncebuffer c7bf6000 |
| 2000 | Loaded segments |
| 2001 | BS: BS_PAYLOAD_LOAD times (us): entry 0 run 23997 exit 0 |
| 2002 | Jumping to boot code at 000ff06e(c7e6c000) |
| 2003 | CPU0: stack: 00139000 - 0013a000, lowest used address 00139700, stack used: 2304 bytes |
| 2004 | entry = 0x000ff06e |
| 2005 | lb_start = 0x00100000 |
| 2006 | lb_size = 0x0011f430 |
| 2007 | buffer = 0xc7bf6000 |
| 2008 | SeaBIOS (version rel-1.10.0-25-g1415d46) |
| 2009 | BUILD: gcc: (Debian 6.3.0-8) 6.3.0 20170221 binutils: (GNU Binutils for Debian) 2.27.90.20170221 |
| 2010 | Found coreboot cbmem console @ c7fde000 |
| 2011 | Found mainboard ASROCK E350M1 |
| 2012 | malloc preinit |
| 2013 | Relocating init from 0x000ea5c0 to 0xc7deb900 (size 38496) |
| 2014 | malloc init |
| 2015 | Found CBFS header at 0xffc00138 |
| 2016 | Add romfile: cbfs master header (size=32) |
| 2017 | Add romfile: fallback/romstage (size=224020) |
| 2018 | Add romfile: fallback/ramstage (size=104846) |
| 2019 | Add romfile: config (size=626) |
| 2020 | Add romfile: revision (size=576) |
| 2021 | Add romfile: cmos_layout.bin (size=1456) |
| 2022 | Add romfile: pci1002,9802.rom (size=57856) |
| 2023 | Add romfile: fallback/dsdt.aml (size=9417) |
| 2024 | Add romfile: img/coreinfo (size=108756) |
| 2025 | Add romfile: img/nvramcui (size=123516) |
| 2026 | Add romfile: fallback/payload (size=49645) |
| 2027 | Add romfile: img/tint (size=68324) |
| 2028 | Add romfile: img/memtest (size=180268) |
| 2029 | Add romfile: bootsplash.jpg (size=170591) |
| 2030 | Add romfile: etc/threads (size=8) |
| 2031 | Add romfile: (size=3051672) |
| 2032 | Add romfile: s3nv (size=32768) |
| 2033 | Add romfile: (size=31064) |
| 2034 | Add romfile: bootblock (size=1584) |
| 2035 | init ivt |
| 2036 | init bda |
| 2037 | init bios32 |
| 2038 | init PMM |
| 2039 | init keyboard |
| 2040 | init mouse |
| 2041 | init pic |
| 2042 | Copying data 8@0xffd06ee8 to 8@0x00006dbc |
| 2043 | math cp init |
| 2044 | PCI probe |
| 2045 | PCI device 00:00.0 (vd=1022:1510 c=0600) |
| 2046 | PCI device 00:01.0 (vd=1002:9802 c=0300) |
| 2047 | PCI device 00:01.1 (vd=1002:1314 c=0403) |
| 2048 | PCI device 00:11.0 (vd=1002:4391 c=0106) |
| 2049 | PCI device 00:12.0 (vd=1002:4397 c=0c03) |
| 2050 | PCI device 00:12.2 (vd=1002:4396 c=0c03) |
| 2051 | PCI device 00:13.0 (vd=1002:4397 c=0c03) |
| 2052 | PCI device 00:13.2 (vd=1002:4396 c=0c03) |
| 2053 | PCI device 00:14.0 (vd=1002:4385 c=0c05) |
| 2054 | PCI device 00:14.2 (vd=1002:4383 c=0403) |
| 2055 | PCI device 00:14.3 (vd=1002:439d c=0601) |
| 2056 | PCI device 00:14.4 (vd=1002:4384 c=0604) |
| 2057 | PCI device 00:14.5 (vd=1002:4399 c=0c03) |
| 2058 | PCI device 00:15.0 (vd=1002:43a0 c=0604) |
| 2059 | PCI device 00:15.1 (vd=1002:43a1 c=0604) |
| 2060 | PCI device 00:18.0 (vd=1022:1700 c=0600) |
| 2061 | PCI device 00:18.1 (vd=1022:1701 c=0600) |
| 2062 | PCI device 00:18.2 (vd=1022:1702 c=0600) |
| 2063 | PCI device 00:18.3 (vd=1022:1703 c=0600) |
| 2064 | PCI device 00:18.4 (vd=1022:1704 c=0600) |
| 2065 | PCI device 00:18.5 (vd=1022:1718 c=0600) |
| 2066 | PCI device 00:18.6 (vd=1022:1716 c=0600) |
| 2067 | PCI device 00:18.7 (vd=1022:1719 c=0600) |
| 2068 | PCI device 03:00.0 (vd=10ec:8168 c=0200) |
| 2069 | Found 24 PCI devices (max PCI bus is 03) |
| 2070 | Relocating coreboot bios tables |
| 2071 | Copying SMBIOS entry point from 0xc7e35000 to 0x000f3c00 |
| 2072 | Copying ACPI RSDP from 0xc7e46000 to 0x000f3bd0 |
| 2073 | Copying MPTABLE from 0xc7e6a000/c7e6a010 to 0x000f39d0 |
| 2074 | Copying PIR from 0xc7e6b000 to 0x000f39a0 |
| 2075 | rsdp=0x000f3bd0 |
| 2076 | rsdt=0xc7e46030 |
| 2077 | table(50434146)=0xc7e48750 |
| 2078 | pm_tmr_blk=808 |
| 2079 | Using pmtimer, ioport 0x808 |
| 2080 | init timer |
| 2081 | init usb |
| 2082 | EHCI init on dev 00:12.2 (regs=0xf014c020) |
| 2083 | /c7de9000\ Start thread |
| 2084 | EHCI init on dev 00:13.2 (regs=0xf014d020) |
| 2085 | /c7de7000\ Start thread |
| 2086 | OHCI init on dev 00:12.0 (regs=0xf0148000) |
| 2087 | /c7de6000\ Start thread |
| 2088 | OHCI init on dev 00:13.0 (regs=0xf0149000) |
| 2089 | /c7de5000\ Start thread |
| 2090 | OHCI init on dev 00:14.5 (regs=0xf014a000) |
| 2091 | /c7de4000\ Start thread |
| 2092 | init ps2port |
| 2093 | /c7de3000\ Start thread |
| 2094 | init ahci |
| 2095 | AHCI controller at 00:11.0, iobase 0xf014b000, irq 0 |
| 2096 | AHCI: cap 0xf332ff05, ports_impl 0x3f |
| 2097 | /c7de2000\ Start thread |
| 2098 | |c7de2000| AHCI/0: probing |
| 2099 | |c7de2000| AHCI/0: link up |
| 2100 | /c7de0000\ Start thread |
| 2101 | |c7de0000| AHCI/1: probing |
| 2102 | /c7ddf000\ Start thread |
| 2103 | |c7ddf000| AHCI/2: probing |
| 2104 | /c7ddd000\ Start thread |
| 2105 | |c7ddd000| AHCI/3: probing |
| 2106 | /c7ddc000\ Start thread |
| 2107 | |c7ddc000| AHCI/4: probing |
| 2108 | /c7dda000\ Start thread |
| 2109 | |c7dda000| AHCI/5: probing |
| 2110 | Registering bootable: Payload [memtest] (type:32 prio:9999 data:ffcb1380) |
| 2111 | Registering bootable: Payload [tint] (type:32 prio:9999 data:ffca0840) |
| 2112 | Registering bootable: Payload [nvramcui] (type:32 prio:9999 data:ffc76340) |
| 2113 | Registering bootable: Payload [coreinfo] (type:32 prio:9999 data:ffc5ba40) |
| 2114 | Scan for VGA option rom |
| 2115 | Attempting to init PCI bdf 00:01.0 (vd 1002:9802) |
| 2116 | |c7ddd000| AHCI/3: link down |
| 2117 | |c7ddf000| AHCI/2: link down |
| 2118 | |c7de0000| AHCI/1: link down |
| 2119 | |c7dda000| AHCI/5: link down |
| 2120 | |c7ddc000| AHCI/4: link down |
| 2121 | \c7ddd000/ End thread |
| 2122 | \c7ddf000/ End thread |
| 2123 | \c7de0000/ End thread |
| 2124 | \c7dda000/ End thread |
| 2125 | \c7ddc000/ End thread |
| 2126 | Uncompressing data 33379@0xc7dd1d90 to 57856@0x000c0000 |
| 2127 | /c7de0000\ Start thread |
| 2128 | /c7ddf000\ Start thread |
| 2129 | Running option rom at c000:0003 |
| 2130 | /c7dde000\ Start thread |
| 2131 | /c7ddd000\ Start thread |
| 2132 | \c7ddd000/ End thread |
| 2133 | /c7ddd000\ Start thread |
| 2134 | /c7ddc000\ Start thread |
| 2135 | /c7dda000\ Start thread |
| 2136 | /c7dd9000\ Start thread |
| 2137 | /c7dd8000\ Start thread |
| 2138 | /c7dd7000\ Start thread |
| 2139 | /c7dd6000\ Start thread |
| 2140 | /c7dd5000\ Start thread |
| 2141 | /c7dd4000\ Start thread |
| 2142 | /c7dd3000\ Start thread |
| 2143 | /c7dd2000\ Start thread |
| 2144 | /c7dd1000\ Start thread |
| 2145 | /c7dd0000\ Start thread |
| 2146 | /c7dcf000\ Start thread |
| 2147 | /c7dce000\ Start thread |
| 2148 | /c7dcd000\ Start thread |
| 2149 | /c7dcc000\ Start thread |
| 2150 | /c7dcb000\ Start thread |
| 2151 | Turning on vga text mode console |
| 2152 | |c7dd1000| set_address 0xc7de8e70 |
| 2153 | \c7dd8000/ End thread |
| 2154 | \c7dda000/ End thread |
| 2155 | \c7ddd000/ End thread |
| 2156 | \c7dde000/ End thread |
| 2157 | \c7de0000/ End thread |
| 2158 | \c7dd7000/ End thread |
| 2159 | \c7dd9000/ End thread |
| 2160 | \c7ddc000/ End thread |
| 2161 | \c7ddf000/ End thread |
| 2162 | SeaBIOS (version rel-1.10.0-25-g1415d46) |
| 2163 | Scan for option roms |
| 2164 | Attempting to init PCI bdf 00:00.0 (vd 1022:1510) |
| 2165 | Attempting to init PCI bdf 00:01.1 (vd 1002:1314) |
| 2166 | Attempting to init PCI bdf 00:14.0 (vd 1002:4385) |
| 2167 | Attempting to init PCI bdf 00:14.2 (vd 1002:4383) |
| 2168 | Attempting to init PCI bdf 00:14.3 (vd 1002:439d) |
| 2169 | Attempting to init PCI bdf 00:14.4 (vd 1002:4384) |
| 2170 | Attempting to init PCI bdf 00:15.0 (vd 1002:43a0) |
| 2171 | Attempting to init PCI bdf 00:15.1 (vd 1002:43a1) |
| 2172 | Attempting to init PCI bdf 00:18.0 (vd 1022:1700) |
| 2173 | Attempting to init PCI bdf 00:18.1 (vd 1022:1701) |
| 2174 | Attempting to init PCI bdf 00:18.2 (vd 1022:1702) |
| 2175 | Attempting to init PCI bdf 00:18.3 (vd 1022:1703) |
| 2176 | Attempting to init PCI bdf 00:18.4 (vd 1022:1704) |
| 2177 | Attempting to init PCI bdf 00:18.5 (vd 1022:1718) |
| 2178 | Attempting to init PCI bdf 00:18.6 (vd 1022:1716) |
| 2179 | Attempting to init PCI bdf 00:18.7 (vd 1022:1719) |
| 2180 | Attempting to init PCI bdf 03:00.0 (vd 10ec:8168) |
| 2181 | |
| 2182 | Press ESC for boot menu. |
| 2183 | |
| 2184 | Checking for bootsplash |
| 2185 | Copying romfile 'bootsplash.jpg' (len 170591) |
| 2186 | Copying data 170591@0xffcdd438 to 170591@0xc7da15a0 |
| 2187 | \c7de7000/ End thread |
| 2188 | \c7de9000/ End thread |
| 2189 | |c7dd1000| config_usb: 0xc7dea0a0 |
| 2190 | |c7dd1000| device rev=0100 cls=00 sub=00 proto=00 size=8 |
| 2191 | |c7dd1000| usb_hid_setup 0xc7dea0a0 |
| 2192 | |c7dd1000| USB mouse initialized |
| 2193 | \c7dd1000/ End thread |
| 2194 | \c7dd3000/ End thread |
| 2195 | \c7dd6000/ End thread |
| 2196 | \c7dcc000/ End thread |
| 2197 | \c7dce000/ End thread |
| 2198 | \c7dd0000/ End thread |
| 2199 | \c7dd2000/ End thread |
| 2200 | \c7dd5000/ End thread |
| 2201 | \c7dcb000/ End thread |
| 2202 | \c7dcd000/ End thread |
| 2203 | \c7dcf000/ End thread |
| 2204 | \c7dd4000/ End thread |
| 2205 | \c7de4000/ End thread |
| 2206 | \c7de5000/ End thread |
| 2207 | \c7de6000/ End thread |
| 2208 | start showing bootsplash |
| 2209 | VESA 3.0 |
| 2210 | VENDOR: (C) 1988-2010, AMD Technologies Inc. |
| 2211 | PRODUCT: WRESTLER |
| 2212 | Decoding bootsplash.jpg |
| 2213 | Finding vesa mode with dimensions 1024/768 |
| 2214 | mode: 0117 |
| 2215 | framebuffer: 0xe0000000 |
| 2216 | bytes per scanline: 2048 |
| 2217 | bits per pixel: 16 |
| 2218 | Decompressing bootsplash.jpg |
| 2219 | Switching to graphics mode |
| 2220 | Showing bootsplash picture |
| 2221 | |c7de3000| PS2 keyboard initialized |
| 2222 | \c7de3000/ End thread |
| 2223 | Bootsplash copy complete |
| 2224 | Turning on vga text mode console |
| 2225 | SeaBIOS (version rel-1.10.0-25-g1415d46) |
| 2226 | |c7de2000| AHCI/0: ... finished, status 0x51, ERROR 0x4 |
| 2227 | |c7de2000| AHCI/0: supported modes: udma 5, multi-dma 2, pio 4 |
| 2228 | |c7de2000| AHCI/0: Set transfer mode to UDMA-5 |
| 2229 | |c7de2000| AHCI/0: registering: "AHCI/0: WDC WD20EARS-60MVWB0 ATA-8 Hard-Disk (1863 GiBytes)" |
| 2230 | |c7de2000| Registering bootable: AHCI/0: WDC WD20EARS-60MVWB0 ATA-8 Hard-Disk (1863 GiBytes) (type:2 prio:103 data:f3930) |
| 2231 | \c7de2000/ End thread |
| 2232 | All threads complete. |
| 2233 | Searching bootorder for: HALT |
| 2234 | Mapping hd drive 0x000f3930 to 0 |
| 2235 | drive 0x000f3930: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=3907029168 |
| 2236 | finalize PMM |
| 2237 | malloc finalize |
| 2238 | Space available for UMB: ce800-ee800, f0000-f3930 |
| 2239 | Returned 253952 bytes of ZoneHigh |
| 2240 | e820 map has 7 items: |
| 2241 | 0: 0000000000000000 - 000000000009fc00 = 1 RAM |
| 2242 | 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED |
| 2243 | 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED |
| 2244 | 3: 0000000000100000 - 00000000c7e33000 = 1 RAM |
| 2245 | 4: 00000000c7e33000 - 00000000e0000000 = 2 RESERVED |
| 2246 | 5: 00000000f8000000 - 00000000fc000000 = 2 RESERVED |
| 2247 | 6: 0000000100000000 - 000000021f000000 = 1 RAM |
| 2248 | Jump to int19 |
| 2249 | enter handle_19: |
| 2250 | NULL |
| 2251 | Booting from Hard Disk... |
| 2252 | Booting from 0000:7c00 |
| 2253 | |