| Martin Kepplinger | a09160d | 2023-02-06 22:01:13 +0100 | [diff] [blame] | 1 | *** Pre-CBMEM romstage console overflowed, log truncated! *** |
| 2 | ing up static northbridge registers... done |
| 3 | [DEBUG] Initializing Graphics... |
| 4 | [DEBUG] Back from systemagent_early_init() |
| 5 | [DEBUG] SB: Resume from S3 detected. |
| 6 | [INFO ] Intel ME early init |
| 7 | [INFO ] Intel ME firmware is ready |
| 8 | [DEBUG] ME: Requested 0MB UMA |
| 9 | [DEBUG] Starting native Platform init |
| 10 | [DEBUG] DMI: Running at X4 @ 5000MT/s |
| 11 | [DEBUG] FMAP: area RW_MRC_CACHE found @ 800000 (65536 bytes) |
| 12 | [DEBUG] Trying stored timings. |
| 13 | [DEBUG] Starting Ivy Bridge RAM training (fast boot). |
| 14 | [DEBUG] 100MHz reference clock support: yes |
| 15 | [DEBUG] PLL_REF100_CFG value: 0x7 |
| 16 | [DEBUG] Trying CAS 11, tCK 320. |
| 17 | [DEBUG] Trying CAS 10, tCK 365. |
| 18 | [DEBUG] Trying CAS 9, tCK 384. |
| 19 | [DEBUG] Found compatible clock, CAS pair. |
| 20 | [DEBUG] Selected DRAM frequency: 666 MHz |
| 21 | [DEBUG] Selected CAS latency : 9T |
| 22 | [DEBUG] MPLL busy... done in 60 us |
| 23 | [DEBUG] MPLL frequency is set at : 666 MHz |
| 24 | [DEBUG] Done dimm mapping |
| 25 | [DEBUG] Update PCI-E configuration space: |
| 26 | [DEBUG] PCI(0, 0, 0)[a0] = 0 |
| 27 | [DEBUG] PCI(0, 0, 0)[a4] = 4 |
| 28 | [DEBUG] PCI(0, 0, 0)[bc] = 82a00000 |
| 29 | [DEBUG] PCI(0, 0, 0)[a8] = 7d600000 |
| 30 | [DEBUG] PCI(0, 0, 0)[ac] = 4 |
| 31 | [DEBUG] PCI(0, 0, 0)[b8] = 80000000 |
| 32 | [DEBUG] PCI(0, 0, 0)[b0] = 80a00000 |
| 33 | [DEBUG] PCI(0, 0, 0)[b4] = 80800000 |
| 34 | [DEBUG] Done memory map |
| 35 | [DEBUG] Done io registers |
| 36 | [DEBUG] t123: 1912, 6000, 7620 |
| 37 | [NOTE ] ME: Wrong mode : 2 |
| 38 | [NOTE ] ME: FWS2: 0x100a0140 |
| 39 | [NOTE ] ME: Bist in progress: 0x0 |
| 40 | [NOTE ] ME: ICC Status : 0x0 |
| 41 | [NOTE ] ME: Invoke MEBx : 0x0 |
| 42 | [NOTE ] ME: CPU replaced : 0x0 |
| 43 | [NOTE ] ME: MBP ready : 0x0 |
| 44 | [NOTE ] ME: MFS failure : 0x1 |
| 45 | [NOTE ] ME: Warm reset req : 0x0 |
| 46 | [NOTE ] ME: CPU repl valid : 0x1 |
| 47 | [NOTE ] ME: (Reserved) : 0x0 |
| 48 | [NOTE ] ME: FW update req : 0x0 |
| 49 | [NOTE ] ME: (Reserved) : 0x0 |
| 50 | [NOTE ] ME: Current state : 0xa |
| 51 | [NOTE ] ME: Current PM event: 0x0 |
| 52 | [NOTE ] ME: Progress code : 0x1 |
| 53 | [NOTE ] PASSED! Tell ME that DRAM is ready |
| 54 | [NOTE ] ME: ME is reporting as disabled, so not waiting for a response. |
| 55 | [NOTE ] ME: FWS2: 0x100a0140 |
| 56 | [NOTE ] ME: Bist in progress: 0x0 |
| 57 | [NOTE ] ME: ICC Status : 0x0 |
| 58 | [NOTE ] ME: Invoke MEBx : 0x0 |
| 59 | [NOTE ] ME: CPU replaced : 0x0 |
| 60 | [NOTE ] ME: MBP ready : 0x0 |
| 61 | [NOTE ] ME: MFS failure : 0x1 |
| 62 | [NOTE ] ME: Warm reset req : 0x0 |
| 63 | [NOTE ] ME: CPU repl valid : 0x1 |
| 64 | [NOTE ] ME: (Reserved) : 0x0 |
| 65 | [NOTE ] ME: FW update req : 0x0 |
| 66 | [NOTE ] ME: (Reserved) : 0x0 |
| 67 | [NOTE ] ME: Current state : 0xa |
| 68 | [NOTE ] ME: Current PM event: 0x0 |
| 69 | [NOTE ] ME: Progress code : 0x1 |
| 70 | [NOTE ] ME: Requested BIOS Action: No DID Ack received |
| 71 | [DEBUG] ME: FW Partition Table : OK |
| 72 | [DEBUG] ME: Bringup Loader Failure : NO |
| 73 | [DEBUG] ME: Firmware Init Complete : NO |
| 74 | [DEBUG] ME: Manufacturing Mode : YES |
| 75 | [DEBUG] ME: Boot Options Present : NO |
| 76 | [DEBUG] ME: Update In Progress : NO |
| 77 | [DEBUG] ME: Current Working State : Initializing |
| 78 | [DEBUG] ME: Current Operation State : Bring up |
| 79 | [DEBUG] ME: Current Operation Mode : Debug or Disabled by AltDisableBit |
| 80 | [DEBUG] ME: Error Code : No Error |
| 81 | [DEBUG] ME: Progress Phase : BUP Phase |
| 82 | [DEBUG] ME: Power Management Event : Clean Moff->Mx wake |
| 83 | [DEBUG] ME: Progress Phase State : Check to see if straps say ME DISABLED |
| 84 | [DEBUG] memcfg DDR3 ref clock 133 MHz |
| 85 | [DEBUG] memcfg DDR3 clock 1330 MHz |
| 86 | [DEBUG] memcfg channel assignment: A: 0, B 1, C 2 |
| 87 | [DEBUG] memcfg channel[0] config (00620020): |
| 88 | [DEBUG] ECC inactive |
| 89 | [DEBUG] enhanced interleave mode on |
| 90 | [DEBUG] rank interleave on |
| 91 | [DEBUG] DIMMA 8192 MB width x8 dual rank, selected |
| 92 | [DEBUG] DIMMB 0 MB width x8 single rank |
| 93 | [DEBUG] memcfg channel[1] config (00620020): |
| 94 | [DEBUG] ECC inactive |
| 95 | [DEBUG] enhanced interleave mode on |
| 96 | [DEBUG] rank interleave on |
| 97 | [DEBUG] DIMMA 8192 MB width x8 dual rank, selected |
| 98 | [DEBUG] DIMMB 0 MB width x8 single rank |
| 99 | [DEBUG] SMM Memory Map |
| 100 | [DEBUG] SMRAM : 0x80000000 0x800000 |
| 101 | [DEBUG] Subregion 0: 0x80000000 0x300000 |
| 102 | [DEBUG] Subregion 1: 0x80300000 0x100000 |
| 103 | [DEBUG] Subregion 2: 0x80400000 0x400000 |
| 104 | [DEBUG] S3 Resume |
| 105 | [DEBUG] BS: romstage times (exec / console): total (unknown) / 1 ms |
| 106 | |
| 107 | |
| 108 | [NOTE ] coreboot-4.19-293-gdb4b71ff10 Mon Feb 06 19:30:57 UTC 2023 x86_32 postcar starting (log level: 8)... |
| 109 | [DEBUG] S3 Resume |
| 110 | [DEBUG] Jumping to image. |
| 111 | |
| 112 | |
| 113 | [NOTE ] coreboot-4.19-293-gdb4b71ff10 Mon Feb 06 19:30:57 UTC 2023 x86_32 ramstage starting (log level: 8)... |
| 114 | [DEBUG] S3 Resume |
| 115 | [INFO ] Enumerating buses... |
| 116 | [SPEW ] Show all devs... Before device enumeration. |
| 117 | [SPEW ] Root Device: enabled 1 |
| 118 | [SPEW ] CPU_CLUSTER: 0: enabled 1 |
| 119 | [SPEW ] DOMAIN: 0000: enabled 1 |
| 120 | [SPEW ] PCI: 00:00.0: enabled 1 |
| 121 | [SPEW ] PCI: 00:01.0: enabled 0 |
| 122 | [SPEW ] PCI: 00:01.1: enabled 0 |
| 123 | [SPEW ] PCI: 00:01.2: enabled 0 |
| 124 | [SPEW ] PCI: 00:02.0: enabled 1 |
| 125 | [SPEW ] PCI: 00:04.0: enabled 0 |
| 126 | [SPEW ] PCI: 00:06.0: enabled 0 |
| 127 | [SPEW ] PCI: 00:14.0: enabled 1 |
| 128 | [SPEW ] PCI: 00:16.0: enabled 1 |
| 129 | [SPEW ] PCI: 00:16.1: enabled 0 |
| 130 | [SPEW ] PCI: 00:16.2: enabled 0 |
| 131 | [SPEW ] PCI: 00:16.3: enabled 0 |
| 132 | [SPEW ] PCI: 00:19.0: enabled 1 |
| 133 | [SPEW ] PCI: 00:1a.0: enabled 1 |
| 134 | [SPEW ] PCI: 00:1b.0: enabled 1 |
| 135 | [SPEW ] PCI: 00:1c.0: enabled 1 |
| 136 | [SPEW ] PCI: 00:1c.1: enabled 1 |
| 137 | [SPEW ] PCI: 00:1c.2: enabled 1 |
| 138 | [SPEW ] PCI: 00:1c.3: enabled 0 |
| 139 | [SPEW ] PCI: 00:1c.4: enabled 0 |
| 140 | [SPEW ] PCI: 00:1c.5: enabled 0 |
| 141 | [SPEW ] PCI: 00:1c.6: enabled 0 |
| 142 | [SPEW ] PCI: 00:1c.7: enabled 0 |
| 143 | [SPEW ] PCI: 00:1d.0: enabled 1 |
| 144 | [SPEW ] PCI: 00:1e.0: enabled 0 |
| 145 | [SPEW ] PCI: 00:1f.0: enabled 1 |
| 146 | [SPEW ] PCI: 00:1f.2: enabled 1 |
| 147 | [SPEW ] PCI: 00:1f.3: enabled 1 |
| 148 | [SPEW ] PCI: 00:1f.5: enabled 0 |
| 149 | [SPEW ] PCI: 00:1f.6: enabled 1 |
| 150 | [SPEW ] PCI: 00:00.0: enabled 1 |
| 151 | [SPEW ] PNP: 00ff.1: enabled 1 |
| 152 | [SPEW ] PNP: 0c31.0: enabled 1 |
| 153 | [SPEW ] PNP: 00ff.2: enabled 1 |
| 154 | [SPEW ] I2C: 00:54: enabled 1 |
| 155 | [SPEW ] I2C: 00:55: enabled 1 |
| 156 | [SPEW ] I2C: 00:56: enabled 1 |
| 157 | [SPEW ] I2C: 00:57: enabled 1 |
| 158 | [SPEW ] I2C: 00:5c: enabled 1 |
| 159 | [SPEW ] I2C: 00:5d: enabled 1 |
| 160 | [SPEW ] I2C: 00:5e: enabled 1 |
| 161 | [SPEW ] I2C: 00:5f: enabled 1 |
| 162 | [SPEW ] Compare with tree... |
| 163 | [SPEW ] Root Device: enabled 1 |
| 164 | [SPEW ] CPU_CLUSTER: 0: enabled 1 |
| 165 | [SPEW ] DOMAIN: 0000: enabled 1 |
| 166 | [SPEW ] PCI: 00:00.0: enabled 1 |
| 167 | [SPEW ] PCI: 00:01.0: enabled 0 |
| 168 | [SPEW ] PCI: 00:01.1: enabled 0 |
| 169 | [SPEW ] PCI: 00:01.2: enabled 0 |
| 170 | [SPEW ] PCI: 00:02.0: enabled 1 |
| 171 | [SPEW ] PCI: 00:04.0: enabled 0 |
| 172 | [SPEW ] PCI: 00:06.0: enabled 0 |
| 173 | [SPEW ] PCI: 00:14.0: enabled 1 |
| 174 | [SPEW ] PCI: 00:16.0: enabled 1 |
| 175 | [SPEW ] PCI: 00:16.1: enabled 0 |
| 176 | [SPEW ] PCI: 00:16.2: enabled 0 |
| 177 | [SPEW ] PCI: 00:16.3: enabled 0 |
| 178 | [SPEW ] PCI: 00:19.0: enabled 1 |
| 179 | [SPEW ] PCI: 00:1a.0: enabled 1 |
| 180 | [SPEW ] PCI: 00:1b.0: enabled 1 |
| 181 | [SPEW ] PCI: 00:1c.0: enabled 1 |
| 182 | [SPEW ] PCI: 00:00.0: enabled 1 |
| 183 | [SPEW ] PCI: 00:1c.1: enabled 1 |
| 184 | [SPEW ] PCI: 00:1c.2: enabled 1 |
| 185 | [SPEW ] PCI: 00:1c.3: enabled 0 |
| 186 | [SPEW ] PCI: 00:1c.4: enabled 0 |
| 187 | [SPEW ] PCI: 00:1c.5: enabled 0 |
| 188 | [SPEW ] PCI: 00:1c.6: enabled 0 |
| 189 | [SPEW ] PCI: 00:1c.7: enabled 0 |
| 190 | [SPEW ] PCI: 00:1d.0: enabled 1 |
| 191 | [SPEW ] PCI: 00:1e.0: enabled 0 |
| 192 | [SPEW ] PCI: 00:1f.0: enabled 1 |
| 193 | [SPEW ] PNP: 00ff.1: enabled 1 |
| 194 | [SPEW ] PNP: 0c31.0: enabled 1 |
| 195 | [SPEW ] PNP: 00ff.2: enabled 1 |
| 196 | [SPEW ] PCI: 00:1f.2: enabled 1 |
| 197 | [SPEW ] PCI: 00:1f.3: enabled 1 |
| 198 | [SPEW ] I2C: 00:54: enabled 1 |
| 199 | [SPEW ] I2C: 00:55: enabled 1 |
| 200 | [SPEW ] I2C: 00:56: enabled 1 |
| 201 | [SPEW ] I2C: 00:57: enabled 1 |
| 202 | [SPEW ] I2C: 00:5c: enabled 1 |
| 203 | [SPEW ] I2C: 00:5d: enabled 1 |
| 204 | [SPEW ] I2C: 00:5e: enabled 1 |
| 205 | [SPEW ] I2C: 00:5f: enabled 1 |
| 206 | [SPEW ] PCI: 00:1f.5: enabled 0 |
| 207 | [SPEW ] PCI: 00:1f.6: enabled 1 |
| 208 | [DEBUG] Root Device scanning... |
| 209 | [SPEW ] scan_static_bus for Root Device |
| 210 | [DEBUG] CPU_CLUSTER: 0 enabled |
| 211 | [DEBUG] DOMAIN: 0000 enabled |
| 212 | [DEBUG] DOMAIN: 0000 scanning... |
| 213 | [DEBUG] PCI: pci_scan_bus for bus 00 |
| 214 | [SPEW ] PCI: 00:00.0 [8086/0000] ops |
| 215 | [DEBUG] PCI: 00:00.0 [8086/0154] enabled |
| 216 | [SPEW ] PCI: 00:01.0 [8086/0000] bus ops |
| 217 | [DEBUG] PCI: 00:01.0 [8086/0151] disabled |
| 218 | [SPEW ] PCI: 00:02.0 [8086/0000] ops |
| 219 | [DEBUG] PCI: 00:02.0 [8086/0166] enabled |
| 220 | [DEBUG] PCI: 00:04.0 [8086/0153] disabled |
| 221 | [SPEW ] PCI: 00:14.0 [8086/0000] ops |
| 222 | [DEBUG] PCI: 00:14.0 [8086/1e31] enabled |
| 223 | [SPEW ] PCI: 00:16.0 [8086/1e3a] ops |
| 224 | [DEBUG] PCI: 00:16.0 [8086/1e3a] enabled |
| 225 | [DEBUG] PCI: 00:16.1: Disabling device |
| 226 | [DEBUG] PCI: 00:16.2: Disabling device |
| 227 | [DEBUG] PCI: 00:16.3: Disabling device |
| 228 | [DEBUG] PCI: 00:19.0 [8086/1502] enabled |
| 229 | [SPEW ] PCI: 00:1a.0 [8086/0000] ops |
| 230 | [DEBUG] PCI: 00:1a.0 [8086/1e2d] enabled |
| 231 | [SPEW ] PCI: 00:1b.0 [8086/0000] ops |
| 232 | [DEBUG] PCI: 00:1b.0 [8086/1e20] enabled |
| 233 | [INFO ] PCH: PCIe Root Port coalescing is enabled |
| 234 | [SPEW ] PCI: 00:1c.0 [8086/0000] bus ops |
| 235 | [DEBUG] PCI: 00:1c.0 [8086/1e10] enabled |
| 236 | [SPEW ] PCI: 00:1c.1 [8086/0000] bus ops |
| 237 | [DEBUG] PCI: 00:1c.1 [8086/1e12] enabled |
| 238 | [SPEW ] PCI: 00:1c.2 [8086/0000] bus ops |
| 239 | [DEBUG] PCI: 00:1c.2 [8086/1e14] enabled |
| 240 | [DEBUG] PCI: 00:1c.3: Disabling device |
| 241 | [SPEW ] PCI: 00:1c.3 [8086/0000] bus ops |
| 242 | [DEBUG] PCI: 00:1c.3 [8086/1e16] disabled |
| 243 | [DEBUG] PCI: 00:1c.4: Disabling device |
| 244 | [DEBUG] PCI: 00:1c.4: check set enabled |
| 245 | [DEBUG] PCI: 00:1c.5: Disabling device |
| 246 | [DEBUG] PCI: 00:1c.6: Disabling device |
| 247 | [DEBUG] PCI: 00:1c.7: Disabling device |
| 248 | [SPEW ] PCH: RPFN 0x76543210 -> 0xfedcb210 |
| 249 | [SPEW ] PCI: 00:1d.0 [8086/0000] ops |
| 250 | [DEBUG] PCI: 00:1d.0 [8086/1e26] enabled |
| 251 | [DEBUG] PCI: 00:1e.0: Disabling device |
| 252 | [SPEW ] PCI: 00:1e.0 [8086/0000] bus ops |
| 253 | [DEBUG] PCI: 00:1e.0 [8086/2448] disabled |
| 254 | [SPEW ] PCI: 00:1f.0 [8086/0000] bus ops |
| 255 | [DEBUG] PCI: 00:1f.0 [8086/1e55] enabled |
| 256 | [SPEW ] PCI: 00:1f.2 [8086/0000] ops |
| 257 | [DEBUG] PCI: 00:1f.2 [8086/1e01] enabled |
| 258 | [SPEW ] PCI: 00:1f.3 [8086/0000] bus ops |
| 259 | [DEBUG] PCI: 00:1f.3 [8086/1e22] enabled |
| 260 | [DEBUG] PCI: 00:1f.5: Disabling device |
| 261 | [DEBUG] PCI: 00:1f.5 [8086/1e09] disabled No operations |
| 262 | [DEBUG] PCI: 00:1f.6 [8086/1e24] enabled |
| 263 | [WARN ] PCI: Leftover static devices: |
| 264 | [WARN ] PCI: 00:01.1 |
| 265 | [WARN ] PCI: 00:01.2 |
| 266 | [WARN ] PCI: 00:06.0 |
| 267 | [WARN ] PCI: 00:16.1 |
| 268 | [WARN ] PCI: 00:16.2 |
| 269 | [WARN ] PCI: 00:16.3 |
| 270 | [WARN ] PCI: 00:1c.4 |
| 271 | [WARN ] PCI: 00:1c.5 |
| 272 | [WARN ] PCI: 00:1c.6 |
| 273 | [WARN ] PCI: 00:1c.7 |
| 274 | [WARN ] PCI: Check your devicetree.cb. |
| 275 | [DEBUG] PCI: 00:1c.0 scanning... |
| 276 | [SPEW ] do_pci_scan_bridge for PCI: 00:1c.0 |
| 277 | [DEBUG] PCI: pci_scan_bus for bus 01 |
| 278 | [SPEW ] PCI: 01:00.0 [1180/0000] ops |
| 279 | [DEBUG] PCI: 01:00.0 [1180/e823] enabled |
| 280 | [INFO ] Enabling Common Clock Configuration |
| 281 | [INFO ] ASPM: Enabled L0s and L1 |
| 282 | [INFO ] PCIe: Max_Payload_Size adjusted to 128 |
| 283 | [DEBUG] PCI: 01:00.0: No LTR support |
| 284 | [DEBUG] scan_bus: bus PCI: 00:1c.0 finished in 0 msecs |
| 285 | [DEBUG] PCI: 00:1c.1 scanning... |
| 286 | [SPEW ] do_pci_scan_bridge for PCI: 00:1c.1 |
| 287 | [DEBUG] PCI: pci_scan_bus for bus 02 |
| 288 | [DEBUG] PCI: 02:00.0 [168c/002a] enabled |
| 289 | [INFO ] Enabling Common Clock Configuration |
| 290 | [INFO ] ASPM: Enabled L1 |
| 291 | [INFO ] PCIe: Max_Payload_Size adjusted to 128 |
| 292 | [DEBUG] PCI: 02:00.0: No LTR support |
| 293 | [DEBUG] scan_bus: bus PCI: 00:1c.1 finished in 0 msecs |
| 294 | [DEBUG] PCI: 00:1c.2 scanning... |
| 295 | [SPEW ] do_pci_scan_bridge for PCI: 00:1c.2 |
| 296 | [DEBUG] PCI: pci_scan_bus for bus 03 |
| 297 | [DEBUG] scan_bus: bus PCI: 00:1c.2 finished in 0 msecs |
| 298 | [DEBUG] PCI: 00:1f.0 scanning... |
| 299 | [SPEW ] scan_static_bus for PCI: 00:1f.0 |
| 300 | [INFO ] PMH7: ID 05 Revision 00 |
| 301 | [DEBUG] PNP: 00ff.1 enabled |
| 302 | [DEBUG] PNP: 0c31.0 enabled |
| 303 | [SPEW ] Clearing EC output queue... |
| 304 | [SPEW ] EC output queue has been cleared. |
| 305 | [SPEW ] recv_ec_data_timeout: 0x47 |
| 306 | [SPEW ] recv_ec_data_timeout: 0x32 |
| 307 | [SPEW ] recv_ec_data_timeout: 0x48 |
| 308 | [SPEW ] recv_ec_data_timeout: 0x54 |
| 309 | [SPEW ] recv_ec_data_timeout: 0x33 |
| 310 | [SPEW ] recv_ec_data_timeout: 0x35 |
| 311 | [SPEW ] recv_ec_data_timeout: 0x57 |
| 312 | [SPEW ] recv_ec_data_timeout: 0x57 |
| 313 | [SPEW ] recv_ec_data_timeout: 0x16 |
| 314 | [SPEW ] recv_ec_data_timeout: 0x03 |
| 315 | [SPEW ] recv_ec_data_timeout: 0x40 |
| 316 | [SPEW ] recv_ec_data_timeout: 0x11 |
| 317 | [INFO ] H8: EC Firmware ID G2HT35WW-3.22, Version 4.01B |
| 318 | [SPEW ] recv_ec_data_timeout: 0x01 |
| 319 | [SPEW ] recv_ec_data_timeout: 0x01 |
| 320 | [SPEW ] recv_ec_data_timeout: 0x80 |
| 321 | [SPEW ] recv_ec_data_timeout: 0x21 |
| 322 | [INFO ] H8: WWAN not installed |
| 323 | [SPEW ] recv_ec_data_timeout: 0x31 |
| 324 | [SPEW ] recv_ec_data_timeout: 0x00 |
| 325 | [SPEW ] recv_ec_data_timeout: 0xa6 |
| 326 | [SPEW ] recv_ec_data_timeout: 0xa6 |
| 327 | [SPEW ] recv_ec_data_timeout: 0x31 |
| 328 | [DEBUG] PNP: 00ff.2 enabled |
| 329 | [SPEW ] scan_static_bus for PCI: 00:1f.0 done |
| 330 | [DEBUG] scan_bus: bus PCI: 00:1f.0 finished in 3 msecs |
| 331 | [DEBUG] PCI: 00:1f.3 scanning... |
| 332 | [SPEW ] scan_generic_bus for PCI: 00:1f.3 |
| 333 | [DEBUG] I2C: 01:54 enabled |
| 334 | [DEBUG] bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled |
| 335 | [DEBUG] bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled |
| 336 | [DEBUG] bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled |
| 337 | [DEBUG] bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled |
| 338 | [DEBUG] bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled |
| 339 | [DEBUG] bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled |
| 340 | [DEBUG] bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled |
| 341 | [DEBUG] bus: PCI: 00:1f.3[0]->scan_generic_bus for PCI: 00:1f.3 done |
| 342 | [DEBUG] scan_bus: bus PCI: 00:1f.3 finished in 0 msecs |
| 343 | [DEBUG] scan_bus: bus DOMAIN: 0000 finished in 3 msecs |
| 344 | [SPEW ] scan_static_bus for Root Device done |
| 345 | [DEBUG] scan_bus: bus Root Device finished in 3 msecs |
| 346 | [INFO ] done |
| 347 | [DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 0 ms |
| 348 | [DEBUG] FMAP: area RW_MRC_CACHE found @ 800000 (65536 bytes) |
| 349 | [DEBUG] FMAP: area RW_MRC_CACHE found @ 800000 (65536 bytes) |
| 350 | [DEBUG] MRC: Checking cached data update for 'RW_MRC_CACHE'. |
| 351 | [DEBUG] flash size 0xc00000 bytes |
| 352 | [INFO ] SF: Detected 00 0000 with sector size 0x100, total 0xc00000 |
| 353 | [DEBUG] MRC: 'RW_MRC_CACHE' does not need update. |
| 354 | [DEBUG] found VGA at PCI: 00:02.0 |
| 355 | [DEBUG] Setting up VGA for PCI: 00:02.0 |
| 356 | [DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| 357 | [DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| 358 | [INFO ] Allocating resources... |
| 359 | [INFO ] Reading resources... |
| 360 | [SPEW ] Root Device read_resources bus 0 link: 0 |
| 361 | [SPEW ] DOMAIN: 0000 read_resources bus 0 link: 0 |
| 362 | [DEBUG] Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000. |
| 363 | [DEBUG] TOUUD 0x47d600000 TOLUD 0x82a00000 TOM 0x400000000 |
| 364 | [DEBUG] MEBASE 0x7ffff00000 |
| 365 | [DEBUG] IGD decoded, subtracting 32M UMA and 2M GTT |
| 366 | [DEBUG] TSEG base 0x80000000 size 8M |
| 367 | [INFO ] Available memory below 4GB: 2048M |
| 368 | [SPEW ] dev: PCI: 00:00.0, index: 0x3, base: 0x0, size: 0xa0000 |
| 369 | [SPEW ] dev: PCI: 00:00.0, index: 0x4, base: 0x100000, size: 0x7ff00000 |
| 370 | [INFO ] Available memory above 4GB: 14294M |
| 371 | [SPEW ] dev: PCI: 00:00.0, index: 0x5, base: 0x100000000, size: 0x37d600000 |
| 372 | [SPEW ] dev: PCI: 00:00.0, index: 0x6, base: 0x80000000, size: 0x2a00000 |
| 373 | [SPEW ] dev: PCI: 00:00.0, index: 0x7, base: 0xa0000, size: 0x20000 |
| 374 | [SPEW ] dev: PCI: 00:00.0, index: 0x8, base: 0xc0000, size: 0x40000 |
| 375 | [SPEW ] dev: PCI: 00:00.0, index: 0x9, base: 0xfed90000, size: 0x1000 |
| 376 | [SPEW ] dev: PCI: 00:00.0, index: 0xa, base: 0xfed91000, size: 0x1000 |
| 377 | [SPEW ] PCI: 00:1c.0 read_resources bus 1 link: 0 |
| 378 | [SPEW ] PCI: 00:1c.0 read_resources bus 1 link: 0 done |
| 379 | [SPEW ] PCI: 00:1c.1 read_resources bus 2 link: 0 |
| 380 | [SPEW ] PCI: 00:1c.1 read_resources bus 2 link: 0 done |
| 381 | [SPEW ] PCI: 00:1c.2 read_resources bus 3 link: 0 |
| 382 | [SPEW ] PCI: 00:1c.2 read_resources bus 3 link: 0 done |
| 383 | [SPEW ] PCI: 00:1f.0 read_resources bus 0 link: 0 |
| 384 | [ERROR] PNP: 00ff.1 missing read_resources |
| 385 | [SPEW ] dev: PNP: 0c31.0, index: 0x0, base: 0xfed40000, size: 0x5000 |
| 386 | [ERROR] PNP: 00ff.2 missing read_resources |
| 387 | [SPEW ] PCI: 00:1f.0 read_resources bus 0 link: 0 done |
| 388 | [SPEW ] PCI: 00:1f.3 read_resources bus 1 link: 0 |
| 389 | [SPEW ] PCI: 00:1f.3 read_resources bus 1 link: 0 done |
| 390 | [SPEW ] DOMAIN: 0000 read_resources bus 0 link: 0 done |
| 391 | [SPEW ] Root Device read_resources bus 0 link: 0 done |
| 392 | [INFO ] Done reading resources. |
| 393 | [SPEW ] Show resources in subtree (Root Device)...After reading. |
| 394 | [DEBUG] Root Device child on link 0 CPU_CLUSTER: 0 |
| 395 | [DEBUG] CPU_CLUSTER: 0 |
| 396 | [DEBUG] DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| 397 | [SPEW ] DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 |
| 398 | [SPEW ] DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit fffffffff flags 40040200 index 10000100 |
| 399 | [DEBUG] PCI: 00:00.0 |
| 400 | [SPEW ] PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 |
| 401 | [SPEW ] PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 |
| 402 | [SPEW ] PCI: 00:00.0 resource base 100000 size 7ff00000 align 0 gran 0 limit 0 flags e0004200 index 4 |
| 403 | [SPEW ] PCI: 00:00.0 resource base 100000000 size 37d600000 align 0 gran 0 limit 0 flags e0004200 index 5 |
| 404 | [SPEW ] PCI: 00:00.0 resource base 80000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6 |
| 405 | [SPEW ] PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7 |
| 406 | [SPEW ] PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8 |
| 407 | [SPEW ] PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9 |
| 408 | [SPEW ] PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a |
| 409 | [DEBUG] PCI: 00:01.0 |
| 410 | [DEBUG] PCI: 00:02.0 |
| 411 | [SPEW ] PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10 |
| 412 | [SPEW ] PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18 |
| 413 | [SPEW ] PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 |
| 414 | [DEBUG] PCI: 00:04.0 |
| 415 | [DEBUG] PCI: 00:14.0 |
| 416 | [SPEW ] PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 |
| 417 | [DEBUG] PCI: 00:16.0 |
| 418 | [SPEW ] PCI: 00:16.0 resource base 0 size 10 align 12 gran 4 limit ffffffffffffffff flags 201 index 10 |
| 419 | [DEBUG] PCI: 00:19.0 |
| 420 | [SPEW ] PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 |
| 421 | [SPEW ] PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 |
| 422 | [SPEW ] PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 |
| 423 | [DEBUG] PCI: 00:1a.0 |
| 424 | [SPEW ] PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| 425 | [DEBUG] PCI: 00:1b.0 |
| 426 | [SPEW ] PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 |
| 427 | [DEBUG] PCI: 00:1c.0 child on link 0 PCI: 01:00.0 |
| 428 | [SPEW ] PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| 429 | [SPEW ] PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| 430 | [SPEW ] PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| 431 | [DEBUG] PCI: 01:00.0 |
| 432 | [SPEW ] PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 |
| 433 | [DEBUG] PCI: 00:1c.1 child on link 0 PCI: 02:00.0 |
| 434 | [SPEW ] PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| 435 | [SPEW ] PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| 436 | [SPEW ] PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| 437 | [DEBUG] PCI: 02:00.0 |
| 438 | [SPEW ] PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 |
| 439 | [DEBUG] PCI: 00:1c.2 child on link 0 NONE |
| 440 | [SPEW ] PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c |
| 441 | [SPEW ] PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 |
| 442 | [SPEW ] PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 |
| 443 | [DEBUG] NONE |
| 444 | [SPEW ] NONE resource base 0 size 800000 align 12 gran 12 limit ffffffff flags 200 index 10 |
| 445 | [SPEW ] NONE resource base 0 size 10000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14 |
| 446 | [SPEW ] NONE resource base 0 size 2000 align 12 gran 12 limit ffff flags 100 index 18 |
| 447 | [DEBUG] PCI: 00:1c.3 |
| 448 | [DEBUG] PCI: 00:1d.0 |
| 449 | [SPEW ] PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 |
| 450 | [DEBUG] PCI: 00:1e.0 |
| 451 | [DEBUG] PCI: 00:1f.0 child on link 0 PNP: 00ff.1 |
| 452 | [SPEW ] PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| 453 | [SPEW ] PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| 454 | [SPEW ] PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| 455 | [SPEW ] PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200 |
| 456 | [SPEW ] PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300 |
| 457 | [DEBUG] PNP: 00ff.1 |
| 458 | [SPEW ] PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags c0000100 index 77 |
| 459 | [DEBUG] PNP: 0c31.0 |
| 460 | [SPEW ] PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| 461 | [SPEW ] PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0 |
| 462 | [DEBUG] PNP: 00ff.2 |
| 463 | [SPEW ] PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| 464 | [SPEW ] PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 |
| 465 | [SPEW ] PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 |
| 466 | [SPEW ] PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 |
| 467 | [DEBUG] PCI: 00:1f.2 |
| 468 | [SPEW ] PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 |
| 469 | [SPEW ] PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 |
| 470 | [SPEW ] PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 |
| 471 | [SPEW ] PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c |
| 472 | [SPEW ] PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 |
| 473 | [SPEW ] PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24 |
| 474 | [DEBUG] PCI: 00:1f.3 child on link 0 I2C: 01:54 |
| 475 | [SPEW ] PCI: 00:1f.3 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10 |
| 476 | [SPEW ] PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 |
| 477 | [DEBUG] I2C: 01:54 |
| 478 | [DEBUG] I2C: 01:55 |
| 479 | [DEBUG] I2C: 01:56 |
| 480 | [DEBUG] I2C: 01:57 |
| 481 | [DEBUG] I2C: 01:5c |
| 482 | [DEBUG] I2C: 01:5d |
| 483 | [DEBUG] I2C: 01:5e |
| 484 | [DEBUG] I2C: 01:5f |
| 485 | [DEBUG] PCI: 00:1f.5 |
| 486 | [DEBUG] PCI: 00:1f.6 |
| 487 | [SPEW ] PCI: 00:1f.6 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10 |
| 488 | [INFO ] === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) === |
| 489 | [DEBUG] PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff |
| 490 | [DEBUG] PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff done |
| 491 | [DEBUG] PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff |
| 492 | [DEBUG] PCI: 01:00.0 10 * [0x0 - 0xff] mem |
| 493 | [DEBUG] PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done |
| 494 | [DEBUG] PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| 495 | [DEBUG] PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| 496 | [DEBUG] PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff |
| 497 | [DEBUG] PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff done |
| 498 | [DEBUG] PCI: 00:1c.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff |
| 499 | [DEBUG] PCI: 02:00.0 10 * [0x0 - 0xffff] mem |
| 500 | [DEBUG] PCI: 00:1c.1 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done |
| 501 | [DEBUG] PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| 502 | [DEBUG] PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| 503 | [DEBUG] PCI: 00:1c.2 io: size: 0 align: 12 gran: 12 limit: ffff |
| 504 | [DEBUG] NONE 18 * [0x0 - 0x1fff] io |
| 505 | [DEBUG] PCI: 00:1c.2 io: size: 2000 align: 12 gran: 12 limit: ffff done |
| 506 | [DEBUG] PCI: 00:1c.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff |
| 507 | [DEBUG] NONE 10 * [0x0 - 0x7fffff] mem |
| 508 | [DEBUG] PCI: 00:1c.2 mem: size: 800000 align: 20 gran: 20 limit: ffffffff done |
| 509 | [DEBUG] PCI: 00:1c.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| 510 | [DEBUG] NONE 14 * [0x0 - 0xfffffff] prefmem |
| 511 | [DEBUG] PCI: 00:1c.2 prefmem: size: 10000000 align: 20 gran: 20 limit: ffffffffffffffff done |
| 512 | [INFO ] === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) === |
| 513 | [DEBUG] DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff |
| 514 | [DEBUG] update_constraints: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed) |
| 515 | [DEBUG] update_constraints: PCI: 00:1f.0 10000200 base 00001600 limit 0000167b io (fixed) |
| 516 | [DEBUG] update_constraints: PCI: 00:1f.0 10000300 base 000015e0 limit 000015eb io (fixed) |
| 517 | [DEBUG] update_constraints: PNP: 00ff.1 77 base 000015e0 limit 000015ef io (fixed) |
| 518 | [DEBUG] update_constraints: PCI: 00:1f.3 20 base 00000400 limit 0000041f io (fixed) |
| 519 | [INFO ] DOMAIN: 0000: Resource ranges: |
| 520 | [INFO ] * Base: 1000, Size: 5e0, Tag: 100 |
| 521 | [INFO ] * Base: 15f0, Size: 10, Tag: 100 |
| 522 | [INFO ] * Base: 167c, Size: e984, Tag: 100 |
| 523 | [DEBUG] PCI: 00:1c.2 1c * [0x2000 - 0x3fff] limit: 3fff io |
| 524 | [DEBUG] PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io |
| 525 | [DEBUG] PCI: 00:19.0 18 * [0x1040 - 0x105f] limit: 105f io |
| 526 | [DEBUG] PCI: 00:1f.2 20 * [0x1060 - 0x107f] limit: 107f io |
| 527 | [DEBUG] PCI: 00:1f.2 10 * [0x1080 - 0x1087] limit: 1087 io |
| 528 | [DEBUG] PCI: 00:1f.2 18 * [0x1088 - 0x108f] limit: 108f io |
| 529 | [DEBUG] PCI: 00:1f.2 14 * [0x1090 - 0x1093] limit: 1093 io |
| 530 | [DEBUG] PCI: 00:1f.2 1c * [0x1094 - 0x1097] limit: 1097 io |
| 531 | [DEBUG] DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done |
| 532 | [DEBUG] DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff |
| 533 | [DEBUG] update_constraints: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed) |
| 534 | [DEBUG] update_constraints: PCI: 00:00.0 03 base 00000000 limit 0009ffff mem (fixed) |
| 535 | [DEBUG] update_constraints: PCI: 00:00.0 04 base 00100000 limit 7fffffff mem (fixed) |
| 536 | [DEBUG] update_constraints: PCI: 00:00.0 05 base 100000000 limit 47d5fffff mem (fixed) |
| 537 | [DEBUG] update_constraints: PCI: 00:00.0 06 base 80000000 limit 829fffff mem (fixed) |
| 538 | [DEBUG] update_constraints: PCI: 00:00.0 07 base 000a0000 limit 000bffff mem (fixed) |
| 539 | [DEBUG] update_constraints: PCI: 00:00.0 08 base 000c0000 limit 000fffff mem (fixed) |
| 540 | [DEBUG] update_constraints: PCI: 00:00.0 09 base fed90000 limit fed90fff mem (fixed) |
| 541 | [DEBUG] update_constraints: PCI: 00:00.0 0a base fed91000 limit fed91fff mem (fixed) |
| 542 | [DEBUG] update_constraints: PCI: 00:1f.0 10000100 base ff000000 limit ffffffff mem (fixed) |
| 543 | [DEBUG] update_constraints: PCI: 00:1f.0 03 base fec00000 limit fec00fff mem (fixed) |
| 544 | [DEBUG] update_constraints: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed) |
| 545 | [INFO ] DOMAIN: 0000: Resource ranges: |
| 546 | [INFO ] * Base: 82a00000, Size: 6d600000, Tag: 200 |
| 547 | [INFO ] * Base: f4000000, Size: ac00000, Tag: 200 |
| 548 | [INFO ] * Base: fec01000, Size: 13f000, Tag: 200 |
| 549 | [INFO ] * Base: fed45000, Size: 4b000, Tag: 200 |
| 550 | [INFO ] * Base: fed92000, Size: 26e000, Tag: 200 |
| 551 | [INFO ] * Base: 47d600000, Size: b82a00000, Tag: 100200 |
| 552 | [DEBUG] PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem |
| 553 | [DEBUG] PCI: 00:02.0 10 * [0x82c00000 - 0x82ffffff] limit: 82ffffff mem |
| 554 | [DEBUG] PCI: 00:1c.2 20 * [0x83000000 - 0x837fffff] limit: 837fffff mem |
| 555 | [DEBUG] PCI: 00:1c.0 20 * [0x82a00000 - 0x82afffff] limit: 82afffff mem |
| 556 | [DEBUG] PCI: 00:1c.1 20 * [0x82b00000 - 0x82bfffff] limit: 82bfffff mem |
| 557 | [DEBUG] PCI: 00:19.0 10 * [0x83800000 - 0x8381ffff] limit: 8381ffff mem |
| 558 | [DEBUG] PCI: 00:14.0 10 * [0x83820000 - 0x8382ffff] limit: 8382ffff mem |
| 559 | [DEBUG] PCI: 00:1b.0 10 * [0x83830000 - 0x83833fff] limit: 83833fff mem |
| 560 | [DEBUG] PCI: 00:19.0 14 * [0x83834000 - 0x83834fff] limit: 83834fff mem |
| 561 | [DEBUG] PCI: 00:1f.6 10 * [0x83835000 - 0x83835fff] limit: 83835fff mem |
| 562 | [DEBUG] PCI: 00:1f.2 24 * [0x83836000 - 0x838367ff] limit: 838367ff mem |
| 563 | [DEBUG] PCI: 00:1a.0 10 * [0x83837000 - 0x838373ff] limit: 838373ff mem |
| 564 | [DEBUG] PCI: 00:1d.0 10 * [0x83838000 - 0x838383ff] limit: 838383ff mem |
| 565 | [DEBUG] PCI: 00:1f.3 10 * [0x83839000 - 0x838390ff] limit: 838390ff mem |
| 566 | [DEBUG] PCI: 00:16.0 10 * [0x8383a000 - 0x8383a00f] limit: 8383a00f mem |
| 567 | [DEBUG] PCI: 00:1c.2 24 * [0x47d600000 - 0x48d5fffff] limit: 48d5fffff prefmem |
| 568 | [DEBUG] DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff done |
| 569 | [DEBUG] PCI: 00:1c.0 mem: base: 82a00000 size: 100000 align: 20 gran: 20 limit: 82afffff |
| 570 | [INFO ] PCI: 00:1c.0: Resource ranges: |
| 571 | [INFO ] * Base: 82a00000, Size: 100000, Tag: 200 |
| 572 | [DEBUG] PCI: 01:00.0 10 * [0x82a00000 - 0x82a000ff] limit: 82a000ff mem |
| 573 | [DEBUG] PCI: 00:1c.0 mem: base: 82a00000 size: 100000 align: 20 gran: 20 limit: 82afffff done |
| 574 | [DEBUG] PCI: 00:1c.1 mem: base: 82b00000 size: 100000 align: 20 gran: 20 limit: 82bfffff |
| 575 | [INFO ] PCI: 00:1c.1: Resource ranges: |
| 576 | [INFO ] * Base: 82b00000, Size: 100000, Tag: 200 |
| 577 | [DEBUG] PCI: 02:00.0 10 * [0x82b00000 - 0x82b0ffff] limit: 82b0ffff mem |
| 578 | [DEBUG] PCI: 00:1c.1 mem: base: 82b00000 size: 100000 align: 20 gran: 20 limit: 82bfffff done |
| 579 | [DEBUG] PCI: 00:1c.2 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff |
| 580 | [INFO ] PCI: 00:1c.2: Resource ranges: |
| 581 | [INFO ] * Base: 2000, Size: 2000, Tag: 100 |
| 582 | [DEBUG] NONE 18 * [0x2000 - 0x3fff] limit: 3fff io |
| 583 | [DEBUG] PCI: 00:1c.2 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff done |
| 584 | [DEBUG] PCI: 00:1c.2 prefmem: base: 47d600000 size: 10000000 align: 20 gran: 20 limit: 48d5fffff |
| 585 | [INFO ] PCI: 00:1c.2: Resource ranges: |
| 586 | [INFO ] * Base: 47d600000, Size: 10000000, Tag: 1200 |
| 587 | [DEBUG] NONE 14 * [0x47d600000 - 0x48d5fffff] limit: 48d5fffff prefmem |
| 588 | [DEBUG] PCI: 00:1c.2 prefmem: base: 47d600000 size: 10000000 align: 20 gran: 20 limit: 48d5fffff done |
| 589 | [DEBUG] PCI: 00:1c.2 mem: base: 83000000 size: 800000 align: 20 gran: 20 limit: 837fffff |
| 590 | [INFO ] PCI: 00:1c.2: Resource ranges: |
| 591 | [INFO ] * Base: 83000000, Size: 800000, Tag: 200 |
| 592 | [DEBUG] NONE 10 * [0x83000000 - 0x837fffff] limit: 837fffff mem |
| 593 | [DEBUG] PCI: 00:1c.2 mem: base: 83000000 size: 800000 align: 20 gran: 20 limit: 837fffff done |
| 594 | [INFO ] === Resource allocator: DOMAIN: 0000 - resource allocation complete === |
| 595 | [SPEW ] Root Device assign_resources, bus 0 link: 0 |
| 596 | [SPEW ] DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| 597 | [DEBUG] PCI: 00:02.0 10 <- [0x0000000082c00000 - 0x0000000082ffffff] size 0x00400000 gran 0x16 mem64 |
| 598 | [DEBUG] PCI: 00:02.0 18 <- [0x0000000090000000 - 0x000000009fffffff] size 0x10000000 gran 0x1c prefmem64 |
| 599 | [DEBUG] PCI: 00:02.0 20 <- [0x0000000000001000 - 0x000000000000103f] size 0x00000040 gran 0x06 io |
| 600 | [DEBUG] PCI: 00:14.0 10 <- [0x0000000083820000 - 0x000000008382ffff] size 0x00010000 gran 0x10 mem64 |
| 601 | [DEBUG] PCI: 00:16.0 10 <- [0x000000008383a000 - 0x000000008383a00f] size 0x00000010 gran 0x04 mem64 |
| 602 | [DEBUG] PCI: 00:19.0 10 <- [0x0000000083800000 - 0x000000008381ffff] size 0x00020000 gran 0x11 mem |
| 603 | [DEBUG] PCI: 00:19.0 14 <- [0x0000000083834000 - 0x0000000083834fff] size 0x00001000 gran 0x0c mem |
| 604 | [DEBUG] PCI: 00:19.0 18 <- [0x0000000000001040 - 0x000000000000105f] size 0x00000020 gran 0x05 io |
| 605 | [DEBUG] PCI: 00:1a.0 10 <- [0x0000000083837000 - 0x00000000838373ff] size 0x00000400 gran 0x0a mem |
| 606 | [DEBUG] PCI: 00:1b.0 10 <- [0x0000000083830000 - 0x0000000083833fff] size 0x00004000 gran 0x0e mem64 |
| 607 | [DEBUG] PCI: 00:1c.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 01 io |
| 608 | [DEBUG] PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem |
| 609 | [DEBUG] PCI: 00:1c.0 20 <- [0x0000000082a00000 - 0x0000000082afffff] size 0x00100000 gran 0x14 bus 01 mem |
| 610 | [SPEW ] PCI: 00:1c.0 assign_resources, bus 1 link: 0 |
| 611 | [DEBUG] PCI: 01:00.0 10 <- [0x0000000082a00000 - 0x0000000082a000ff] size 0x00000100 gran 0x08 mem |
| 612 | [SPEW ] PCI: 00:1c.0 assign_resources, bus 1 link: 0 done |
| 613 | [DEBUG] PCI: 00:1c.1 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 02 io |
| 614 | [DEBUG] PCI: 00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem |
| 615 | [DEBUG] PCI: 00:1c.1 20 <- [0x0000000082b00000 - 0x0000000082bfffff] size 0x00100000 gran 0x14 bus 02 mem |
| 616 | [SPEW ] PCI: 00:1c.1 assign_resources, bus 2 link: 0 |
| 617 | [DEBUG] PCI: 02:00.0 10 <- [0x0000000082b00000 - 0x0000000082b0ffff] size 0x00010000 gran 0x10 mem64 |
| 618 | [SPEW ] PCI: 00:1c.1 assign_resources, bus 2 link: 0 done |
| 619 | [DEBUG] PCI: 00:1c.2 1c <- [0x0000000000002000 - 0x0000000000003fff] size 0x00002000 gran 0x0c bus 03 io |
| 620 | [DEBUG] PCI: 00:1c.2 24 <- [0x000000047d600000 - 0x000000048d5fffff] size 0x10000000 gran 0x14 bus 03 prefmem |
| 621 | [DEBUG] PCI: 00:1c.2 20 <- [0x0000000083000000 - 0x00000000837fffff] size 0x00800000 gran 0x14 bus 03 mem |
| 622 | [SPEW ] PCI: 00:1c.2 assign_resources, bus 3 link: 0 |
| 623 | [SPEW ] PCI: 00:1c.2 assign_resources, bus 3 link: 0 done |
| 624 | [DEBUG] PCI: 00:1d.0 10 <- [0x0000000083838000 - 0x00000000838383ff] size 0x00000400 gran 0x0a mem |
| 625 | [SPEW ] PCI: 00:1f.0 assign_resources, bus 0 link: 0 |
| 626 | [ERROR] PNP: 00ff.1 missing set_resources |
| 627 | [ERROR] PNP: 00ff.2 missing set_resources |
| 628 | [SPEW ] PCI: 00:1f.0 assign_resources, bus 0 link: 0 done |
| 629 | [DEBUG] PCI: 00:1f.2 10 <- [0x0000000000001080 - 0x0000000000001087] size 0x00000008 gran 0x03 io |
| 630 | [DEBUG] PCI: 00:1f.2 14 <- [0x0000000000001090 - 0x0000000000001093] size 0x00000004 gran 0x02 io |
| 631 | [DEBUG] PCI: 00:1f.2 18 <- [0x0000000000001088 - 0x000000000000108f] size 0x00000008 gran 0x03 io |
| 632 | [DEBUG] PCI: 00:1f.2 1c <- [0x0000000000001094 - 0x0000000000001097] size 0x00000004 gran 0x02 io |
| 633 | [DEBUG] PCI: 00:1f.2 20 <- [0x0000000000001060 - 0x000000000000107f] size 0x00000020 gran 0x05 io |
| 634 | [DEBUG] PCI: 00:1f.2 24 <- [0x0000000083836000 - 0x00000000838367ff] size 0x00000800 gran 0x0b mem |
| 635 | [DEBUG] PCI: 00:1f.3 10 <- [0x0000000083839000 - 0x00000000838390ff] size 0x00000100 gran 0x08 mem64 |
| 636 | [SPEW ] PCI: 00:1f.3 assign_resources, bus 1 link: 0 |
| 637 | [SPEW ] PCI: 00:1f.3 assign_resources, bus 1 link: 0 done |
| 638 | [DEBUG] PCI: 00:1f.6 10 <- [0x0000000083835000 - 0x0000000083835fff] size 0x00001000 gran 0x0c mem64 |
| 639 | [SPEW ] DOMAIN: 0000 assign_resources, bus 0 link: 0 done |
| 640 | [SPEW ] Root Device assign_resources, bus 0 link: 0 done |
| 641 | [INFO ] Done setting resources. |
| 642 | [SPEW ] Show resources in subtree (Root Device)...After assigning values. |
| 643 | [DEBUG] Root Device child on link 0 CPU_CLUSTER: 0 |
| 644 | [DEBUG] CPU_CLUSTER: 0 |
| 645 | [DEBUG] DOMAIN: 0000 child on link 0 PCI: 00:00.0 |
| 646 | [SPEW ] DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 |
| 647 | [SPEW ] DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit fffffffff flags 40040200 index 10000100 |
| 648 | [DEBUG] PCI: 00:00.0 |
| 649 | [SPEW ] PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 |
| 650 | [SPEW ] PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 |
| 651 | [SPEW ] PCI: 00:00.0 resource base 100000 size 7ff00000 align 0 gran 0 limit 0 flags e0004200 index 4 |
| 652 | [SPEW ] PCI: 00:00.0 resource base 100000000 size 37d600000 align 0 gran 0 limit 0 flags e0004200 index 5 |
| 653 | [SPEW ] PCI: 00:00.0 resource base 80000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6 |
| 654 | [SPEW ] PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7 |
| 655 | [SPEW ] PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8 |
| 656 | [SPEW ] PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9 |
| 657 | [SPEW ] PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a |
| 658 | [DEBUG] PCI: 00:01.0 |
| 659 | [DEBUG] PCI: 00:02.0 |
| 660 | [SPEW ] PCI: 00:02.0 resource base 82c00000 size 400000 align 22 gran 22 limit 82ffffff flags 60000201 index 10 |
| 661 | [SPEW ] PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18 |
| 662 | [SPEW ] PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20 |
| 663 | [DEBUG] PCI: 00:04.0 |
| 664 | [DEBUG] PCI: 00:14.0 |
| 665 | [SPEW ] PCI: 00:14.0 resource base 83820000 size 10000 align 16 gran 16 limit 8382ffff flags 60000201 index 10 |
| 666 | [DEBUG] PCI: 00:16.0 |
| 667 | [SPEW ] PCI: 00:16.0 resource base 8383a000 size 10 align 12 gran 4 limit 8383a00f flags 60000201 index 10 |
| 668 | [DEBUG] PCI: 00:19.0 |
| 669 | [SPEW ] PCI: 00:19.0 resource base 83800000 size 20000 align 17 gran 17 limit 8381ffff flags 60000200 index 10 |
| 670 | [SPEW ] PCI: 00:19.0 resource base 83834000 size 1000 align 12 gran 12 limit 83834fff flags 60000200 index 14 |
| 671 | [SPEW ] PCI: 00:19.0 resource base 1040 size 20 align 5 gran 5 limit 105f flags 60000100 index 18 |
| 672 | [DEBUG] PCI: 00:1a.0 |
| 673 | [SPEW ] PCI: 00:1a.0 resource base 83837000 size 400 align 12 gran 10 limit 838373ff flags 60000200 index 10 |
| 674 | [DEBUG] PCI: 00:1b.0 |
| 675 | [SPEW ] PCI: 00:1b.0 resource base 83830000 size 4000 align 14 gran 14 limit 83833fff flags 60000201 index 10 |
| 676 | [DEBUG] PCI: 00:1c.0 child on link 0 PCI: 01:00.0 |
| 677 | [SPEW ] PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c |
| 678 | [SPEW ] PCI: 00:1c.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24 |
| 679 | [SPEW ] PCI: 00:1c.0 resource base 82a00000 size 100000 align 20 gran 20 limit 82afffff flags 60080202 index 20 |
| 680 | [DEBUG] PCI: 01:00.0 |
| 681 | [SPEW ] PCI: 01:00.0 resource base 82a00000 size 100 align 12 gran 8 limit 82a000ff flags 60000200 index 10 |
| 682 | [DEBUG] PCI: 00:1c.1 child on link 0 PCI: 02:00.0 |
| 683 | [SPEW ] PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c |
| 684 | [SPEW ] PCI: 00:1c.1 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24 |
| 685 | [SPEW ] PCI: 00:1c.1 resource base 82b00000 size 100000 align 20 gran 20 limit 82bfffff flags 60080202 index 20 |
| 686 | [DEBUG] PCI: 02:00.0 |
| 687 | [SPEW ] PCI: 02:00.0 resource base 82b00000 size 10000 align 16 gran 16 limit 82b0ffff flags 60000201 index 10 |
| 688 | [DEBUG] PCI: 00:1c.2 child on link 0 NONE |
| 689 | [SPEW ] PCI: 00:1c.2 resource base 2000 size 2000 align 12 gran 12 limit 3fff flags 60080102 index 1c |
| 690 | [SPEW ] PCI: 00:1c.2 resource base 47d600000 size 10000000 align 20 gran 20 limit 48d5fffff flags 60181202 index 24 |
| 691 | [SPEW ] PCI: 00:1c.2 resource base 83000000 size 800000 align 20 gran 20 limit 837fffff flags 60080202 index 20 |
| 692 | [DEBUG] NONE |
| 693 | [SPEW ] NONE resource base 83000000 size 800000 align 12 gran 12 limit 837fffff flags 40000200 index 10 |
| 694 | [SPEW ] NONE resource base 47d600000 size 10000000 align 12 gran 12 limit 48d5fffff flags 40101200 index 14 |
| 695 | [SPEW ] NONE resource base 2000 size 2000 align 12 gran 12 limit 3fff flags 40000100 index 18 |
| 696 | [DEBUG] PCI: 00:1c.3 |
| 697 | [DEBUG] PCI: 00:1d.0 |
| 698 | [SPEW ] PCI: 00:1d.0 resource base 83838000 size 400 align 12 gran 10 limit 838383ff flags 60000200 index 10 |
| 699 | [DEBUG] PCI: 00:1e.0 |
| 700 | [DEBUG] PCI: 00:1f.0 child on link 0 PNP: 00ff.1 |
| 701 | [SPEW ] PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 |
| 702 | [SPEW ] PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 |
| 703 | [SPEW ] PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| 704 | [SPEW ] PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200 |
| 705 | [SPEW ] PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300 |
| 706 | [DEBUG] PNP: 00ff.1 |
| 707 | [SPEW ] PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags c0000100 index 77 |
| 708 | [DEBUG] PNP: 0c31.0 |
| 709 | [SPEW ] PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 |
| 710 | [SPEW ] PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0 |
| 711 | [DEBUG] PNP: 00ff.2 |
| 712 | [SPEW ] PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 |
| 713 | [SPEW ] PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 |
| 714 | [SPEW ] PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 |
| 715 | [SPEW ] PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 |
| 716 | [DEBUG] PCI: 00:1f.2 |
| 717 | [SPEW ] PCI: 00:1f.2 resource base 1080 size 8 align 3 gran 3 limit 1087 flags 60000100 index 10 |
| 718 | [SPEW ] PCI: 00:1f.2 resource base 1090 size 4 align 2 gran 2 limit 1093 flags 60000100 index 14 |
| 719 | [SPEW ] PCI: 00:1f.2 resource base 1088 size 8 align 3 gran 3 limit 108f flags 60000100 index 18 |
| 720 | [SPEW ] PCI: 00:1f.2 resource base 1094 size 4 align 2 gran 2 limit 1097 flags 60000100 index 1c |
| 721 | [SPEW ] PCI: 00:1f.2 resource base 1060 size 20 align 5 gran 5 limit 107f flags 60000100 index 20 |
| 722 | [SPEW ] PCI: 00:1f.2 resource base 83836000 size 800 align 12 gran 11 limit 838367ff flags 60000200 index 24 |
| 723 | [DEBUG] PCI: 00:1f.3 child on link 0 I2C: 01:54 |
| 724 | [SPEW ] PCI: 00:1f.3 resource base 83839000 size 100 align 12 gran 8 limit 838390ff flags 60000201 index 10 |
| 725 | [SPEW ] PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 |
| 726 | [DEBUG] I2C: 01:54 |
| 727 | [DEBUG] I2C: 01:55 |
| 728 | [DEBUG] I2C: 01:56 |
| 729 | [DEBUG] I2C: 01:57 |
| 730 | [DEBUG] I2C: 01:5c |
| 731 | [DEBUG] I2C: 01:5d |
| 732 | [DEBUG] I2C: 01:5e |
| 733 | [DEBUG] I2C: 01:5f |
| 734 | [DEBUG] PCI: 00:1f.5 |
| 735 | [DEBUG] PCI: 00:1f.6 |
| 736 | [SPEW ] PCI: 00:1f.6 resource base 83835000 size 1000 align 12 gran 12 limit 83835fff flags 60000201 index 10 |
| 737 | [INFO ] Done allocating resources. |
| 738 | [DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 2 / 1 ms |
| 739 | [INFO ] Enabling resources... |
| 740 | [DEBUG] PCI: 00:00.0 subsystem <- 8086/0154 |
| 741 | [DEBUG] PCI: 00:00.0 cmd <- 06 |
| 742 | [DEBUG] PCI: 00:02.0 subsystem <- 8086/0166 |
| 743 | [DEBUG] PCI: 00:02.0 cmd <- 03 |
| 744 | [DEBUG] PCI: 00:14.0 subsystem <- 8086/1e31 |
| 745 | [DEBUG] PCI: 00:14.0 cmd <- 102 |
| 746 | [DEBUG] PCI: 00:16.0 subsystem <- 8086/1e3a |
| 747 | [DEBUG] PCI: 00:16.0 cmd <- 02 |
| 748 | [DEBUG] PCI: 00:19.0 subsystem <- 17aa/21f3 |
| 749 | [DEBUG] PCI: 00:19.0 cmd <- 103 |
| 750 | [DEBUG] PCI: 00:1a.0 subsystem <- 8086/1e2d |
| 751 | [DEBUG] PCI: 00:1a.0 cmd <- 102 |
| 752 | [DEBUG] PCI: 00:1b.0 subsystem <- 8086/1e20 |
| 753 | [DEBUG] PCI: 00:1b.0 cmd <- 102 |
| 754 | [DEBUG] PCI: 00:1c.0 bridge ctrl <- 0013 |
| 755 | [DEBUG] PCI: 00:1c.0 subsystem <- 8086/1e10 |
| 756 | [DEBUG] PCI: 00:1c.0 cmd <- 106 |
| 757 | [DEBUG] PCI: 00:1c.1 bridge ctrl <- 0013 |
| 758 | [DEBUG] PCI: 00:1c.1 subsystem <- 8086/1e12 |
| 759 | [DEBUG] PCI: 00:1c.1 cmd <- 106 |
| 760 | [DEBUG] PCI: 00:1c.2 bridge ctrl <- 0013 |
| 761 | [DEBUG] PCI: 00:1c.2 subsystem <- 8086/1e14 |
| 762 | [DEBUG] PCI: 00:1c.2 cmd <- 107 |
| 763 | [DEBUG] PCI: 00:1d.0 subsystem <- 8086/1e26 |
| 764 | [DEBUG] PCI: 00:1d.0 cmd <- 102 |
| 765 | [DEBUG] PCI: 00:1f.0 subsystem <- 8086/1e55 |
| 766 | [DEBUG] PCI: 00:1f.0 cmd <- 107 |
| 767 | [DEBUG] PCI: 00:1f.2 subsystem <- 8086/1e03 |
| 768 | [DEBUG] PCI: 00:1f.2 cmd <- 03 |
| 769 | [DEBUG] PCI: 00:1f.3 subsystem <- 8086/1e22 |
| 770 | [DEBUG] PCI: 00:1f.3 cmd <- 103 |
| 771 | [DEBUG] PCI: 00:1f.6 subsystem <- 8086/1e24 |
| 772 | [DEBUG] PCI: 00:1f.6 cmd <- 02 |
| 773 | [DEBUG] PCI: 01:00.0 subsystem <- 1180/e823 |
| 774 | [DEBUG] PCI: 01:00.0 cmd <- 06 |
| 775 | [DEBUG] PCI: 02:00.0 cmd <- 02 |
| 776 | [INFO ] done. |
| 777 | [INFO ] Initializing devices... |
| 778 | [DEBUG] CPU_CLUSTER: 0 init |
| 779 | [DEBUG] MTRR: Physical address space: |
| 780 | [DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6 |
| 781 | [DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0 |
| 782 | [DEBUG] 0x00000000000c0000 - 0x000000007fffffff size 0x7ff40000 type 6 |
| 783 | [DEBUG] 0x0000000080000000 - 0x000000008fffffff size 0x10000000 type 0 |
| 784 | [DEBUG] 0x0000000090000000 - 0x000000009fffffff size 0x10000000 type 1 |
| 785 | [DEBUG] 0x00000000a0000000 - 0x00000000ffffffff size 0x60000000 type 0 |
| 786 | [DEBUG] 0x0000000100000000 - 0x000000047d5fffff size 0x37d600000 type 6 |
| 787 | [DEBUG] 0x000000047d600000 - 0x000000048d5fffff size 0x10000000 type 0 |
| 788 | [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x250 0x0606060606060606 |
| 789 | [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x258 0x0606060606060606 |
| 790 | [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x259 0x0000000000000000 |
| 791 | [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x268 0x0606060606060606 |
| 792 | [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x269 0x0606060606060606 |
| 793 | [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| 794 | [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| 795 | [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| 796 | [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| 797 | [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| 798 | [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| 799 | [SPEW ] apic_id 0x0 call enable_fixed_mtrr() |
| 800 | [DEBUG] apic_id 0x0 setup mtrr for CPU physical address size: 36 bits |
| 801 | [DEBUG] MTRR: default type WB/UC MTRR counts: 12/8. |
| 802 | [DEBUG] MTRR: UC selected as default type. |
| 803 | [DEBUG] MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6 |
| 804 | [DEBUG] MTRR: 1 base 0x0000000090000000 mask 0x0000000ff0000000 type 1 |
| 805 | [DEBUG] MTRR: 2 base 0x0000000100000000 mask 0x0000000f00000000 type 6 |
| 806 | [DEBUG] MTRR: 3 base 0x0000000200000000 mask 0x0000000e00000000 type 6 |
| 807 | [DEBUG] MTRR: 4 base 0x0000000400000000 mask 0x0000000f80000000 type 6 |
| 808 | [DEBUG] MTRR: 5 base 0x000000047d600000 mask 0x0000000fffe00000 type 0 |
| 809 | [DEBUG] MTRR: 6 base 0x000000047d800000 mask 0x0000000fff800000 type 0 |
| 810 | [DEBUG] MTRR: 7 base 0x000000047e000000 mask 0x0000000ffe000000 type 0 |
| 811 | |
| 812 | [DEBUG] MTRR check |
| 813 | [DEBUG] Fixed MTRRs : Enabled |
| 814 | [DEBUG] Variable MTRRs: Enabled |
| 815 | |
| 816 | [DEBUG] CPU has 2 cores, 4 threads enabled. |
| 817 | [DEBUG] Setting up SMI for CPU |
| 818 | [INFO ] Will perform SMM setup. |
| 819 | [INFO ] CBFS: Found 'cpu_microcode_blob.bin' @0x13940 size 0x6800 in mcache @0x7ffdd0ac |
| 820 | [DEBUG] microcode: sig=0x306a9 pf=0x10 revision=0x21 |
| 821 | [INFO ] CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz. |
| 822 | [INFO ] LAPIC 0x0 in XAPIC mode. |
| 823 | [DEBUG] CPU: APIC: 00 enabled |
| 824 | [DEBUG] CPU: APIC: 01 enabled |
| 825 | [DEBUG] CPU: APIC: 02 enabled |
| 826 | [DEBUG] CPU: APIC: 03 enabled |
| 827 | [DEBUG] Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178 |
| 828 | [DEBUG] Processing 16 relocs. Offset value of 0x00030000 |
| 829 | [DEBUG] Attempting to start 3 APs |
| 830 | [DEBUG] Waiting for 10ms after sending INIT. |
| 831 | [DEBUG] Waiting for SIPI to complete... |
| 832 | [DEBUG] done. |
| 833 | [SPEW ] APs are ready after 15us |
| 834 | [INFO ] LAPIC 0x1 in XAPIC mode. |
| 835 | [DEBUG] Waiting for SIPI to complete... |
| 836 | [DEBUG] done. |
| 837 | [SPEW ] APs are ready after 0us |
| 838 | [INFO ] AP: slot 1 apic_id 1, MCU rev: 0x00000021 |
| 839 | [INFO ] LAPIC 0x3 in XAPIC mode. |
| 840 | [INFO ] LAPIC 0x2 in XAPIC mode. |
| 841 | [INFO ] AP: slot 2 apic_id 3, MCU rev: 0x00000021 |
| 842 | [INFO ] AP: slot 3 apic_id 2, MCU rev: 0x00000021 |
| 843 | [SPEW ] APs are ready after 6800us |
| 844 | [SPEW ] smm_setup_relocation_handler: enter |
| 845 | [SPEW ] smm_setup_relocation_handler: exit |
| 846 | [DEBUG] Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1e8 memsize: 0x1e8 |
| 847 | [DEBUG] Processing 11 relocs. Offset value of 0x00038000 |
| 848 | [DEBUG] smm_module_setup_stub: stack_top = 0x80001000 |
| 849 | [DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400 |
| 850 | [DEBUG] smm_module_setup_stub: runtime.start32_offset = 0x4c |
| 851 | [DEBUG] smm_module_setup_stub: runtime.smm_size = 0x10000 |
| 852 | [DEBUG] SMM Module: stub loaded at 38000. Will call 0x7ff99768 |
| 853 | [DEBUG] Installing permanent SMM handler to 0x80000000 |
| 854 | [DEBUG] FX_SAVE [0x802ff800-0x80300000] |
| 855 | [DEBUG] HANDLER [0x802fd000-0x802ff070] |
| 856 | |
| 857 | [DEBUG] CPU 0 |
| 858 | [DEBUG] ss0 [0x802fcc00-0x802fd000] |
| 859 | [DEBUG] stub0 [0x802f5000-0x802f51e8] |
| 860 | |
| 861 | [DEBUG] CPU 1 |
| 862 | [DEBUG] ss1 [0x802fc800-0x802fcc00] |
| 863 | [DEBUG] stub1 [0x802f4c00-0x802f4de8] |
| 864 | |
| 865 | [DEBUG] CPU 2 |
| 866 | [DEBUG] ss2 [0x802fc400-0x802fc800] |
| 867 | [DEBUG] stub2 [0x802f4800-0x802f49e8] |
| 868 | |
| 869 | [DEBUG] CPU 3 |
| 870 | [DEBUG] ss3 [0x802fc000-0x802fc400] |
| 871 | [DEBUG] stub3 [0x802f4400-0x802f45e8] |
| 872 | |
| 873 | [DEBUG] stacks [0x80000000-0x80001000] |
| 874 | [DEBUG] Loading module at 0x802fd000 with entry 0x802fd7cd. filesize: 0x2028 memsize: 0x2070 |
| 875 | [DEBUG] Processing 93 relocs. Offset value of 0x802fd000 |
| 876 | [DEBUG] Loading module at 0x802f5000 with entry 0x802f5000. filesize: 0x1e8 memsize: 0x1e8 |
| 877 | [DEBUG] Processing 11 relocs. Offset value of 0x802f5000 |
| 878 | [DEBUG] smm_module_setup_stub: stack_top = 0x80001000 |
| 879 | [DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400 |
| 880 | [DEBUG] smm_module_setup_stub: runtime.start32_offset = 0x4c |
| 881 | [DEBUG] smm_module_setup_stub: runtime.smm_size = 0x300000 |
| 882 | [DEBUG] SMM Module: placing smm entry code at 802f4c00, cpu # 0x1 |
| 883 | [SPEW ] smm_place_entry_code: copying from 802f5000 to 802f4c00 0x1e8 bytes |
| 884 | [DEBUG] SMM Module: placing smm entry code at 802f4800, cpu # 0x2 |
| 885 | [SPEW ] smm_place_entry_code: copying from 802f5000 to 802f4800 0x1e8 bytes |
| 886 | [DEBUG] SMM Module: placing smm entry code at 802f4400, cpu # 0x3 |
| 887 | [SPEW ] smm_place_entry_code: copying from 802f5000 to 802f4400 0x1e8 bytes |
| 888 | [DEBUG] SMM Module: stub loaded at 802f5000. Will call 0x802fd7cd |
| 889 | [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ed000, cpu = 0 |
| 890 | [DEBUG] In relocation handler: cpu 0 |
| 891 | [DEBUG] New SMBASE=0x802ed000 IEDBASE=0x80400000 |
| 892 | [SPEW ] SMM revision: 0x00030101 |
| 893 | [DEBUG] Writing SMRR. base = 0x80000006, mask=0xff800800 |
| 894 | [DEBUG] Relocation complete. |
| 895 | [INFO ] microcode: Update skipped, already up-to-date |
| 896 | [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ecc00, cpu = 1 |
| 897 | [DEBUG] In relocation handler: cpu 1 |
| 898 | [DEBUG] New SMBASE=0x802ecc00 IEDBASE=0x80400000 |
| 899 | [SPEW ] SMM revision: 0x00030101 |
| 900 | [DEBUG] Writing SMRR. base = 0x80000006, mask=0xff800800 |
| 901 | [DEBUG] Relocation complete. |
| 902 | [INFO ] microcode: Update skipped, already up-to-date |
| 903 | [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ec400, cpu = 3 |
| 904 | [DEBUG] In relocation handler: cpu 3 |
| 905 | [DEBUG] New SMBASE=0x802ec400 IEDBASE=0x80400000 |
| 906 | [SPEW ] SMM revision: 0x00030101 |
| 907 | [DEBUG] Writing SMRR. base = 0x80000006, mask=0xff800800 |
| 908 | [DEBUG] Relocation complete. |
| 909 | [INFO ] microcode: Update skipped, already up-to-date |
| 910 | [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ec800, cpu = 2 |
| 911 | [DEBUG] In relocation handler: cpu 2 |
| 912 | [DEBUG] New SMBASE=0x802ec800 IEDBASE=0x80400000 |
| 913 | [SPEW ] SMM revision: 0x00030101 |
| 914 | [DEBUG] Writing SMRR. base = 0x80000006, mask=0xff800800 |
| 915 | [DEBUG] Relocation complete. |
| 916 | [INFO ] microcode: Update skipped, already up-to-date |
| 917 | [SPEW ] APs are ready after 1100us |
| 918 | [INFO ] Initializing CPU #0 |
| 919 | [DEBUG] CPU: vendor Intel device 306a9 |
| 920 | [DEBUG] CPU: family 06, model 3a, stepping 09 |
| 921 | [INFO ] CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz. |
| 922 | [INFO ] CPU: platform id 4 |
| 923 | [INFO ] CPU: cpuid(1) 0x306a9 |
| 924 | [INFO ] CPU: AES supported |
| 925 | [INFO ] CPU: TXT supported |
| 926 | [INFO ] CPU: VT supported |
| 927 | [DEBUG] VMX status: enabled |
| 928 | [DEBUG] IA32_FEATURE_CONTROL status: locked |
| 929 | [DEBUG] cpu: energy policy set to 6 |
| 930 | [DEBUG] model_x06ax: frequency set to 2900 |
| 931 | [INFO ] Turbo is available but hidden |
| 932 | [INFO ] Turbo is available and visible |
| 933 | [INFO ] CPU #0 initialized |
| 934 | [INFO ] Initializing CPU #1 |
| 935 | [INFO ] Initializing CPU #2 |
| 936 | [INFO ] Initializing CPU #3 |
| 937 | [DEBUG] CPU: vendor Intel device 306a9 |
| 938 | [DEBUG] CPU: family 06, model 3a, stepping 09 |
| 939 | [DEBUG] CPU: vendor Intel device 306a9 |
| 940 | [DEBUG] CPU: family 06, model 3a, stepping 09 |
| 941 | [DEBUG] CPU: vendor Intel device 306a9 |
| 942 | [DEBUG] CPU: family 06, model 3a, stepping 09 |
| 943 | [INFO ] CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz. |
| 944 | [INFO ] CPU: platform id 4 |
| 945 | [INFO ] CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz. |
| 946 | [INFO ] CPU: cpuid(1) 0x306a9 |
| 947 | [INFO ] CPU: platform id 4 |
| 948 | [INFO ] CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz. |
| 949 | [INFO ] CPU: cpuid(1) 0x306a9 |
| 950 | [INFO ] CPU: platform id 4 |
| 951 | [INFO ] CPU: AES supported |
| 952 | [INFO ] CPU: TXT supported |
| 953 | [INFO ] CPU: VT supported |
| 954 | [INFO ] CPU: cpuid(1) 0x306a9 |
| 955 | [DEBUG] VMX status: enabled |
| 956 | [INFO ] CPU: AES supported |
| 957 | [INFO ] CPU: TXT supported |
| 958 | [INFO ] CPU: VT supported |
| 959 | [DEBUG] IA32_FEATURE_CONTROL status: locked |
| 960 | [DEBUG] VMX status: enabled |
| 961 | [INFO ] CPU: AES supported |
| 962 | [INFO ] CPU: TXT supported |
| 963 | [INFO ] CPU: VT supported |
| 964 | [DEBUG] IA32_FEATURE_CONTROL status: locked |
| 965 | [DEBUG] VMX status: enabled |
| 966 | [DEBUG] IA32_FEATURE_CONTROL status: locked |
| 967 | [DEBUG] cpu: energy policy set to 6 |
| 968 | [DEBUG] model_x06ax: frequency set to 2900 |
| 969 | [INFO ] CPU #2 initialized |
| 970 | [DEBUG] cpu: energy policy set to 6 |
| 971 | [DEBUG] cpu: energy policy set to 6 |
| 972 | [DEBUG] model_x06ax: frequency set to 2900 |
| 973 | [INFO ] CPU #3 initialized |
| 974 | [DEBUG] model_x06ax: frequency set to 2900 |
| 975 | [INFO ] CPU #1 initialized |
| 976 | [SPEW ] APs are ready after 100us |
| 977 | [INFO ] bsp_do_flight_plan done after 9 msecs. |
| 978 | [DEBUG] SMI_STS: |
| 979 | [SPEW ] PM1_STS: |
| 980 | [SPEW ] PM1_EN: 100 |
| 981 | [DEBUG] GPE0_STS: GPIO15 GPIO14 GPIO11 GPIO9 GPIO7 GPIO5 GPIO4 GPIO3 GPIO0 |
| 982 | [DEBUG] ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI1 GPI0 |
| 983 | [DEBUG] TCO_STS: |
| 984 | [DEBUG] Locking SMM. |
| 985 | [DEBUG] CPU_CLUSTER: 0 init finished in 23 msecs |
| 986 | [DEBUG] PCI: 00:00.0 init |
| 987 | [DEBUG] Disabling PEG12. |
| 988 | [DEBUG] Disabling PEG11. |
| 989 | [DEBUG] Disabling PEG10. |
| 990 | [DEBUG] Disabling Device 4. |
| 991 | [DEBUG] Disabling PEG60. |
| 992 | [DEBUG] Disabling Device 7. |
| 993 | [DEBUG] Disabling PEG IO clock. |
| 994 | [DEBUG] Set BIOS_RESET_CPL |
| 995 | [DEBUG] CPU TDP: 35 Watts |
| 996 | [DEBUG] PCI: 00:00.0 init finished in 1 msecs |
| 997 | [DEBUG] PCI: 00:02.0 init |
| 998 | [DEBUG] GT Power Management Init |
| 999 | [DEBUG] IVB GT2 25W-35W Power Meter Weights |
| 1000 | [DEBUG] GT Power Management Init (post VBIOS) |
| 1001 | [DEBUG] PCI: 00:02.0 init finished in 0 msecs |
| 1002 | [DEBUG] PCI: 00:14.0 init |
| 1003 | [DEBUG] XHCI: Setting up controller.. done. |
| 1004 | [DEBUG] PCI: 00:14.0 init finished in 0 msecs |
| 1005 | [DEBUG] PCI: 00:16.0 init |
| 1006 | [NOTE ] ME: BIOS path: S3 Wake |
| 1007 | [DEBUG] ME: me_state=0, me_state_prev=0 |
| 1008 | [DEBUG] PCI: 00:16.0: Disabling device |
| 1009 | [DEBUG] PCI: 00:16.0 init finished in 0 msecs |
| 1010 | [DEBUG] PCI: 00:19.0 init |
| 1011 | [DEBUG] PCI: 00:19.0 init finished in 0 msecs |
| 1012 | [DEBUG] PCI: 00:1a.0 init |
| 1013 | [DEBUG] EHCI: Setting up controller.. done. |
| 1014 | [DEBUG] PCI: 00:1a.0 init finished in 0 msecs |
| 1015 | [DEBUG] PCI: 00:1b.0 init |
| 1016 | [DEBUG] Azalia: base = 0x83830000 |
| 1017 | [DEBUG] Azalia: codec_mask = 09 |
| 1018 | [DEBUG] azalia_audio: Initializing codec #3 |
| 1019 | [DEBUG] azalia_audio: codec viddid: 80862806 |
| 1020 | [DEBUG] azalia_audio: verb_size: 16 |
| 1021 | [DEBUG] azalia_audio: verb loaded. |
| 1022 | [DEBUG] azalia_audio: Initializing codec #0 |
| 1023 | [DEBUG] azalia_audio: codec viddid: 10ec0269 |
| 1024 | [DEBUG] azalia_audio: verb_size: 76 |
| 1025 | [DEBUG] azalia_audio: verb loaded. |
| 1026 | [DEBUG] PCI: 00:1b.0 init finished in 5 msecs |
| 1027 | [DEBUG] PCI: 00:1c.0 init |
| 1028 | [DEBUG] Initializing PCH PCIe bridge. |
| 1029 | [DEBUG] PCI: 00:1c.0 init finished in 0 msecs |
| 1030 | [DEBUG] PCI: 00:1c.1 init |
| 1031 | [DEBUG] Initializing PCH PCIe bridge. |
| 1032 | [DEBUG] PCI: 00:1c.1 init finished in 0 msecs |
| 1033 | [DEBUG] PCI: 00:1c.2 init |
| 1034 | [DEBUG] Initializing PCH PCIe bridge. |
| 1035 | [DEBUG] PCI: 00:1c.2 init finished in 0 msecs |
| 1036 | [DEBUG] PCI: 00:1d.0 init |
| 1037 | [DEBUG] EHCI: Setting up controller.. done. |
| 1038 | [DEBUG] PCI: 00:1d.0 init finished in 0 msecs |
| 1039 | [DEBUG] PCI: 00:1f.0 init |
| 1040 | [DEBUG] pch: lpc_init |
| 1041 | [INFO ] PCH: detected QM77, device id: 0x1e55, rev id 0x4 |
| 1042 | [DEBUG] IOAPIC: Initializing IOAPIC at 0xfec00000 |
| 1043 | [SPEW ] IOAPIC: Dumping registers |
| 1044 | [SPEW ] reg 0x0000: 0x00000000 |
| 1045 | [SPEW ] reg 0x0001: 0x00170020 |
| 1046 | [SPEW ] reg 0x0002: 0x00170020 |
| 1047 | [DEBUG] IOAPIC: 24 interrupts |
| 1048 | [DEBUG] IOAPIC: Clearing IOAPIC at 0xfec00000 |
| 1049 | [SPEW ] IOAPIC: vector 0x00 value 0x00000000 0x00010000 |
| 1050 | [SPEW ] IOAPIC: vector 0x01 value 0x00000000 0x00010000 |
| 1051 | [SPEW ] IOAPIC: vector 0x02 value 0x00000000 0x00010000 |
| 1052 | [SPEW ] IOAPIC: vector 0x03 value 0x00000000 0x00010000 |
| 1053 | [SPEW ] IOAPIC: vector 0x04 value 0x00000000 0x00010000 |
| 1054 | [SPEW ] IOAPIC: vector 0x05 value 0x00000000 0x00010000 |
| 1055 | [SPEW ] IOAPIC: vector 0x06 value 0x00000000 0x00010000 |
| 1056 | [SPEW ] IOAPIC: vector 0x07 value 0x00000000 0x00010000 |
| 1057 | [SPEW ] IOAPIC: vector 0x08 value 0x00000000 0x00010000 |
| 1058 | [SPEW ] IOAPIC: vector 0x09 value 0x00000000 0x00010000 |
| 1059 | [SPEW ] IOAPIC: vector 0x0a value 0x00000000 0x00010000 |
| 1060 | [SPEW ] IOAPIC: vector 0x0b value 0x00000000 0x00010000 |
| 1061 | [SPEW ] IOAPIC: vector 0x0c value 0x00000000 0x00010000 |
| 1062 | [SPEW ] IOAPIC: vector 0x0d value 0x00000000 0x00010000 |
| 1063 | [SPEW ] IOAPIC: vector 0x0e value 0x00000000 0x00010000 |
| 1064 | [SPEW ] IOAPIC: vector 0x0f value 0x00000000 0x00010000 |
| 1065 | [SPEW ] IOAPIC: vector 0x10 value 0x00000000 0x00010000 |
| 1066 | [SPEW ] IOAPIC: vector 0x11 value 0x00000000 0x00010000 |
| 1067 | [SPEW ] IOAPIC: vector 0x12 value 0x00000000 0x00010000 |
| 1068 | [SPEW ] IOAPIC: vector 0x13 value 0x00000000 0x00010000 |
| 1069 | [SPEW ] IOAPIC: vector 0x14 value 0x00000000 0x00010000 |
| 1070 | [SPEW ] IOAPIC: vector 0x15 value 0x00000000 0x00010000 |
| 1071 | [SPEW ] IOAPIC: vector 0x16 value 0x00000000 0x00010000 |
| 1072 | [SPEW ] IOAPIC: vector 0x17 value 0x00000000 0x00010000 |
| 1073 | [DEBUG] IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| 1074 | [SPEW ] IOAPIC: vector 0x00 value 0x00000000 0x00000700 |
| 1075 | [INFO ] Set power off after power failure. |
| 1076 | [INFO ] NMI sources enabled. |
| 1077 | [DEBUG] PantherPoint PM init |
| 1078 | [DEBUG] RTC: failed = 0x0 |
| 1079 | [DEBUG] pch_spi_init |
| 1080 | [DEBUG] PCI: 00:1f.0 init finished in 0 msecs |
| 1081 | [DEBUG] PCI: 00:1f.2 init |
| 1082 | [DEBUG] SATA: Initializing... |
| 1083 | [DEBUG] SATA: Controller in AHCI mode. |
| 1084 | [DEBUG] ABAR: 0x83836000 |
| 1085 | [DEBUG] PCI: 00:1f.2 init finished in 0 msecs |
| 1086 | [DEBUG] PCI: 00:1f.3 init |
| 1087 | [DEBUG] PCI: 00:1f.3 init finished in 0 msecs |
| 1088 | [DEBUG] PCI: 00:1f.6 init |
| 1089 | [DEBUG] PCI: 00:1f.6 init finished in 0 msecs |
| 1090 | [DEBUG] PCI: 01:00.0 init |
| 1091 | [DEBUG] PCI: 01:00.0 init finished in 0 msecs |
| 1092 | [DEBUG] PCI: 02:00.0 init |
| 1093 | [DEBUG] PCI: 02:00.0 init finished in 0 msecs |
| 1094 | [DEBUG] PNP: 00ff.2 init |
| 1095 | [DEBUG] PNP: 00ff.2 init finished in 0 msecs |
| 1096 | [DEBUG] smbus: PCI: 00:1f.3[0]->I2C: 01:54 init |
| 1097 | [DEBUG] I2C: 01:54 init finished in 0 msecs |
| 1098 | [DEBUG] smbus: PCI: 00:1f.3[0]->I2C: 01:55 init |
| 1099 | [DEBUG] I2C: 01:55 init finished in 0 msecs |
| 1100 | [DEBUG] smbus: PCI: 00:1f.3[0]->I2C: 01:56 init |
| 1101 | [DEBUG] I2C: 01:56 init finished in 0 msecs |
| 1102 | [DEBUG] smbus: PCI: 00:1f.3[0]->I2C: 01:57 init |
| 1103 | [DEBUG] I2C: 01:57 init finished in 0 msecs |
| 1104 | [DEBUG] smbus: PCI: 00:1f.3[0]->I2C: 01:5c init |
| 1105 | [DEBUG] Locking EEPROM RFID |
| 1106 | [DEBUG] init EEPROM done |
| 1107 | [DEBUG] I2C: 01:5c init finished in 26 msecs |
| 1108 | [DEBUG] smbus: PCI: 00:1f.3[0]->I2C: 01:5d init |
| 1109 | [DEBUG] I2C: 01:5d init finished in 0 msecs |
| 1110 | [DEBUG] smbus: PCI: 00:1f.3[0]->I2C: 01:5e init |
| 1111 | [DEBUG] I2C: 01:5e init finished in 0 msecs |
| 1112 | [DEBUG] smbus: PCI: 00:1f.3[0]->I2C: 01:5f init |
| 1113 | [DEBUG] I2C: 01:5f init finished in 0 msecs |
| 1114 | [INFO ] Devices initialized |
| 1115 | [SPEW ] Show all devs... After init. |
| 1116 | [SPEW ] Root Device: enabled 1 |
| 1117 | [SPEW ] CPU_CLUSTER: 0: enabled 1 |
| 1118 | [SPEW ] DOMAIN: 0000: enabled 1 |
| 1119 | [SPEW ] PCI: 00:00.0: enabled 1 |
| 1120 | [SPEW ] PCI: 00:01.0: enabled 0 |
| 1121 | [SPEW ] PCI: 00:01.1: enabled 0 |
| 1122 | [SPEW ] PCI: 00:01.2: enabled 0 |
| 1123 | [SPEW ] PCI: 00:02.0: enabled 1 |
| 1124 | [SPEW ] PCI: 00:04.0: enabled 0 |
| 1125 | [SPEW ] PCI: 00:06.0: enabled 0 |
| 1126 | [SPEW ] PCI: 00:14.0: enabled 1 |
| 1127 | [SPEW ] PCI: 00:16.0: enabled 0 |
| 1128 | [SPEW ] PCI: 00:16.1: enabled 0 |
| 1129 | [SPEW ] PCI: 00:16.2: enabled 0 |
| 1130 | [SPEW ] PCI: 00:16.3: enabled 0 |
| 1131 | [SPEW ] PCI: 00:19.0: enabled 1 |
| 1132 | [SPEW ] PCI: 00:1a.0: enabled 1 |
| 1133 | [SPEW ] PCI: 00:1b.0: enabled 1 |
| 1134 | [SPEW ] PCI: 00:1c.0: enabled 1 |
| 1135 | [SPEW ] PCI: 00:1c.1: enabled 1 |
| 1136 | [SPEW ] PCI: 00:1c.2: enabled 1 |
| 1137 | [SPEW ] PCI: 00:1c.3: enabled 0 |
| 1138 | [SPEW ] PCI: 00:1c.4: enabled 0 |
| 1139 | [SPEW ] PCI: 00:1c.5: enabled 0 |
| 1140 | [SPEW ] PCI: 00:1c.6: enabled 0 |
| 1141 | [SPEW ] PCI: 00:1c.7: enabled 0 |
| 1142 | [SPEW ] PCI: 00:1d.0: enabled 1 |
| 1143 | [SPEW ] PCI: 00:1e.0: enabled 0 |
| 1144 | [SPEW ] PCI: 00:1f.0: enabled 1 |
| 1145 | [SPEW ] PCI: 00:1f.2: enabled 1 |
| 1146 | [SPEW ] PCI: 00:1f.3: enabled 1 |
| 1147 | [SPEW ] PCI: 00:1f.5: enabled 0 |
| 1148 | [SPEW ] PCI: 00:1f.6: enabled 1 |
| 1149 | [SPEW ] PCI: 01:00.0: enabled 1 |
| 1150 | [SPEW ] PNP: 00ff.1: enabled 1 |
| 1151 | [SPEW ] PNP: 0c31.0: enabled 1 |
| 1152 | [SPEW ] PNP: 00ff.2: enabled 1 |
| 1153 | [SPEW ] I2C: 01:54: enabled 1 |
| 1154 | [SPEW ] I2C: 01:55: enabled 1 |
| 1155 | [SPEW ] I2C: 01:56: enabled 1 |
| 1156 | [SPEW ] I2C: 01:57: enabled 1 |
| 1157 | [SPEW ] I2C: 01:5c: enabled 1 |
| 1158 | [SPEW ] I2C: 01:5d: enabled 1 |
| 1159 | [SPEW ] I2C: 01:5e: enabled 1 |
| 1160 | [SPEW ] I2C: 01:5f: enabled 1 |
| 1161 | [SPEW ] PCI: 02:00.0: enabled 1 |
| 1162 | [SPEW ] NONE: enabled 1 |
| 1163 | [SPEW ] APIC: 00: enabled 1 |
| 1164 | [SPEW ] APIC: 01: enabled 1 |
| 1165 | [SPEW ] APIC: 03: enabled 1 |
| 1166 | [SPEW ] APIC: 02: enabled 1 |
| 1167 | [DEBUG] BS: BS_DEV_INIT run times (exec / console): 57 / 1 ms |
| 1168 | [INFO ] Found TPM ST33ZP24 by ST Microelectronics |
| 1169 | [INFO ] TPM: Handle S3 resume. |
| 1170 | [DEBUG] TPM: Resume |
| 1171 | [DEBUG] TPM: command 0x99 returned 0x0 |
| 1172 | [INFO ] TPM: setup succeeded |
| 1173 | [DEBUG] BS: BS_DEV_INIT exit times (exec / console): 89 / 0 ms |
| 1174 | [INFO ] Finalize devices... |
| 1175 | [DEBUG] PCI: 00:1f.0 final |
| 1176 | [DEBUG] apm_control: Finalizing SMM. |
| 1177 | [DEBUG] APMC done. |
| 1178 | [INFO ] Devices finalized |
| 1179 | [DEBUG] Trying to find the wakeup vector... |
| 1180 | [DEBUG] Looking on 0x000f6630 for valid checksum |
| 1181 | [DEBUG] Checksum 1 passed |
| 1182 | [DEBUG] Checksum 2 passed all OK |
| 1183 | [DEBUG] RSDP found at 0x000f6630 |
| 1184 | [DEBUG] RSDT found at 0x7ff37030 ends at 0x7ff37070 |
| 1185 | [DEBUG] FADT found at 0x7ff3ab30 |
| 1186 | [DEBUG] FACS found at 0x7ff37240 |
| 1187 | [DEBUG] OS waking vector is 0x0009a1f0 |