| *** Pre-CBMEM romstage console overflowed, log truncated! *** |
| atible clock, CAS pair. |
| Selected DRAM frequency: 800 MHz |
| Selected CAS latency : 11T |
| PLL busy... done in 30 us |
| MCU frequency is set at : 800 MHz |
| Done dimm mapping |
| Update PCI-E configuration space: |
| PCI(0, 0, 0)[a0] = 0 |
| PCI(0, 0, 0)[a4] = 2 |
| PCI(0, 0, 0)[bc] = c2a00000 |
| PCI(0, 0, 0)[a8] = 3d600000 |
| PCI(0, 0, 0)[ac] = 2 |
| PCI(0, 0, 0)[b8] = c0000000 |
| PCI(0, 0, 0)[b0] = c0a00000 |
| PCI(0, 0, 0)[b4] = c0800000 |
| Done memory map |
| Done io registers |
| t123: 1767, 6000, 7620 |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : YES |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Initializing |
| ME: Current Operation State : Bring up |
| ME: Current Operation Mode : Debug or Disabled by AltDisableBit |
| ME: Error Code : No Error |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Pseudo-global reset |
| ME: Progress Phase State : Check to see if straps say ME DISABLED |
| ME: Wrong mode : 2 |
| ME: FWS2: 0x160a0140 |
| ME: Bist in progress: 0x0 |
| ME: ICC Status : 0x0 |
| ME: Invoke MEBx : 0x0 |
| ME: CPU replaced : 0x0 |
| ME: MBP ready : 0x0 |
| ME: MFS failure : 0x1 |
| ME: Warm reset req : 0x0 |
| ME: CPU repl valid : 0x1 |
| ME: (Reserved) : 0x0 |
| ME: FW update req : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: Current state : 0xa |
| ME: Current PM event: 0x6 |
| ME: Progress code : 0x1 |
| PASSED! Tell ME that DRAM is ready |
| ME: ME is reporting as disabled, so not waiting for a response. |
| ME: FWS2: 0x160a0140 |
| ME: Bist in progress: 0x0 |
| ME: ICC Status : 0x0 |
| ME: Invoke MEBx : 0x0 |
| ME: CPU replaced : 0x0 |
| ME: MBP ready : 0x0 |
| ME: MFS failure : 0x1 |
| ME: Warm reset req : 0x0 |
| ME: CPU repl valid : 0x1 |
| ME: (Reserved) : 0x0 |
| ME: FW update req : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: Current state : 0xa |
| ME: Current PM event: 0x6 |
| ME: Progress code : 0x1 |
| ME: Requested BIOS Action: No DID Ack received |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : YES |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Initializing |
| ME: Current Operation State : Bring up |
| ME: Current Operation Mode : Debug or Disabled by AltDisableBit |
| ME: Error Code : No Error |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Pseudo-global reset |
| ME: Progress Phase State : Check to see if straps say ME DISABLED |
| memcfg DDR3 ref clock 133 MHz |
| memcfg DDR3 clock 1596 MHz |
| memcfg channel assignment: A: 0, B 1, C 2 |
| memcfg channel[0] config (00620010): |
| ECC inactive |
| enhanced interleave mode on |
| rank interleave on |
| DIMMA 4096 MB width x8 dual rank, selected |
| DIMMB 0 MB width x8 single rank |
| memcfg channel[1] config (00600010): |
| ECC inactive |
| enhanced interleave mode on |
| rank interleave on |
| DIMMA 4096 MB width x8 single rank, selected |
| DIMMB 0 MB width x8 single rank |
| CBMEM: |
| IMD: root @ 0xbffff000 254 entries. |
| IMD: root @ 0xbfffec00 62 entries. |
| External stage cache: |
| IMD: root @ 0xc03ff000 254 entries. |
| IMD: root @ 0xc03fec00 62 entries. |
| CBMEM entry for DIMM info: 0xbfffe920 |
| SMM Memory Map |
| SMRAM : 0xc0000000 0x800000 |
| Subregion 0: 0xc0000000 0x300000 |
| Subregion 1: 0xc0300000 0x100000 |
| Subregion 2: 0xc0400000 0x400000 |
| MTRR Range: Start=bf800000 End=c0000000 (Size 800000) |
| MTRR Range: Start=c0000000 End=c0800000 (Size 800000) |
| MTRR Range: Start=ff000000 End=0 (Size 1000000) |
| FMAP: area COREBOOT found @ 650200 (5963264 bytes) |
| CBFS: 'COREBOOT Locator' located CBFS at [650200:c00000) |
| CBFS: Locating 'fallback/postcar' |
| CBFS: Found @ offset 38480 size 4a38 |
| Decompressing stage fallback/postcar @ 0xbffd2fc0 (35408 bytes) |
| Loading module at 0xbffd3000 with entry 0xbffd3000. filesize: 0x4710 memsize: 0x8a10 |
| Processing 179 relocs. Offset value of 0xbdfd3000 |
| Accumulated console time in romstage 1 ms |
| |
| |
| coreboot-4.11-427-gb320bc5e0e Sun Dec 15 17:11:47 UTC 2019 postcar starting (log level: 7)... |
| FMAP: area COREBOOT found @ 650200 (5963264 bytes) |
| CBFS: 'COREBOOT Locator' located CBFS at [650200:c00000) |
| CBFS: Locating 'fallback/ramstage' |
| CBFS: Found @ offset 1a0c0 size 1cea5 |
| Decompressing stage fallback/ramstage @ 0xbff7efc0 (339192 bytes) |
| Loading module at 0xbff7f000 with entry 0xbff7f000. filesize: 0x3ddf8 memsize: 0x52cb8 |
| Processing 4120 relocs. Offset value of 0xbf17f000 |
| Accumulated console time in postcar 0 ms |
| |
| |
| coreboot-4.11-427-gb320bc5e0e Sun Dec 15 17:11:47 UTC 2019 ramstage starting (log level: 7)... |
| Normal boot. |
| BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0 |
| BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0 |
| Enumerating buses... |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| PCI: pci_scan_bus for bus 00 |
| PCI: 00:00.0 [8086/0154] enabled |
| PCI: 00:01.0 [8086/0151] disabled |
| PCI: 00:02.0 [8086/0166] enabled |
| PCI: 00:04.0 [8086/0153] enabled |
| PCI: 00:14.0 [8086/1e31] enabled |
| PCI: 00:16.0 [8086/1e3a] enabled |
| PCI: 00:16.1: Disabling device |
| PCI: 00:16.2: Disabling device |
| PCI: 00:16.3: Disabling device |
| PCI: 00:19.0 [8086/1502] enabled |
| PCI: 00:1a.0 [8086/1e2d] enabled |
| PCI: 00:1b.0 [8086/1e20] enabled |
| PCH: PCIe Root Port coalescing is enabled |
| PCI: 00:1c.0 [8086/1e10] enabled |
| PCI: 00:1c.1 [8086/1e12] enabled |
| PCI: 00:1c.2 [8086/1e14] enabled |
| PCI: 00:1c.3: Disabling device |
| PCI: 00:1c.3 [8086/1e16] disabled |
| PCI: 00:1c.4: Disabling device |
| PCI: 00:1c.4: check set enabled |
| PCI: 00:1c.5: Disabling device |
| PCI: 00:1c.6: Disabling device |
| PCI: 00:1c.7: Disabling device |
| PCI: 00:1d.0 [8086/1e26] enabled |
| PCI: 00:1e.0: Disabling device |
| PCI: 00:1e.0 [8086/2448] disabled |
| PCI: 00:1f.0 [8086/1e55] enabled |
| PCI: 00:1f.2 [8086/1e01] enabled |
| PCI: 00:1f.3 [8086/1e22] enabled |
| PCI: 00:1f.5: Disabling device |
| PCI: 00:1f.5 [8086/1e09] disabled No operations |
| PCI: 00:1f.6 [8086/1e24] enabled |
| PCI: Leftover static devices: |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:1c.4 |
| PCI: 00:1c.5 |
| PCI: 00:1c.6 |
| PCI: 00:1c.7 |
| PCI: Check your devicetree.cb. |
| PCI: pci_scan_bus for bus 01 |
| PCI: 01:00.0 [1180/e823] enabled |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| Failed to enable LTR for dev = PCI: 01:00.0 |
| scan_bus: scanning of bus PCI: 00:1c.0 took 239 usecs |
| PCI: pci_scan_bus for bus 02 |
| PCI: 02:00.0 [8086/24f3] enabled |
| Enabling Common Clock Configuration |
| ASPM: Enabled L1 |
| scan_bus: scanning of bus PCI: 00:1c.1 took 261 usecs |
| PCI: pci_scan_bus for bus 03 |
| scan_bus: scanning of bus PCI: 00:1c.2 took 47 usecs |
| PMH7: ID 05 Revision 12 |
| PNP: 00ff.1 enabled |
| PNP: 0c31.0 enabled |
| EC Firmware ID G2HT35WW-3.22, Version 4.01B |
| H8: WWAN not installed |
| PNP: 00ff.2 enabled |
| scan_bus: scanning of bus PCI: 00:1f.0 took 4633 usecs |
| bus: PCI: 00:1f.3[0]->I2C: 01:54 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled |
| scan_bus: scanning of bus PCI: 00:1f.3 took 18 usecs |
| scan_bus: scanning of bus DOMAIN: 0000 took 5606 usecs |
| scan_bus: scanning of bus Root Device took 5611 usecs |
| done |
| FMAP: area RW_MRC_CACHE found @ 600000 (65536 bytes) |
| MRC: No data in cbmem for 'RW_MRC_CACHE'. |
| BS: BS_DEV_ENUMERATE times (ms): entry 0 run 6 exit 0 |
| found VGA at PCI: 00:02.0 |
| Setting up VGA for PCI: 00:02.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| Allocating resources... |
| Reading resources... |
| Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000. |
| PNP: 00ff.1 missing read_resources |
| PNP: 00ff.2 missing read_resources |
| Done reading resources. |
| skipping PNP: 00ff.2@60 fixed resource, size=0! |
| skipping PNP: 00ff.2@62 fixed resource, size=0! |
| skipping PNP: 00ff.2@64 fixed resource, size=0! |
| skipping PNP: 00ff.2@66 fixed resource, size=0! |
| Setting resources... |
| TOUUD 0x23d600000 TOLUD 0xc2a00000 TOM 0x200000000 |
| MEBASE 0x7ffff00000 |
| IGD decoded, subtracting 32M UMA and 2M GTT |
| TSEG base 0xc0000000 size 8M |
| Available memory below 4GB: 3072M |
| Available memory above 4GB: 5078M |
| PCI: 00:02.0 10 <- [0x00e1000000 - 0x00e13fffff] size 0x00400000 gran 0x16 mem64 |
| PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64 |
| PCI: 00:02.0 20 <- [0x0000003000 - 0x000000303f] size 0x00000040 gran 0x06 io |
| PCI: 00:04.0 10 <- [0x00e1630000 - 0x00e1637fff] size 0x00008000 gran 0x0f mem64 |
| PCI: 00:14.0 10 <- [0x00e1620000 - 0x00e162ffff] size 0x00010000 gran 0x10 mem64 |
| PCI: 00:16.0 10 <- [0x00e1642000 - 0x00e164200f] size 0x00000010 gran 0x04 mem64 |
| PCI: 00:19.0 10 <- [0x00e1600000 - 0x00e161ffff] size 0x00020000 gran 0x11 mem |
| PCI: 00:19.0 14 <- [0x00e163c000 - 0x00e163cfff] size 0x00001000 gran 0x0c mem |
| PCI: 00:19.0 18 <- [0x0000003040 - 0x000000305f] size 0x00000020 gran 0x05 io |
| PCI: 00:1a.0 10 <- [0x00e163f000 - 0x00e163f3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1b.0 10 <- [0x00e1638000 - 0x00e163bfff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io |
| PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem |
| PCI: 00:1c.0 20 <- [0x00e1400000 - 0x00e14fffff] size 0x00100000 gran 0x14 bus 01 mem |
| PCI: 01:00.0 10 <- [0x00e1400000 - 0x00e14000ff] size 0x00000100 gran 0x08 mem |
| PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io |
| PCI: 00:1c.1 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 prefmem |
| PCI: 00:1c.1 20 <- [0x00e1500000 - 0x00e15fffff] size 0x00100000 gran 0x14 bus 02 mem |
| PCI: 02:00.0 10 <- [0x00e1500000 - 0x00e1501fff] size 0x00002000 gran 0x0d mem64 |
| PCI: 00:1c.2 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 03 io |
| PCI: 00:1c.2 24 <- [0x00e0000000 - 0x00e07fffff] size 0x00800000 gran 0x14 bus 03 prefmem |
| PCI: 00:1c.2 20 <- [0x00e0800000 - 0x00e0ffffff] size 0x00800000 gran 0x14 bus 03 mem |
| NONE missing set_resources |
| PCI: 00:1d.0 10 <- [0x00e1640000 - 0x00e16403ff] size 0x00000400 gran 0x0a mem |
| PNP: 00ff.1 missing set_resources |
| PNP: 00ff.2 missing set_resources |
| PCI: 00:1f.2 10 <- [0x0000003080 - 0x0000003087] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 14 <- [0x0000003090 - 0x0000003093] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 18 <- [0x0000003088 - 0x000000308f] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 1c <- [0x0000003094 - 0x0000003097] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 20 <- [0x0000003060 - 0x000000307f] size 0x00000020 gran 0x05 io |
| PCI: 00:1f.2 24 <- [0x00e163e000 - 0x00e163e7ff] size 0x00000800 gran 0x0b mem |
| PCI: 00:1f.3 10 <- [0x00e1641000 - 0x00e16410ff] size 0x00000100 gran 0x08 mem64 |
| PCI: 00:1f.6 10 <- [0x00e163d000 - 0x00e163dfff] size 0x00001000 gran 0x0c mem64 |
| Done setting resources. |
| Done allocating resources. |
| BS: BS_DEV_RESOURCES times (ms): entry 0 run 1 exit 0 |
| Enabling resources... |
| PCI: 00:00.0 subsystem <- 17aa/21fa |
| PCI: 00:00.0 cmd <- 06 |
| PCI: 00:02.0 subsystem <- 17aa/21fa |
| PCI: 00:02.0 cmd <- 03 |
| PCI: 00:04.0 cmd <- 02 |
| PCI: 00:14.0 subsystem <- 17aa/21fa |
| PCI: 00:14.0 cmd <- 102 |
| PCI: 00:16.0 subsystem <- 17aa/21fa |
| PCI: 00:16.0 cmd <- 02 |
| PCI: 00:19.0 subsystem <- 17aa/21f3 |
| PCI: 00:19.0 cmd <- 103 |
| PCI: 00:1a.0 subsystem <- 17aa/21fa |
| PCI: 00:1a.0 cmd <- 102 |
| PCI: 00:1b.0 subsystem <- 17aa/21fa |
| PCI: 00:1b.0 cmd <- 102 |
| PCI: 00:1c.0 bridge ctrl <- 0013 |
| PCI: 00:1c.0 subsystem <- 17aa/21fa |
| PCI: 00:1c.0 cmd <- 106 |
| PCI: 00:1c.1 bridge ctrl <- 0013 |
| PCI: 00:1c.1 subsystem <- 17aa/21fa |
| PCI: 00:1c.1 cmd <- 106 |
| PCI: 00:1c.2 bridge ctrl <- 0013 |
| PCI: 00:1c.2 subsystem <- 17aa/21fa |
| PCI: 00:1c.2 cmd <- 107 |
| PCI: 00:1d.0 subsystem <- 17aa/21fa |
| PCI: 00:1d.0 cmd <- 102 |
| PCI: 00:1f.0 subsystem <- 17aa/21fa |
| PCI: 00:1f.0 cmd <- 107 |
| PCI: 00:1f.2 subsystem <- 17aa/21fa |
| PCI: 00:1f.2 cmd <- 03 |
| PCI: 00:1f.3 subsystem <- 17aa/21fa |
| PCI: 00:1f.3 cmd <- 103 |
| PCI: 00:1f.6 subsystem <- 17aa/21fa |
| PCI: 00:1f.6 cmd <- 02 |
| PCI: 01:00.0 subsystem <- 17aa/21fa |
| PCI: 01:00.0 cmd <- 06 |
| PCI: 02:00.0 cmd <- 02 |
| done. |
| BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0 |
| Found TPM ST33ZP24 by ST Microelectronics |
| TPM: Startup |
| TPM: command 0x99 returned 0x0 |
| TPM: Asserting physical presence |
| TPM: command 0x4000000a returned 0x0 |
| TPM: command 0x65 returned 0x0 |
| TPM: flags disable=0, deactivated=0, nvlocked=1 |
| TPM: setup succeeded |
| Initializing devices... |
| Root Device init ... |
| Root Device init finished in 1 usecs |
| CPU_CLUSTER: 0 init ... |
| MTRR: Physical address space: |
| 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 |
| 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 |
| 0x00000000000c0000 - 0x00000000c0000000 size 0xbff40000 type 6 |
| 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 0 |
| 0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1 |
| 0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0 |
| 0x0000000100000000 - 0x000000023d600000 size 0x13d600000 type 6 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| CPU physical address size: 36 bits |
| MTRR: default type WB/UC MTRR counts: 3/5. |
| MTRR: WB selected as default type. |
| MTRR: 0 base 0x00000000c0000000 mask 0x0000000ff0000000 type 0 |
| MTRR: 1 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1 |
| MTRR: 2 base 0x00000000e0000000 mask 0x0000000fe0000000 type 0 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| CPU has 2 cores, 4 threads enabled. |
| Setting up SMI for CPU |
| Will perform SMM setup. |
| FMAP: area COREBOOT found @ 650200 (5963264 bytes) |
| CBFS: 'COREBOOT Locator' located CBFS at [650200:c00000) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 13840 size 6800 |
| microcode: sig=0x306a9 pf=0x10 revision=0x21 |
| CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. |
| Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170 |
| Processing 16 relocs. Offset value of 0x00030000 |
| Attempting to start 3 APs |
| Waiting for 10ms after sending INIT. |
| Waiting for 1st SIPI to complete...done. |
| Waiting for 2nd SIPI to complete...AP: slot 1 apic_id 1. |
| done. |
| AP: slot 2 apic_id 3. |
| AP: slot 3 apic_id 2. |
| Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1a8 memsize: 0x1a8 |
| Processing 13 relocs. Offset value of 0x00038000 |
| SMM Module: stub loaded at 0x00038000. Will call 0xbff9f328(0x00000000) |
| Installing SMM handler to 0xc0000000 |
| Loading module at 0xc0010000 with entry 0xc0010cc0. filesize: 0x5d10 memsize: 0x9e48 |
| Processing 446 relocs. Offset value of 0xc0010000 |
| Loading module at 0xc0008000 with entry 0xc0008000. filesize: 0x1a8 memsize: 0x1a8 |
| Processing 13 relocs. Offset value of 0xc0008000 |
| SMM Module: placing jmp sequence at 0xc0007c00 rel16 0x03fd |
| SMM Module: placing jmp sequence at 0xc0007800 rel16 0x07fd |
| SMM Module: placing jmp sequence at 0xc0007400 rel16 0x0bfd |
| SMM Module: stub loaded at 0xc0008000. Will call 0xc0010cc0(0x00000000) |
| Initializing Southbridge SMI... |
| |
| New SMBASE 0xc0000000 |
| In relocation handler: cpu 0 |
| New SMBASE=0xc0000000 IEDBASE=0xc0400000 |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| New SMBASE 0xbffffc00 |
| In relocation handler: cpu 1 |
| New SMBASE=0xbffffc00 IEDBASE=0xc0400000 |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| New SMBASE 0xbffff800 |
| In relocation handler: cpu 2 |
| New SMBASE=0xbffff800 IEDBASE=0xc0400000 |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| New SMBASE 0xbffff400 |
| In relocation handler: cpu 3 |
| New SMBASE=0xbffff400 IEDBASE=0xc0400000 |
| Writing SMRR. base = 0xc0000006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| Initializing CPU #0 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| Enabling cache |
| CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. |
| CPU: platform id 4 |
| CPU: cpuid(1) 0x306a9 |
| CPU: AES supported |
| CPU: TXT supported |
| CPU: VT supported |
| Setting up local APIC... |
| apic_id: 0x00 done. |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| IA32_FEATURE_CONTROL already locked |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| Turbo is available but hidden |
| Turbo is available and visible |
| CPU #0 initialized |
| Initializing CPU #1 |
| Initializing CPU #2 |
| Initializing CPU #3 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| Enabling cache |
| Enabling cache |
| CPU: vendor Intel device 306a9 |
| CPU: family 06, model 3a, stepping 09 |
| Enabling cache |
| CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. |
| CPU: platform id 4 |
| CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. |
| CPU: cpuid(1) 0x306a9 |
| CPU: platform id 4 |
| CPU: AES supported |
| CPU: TXT supported |
| CPU: VT supported |
| CPU: cpuid(1) 0x306a9 |
| Setting up local APIC... |
| CPU: AES supported |
| CPU: TXT supported |
| CPU: VT supported |
| CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. |
| Setting up local APIC... |
| apic_id: 0x03 CPU: platform id 4 |
| done. |
| apic_id: 0x02 done. |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| IA32_FEATURE_CONTROL already locked |
| IA32_FEATURE_CONTROL already locked |
| CPU: cpuid(1) 0x306a9 |
| CPU: AES supported |
| CPU: TXT supported |
| CPU: VT supported |
| Setting up local APIC... |
| apic_id: 0x01 done. |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| IA32_FEATURE_CONTROL already locked |
| model_x06ax: energy policy set to 6 |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| model_x06ax: frequency set to 2600 |
| CPU #2 initialized |
| CPU #3 initialized |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2600 |
| CPU #1 initialized |
| bsp_do_flight_plan done after 8 msecs. |
| Initializing southbridge SMI... |
| SMI_STS: |
| GPE0_STS: GPIO15 GPIO14 GPIO11 GPIO9 GPIO7 GPIO5 GPIO4 GPIO3 GPIO0 |
| ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI1 GPI0 |
| TCO_STS: |
| Locking SMM. |
| CPU_CLUSTER: 0 init finished in 21828 usecs |
| PCI: 00:00.0 init ... |
| Disabling PEG12. |
| Disabling PEG11. |
| Disabling PEG10. |
| Disabling PEG60. |
| Disabling Device 7. |
| Disabling PEG IO clock. |
| Set BIOS_RESET_CPL |
| CPU TDP: 35 Watts |
| PCI: 00:00.0 init finished in 1012 usecs |
| PCI: 00:02.0 init ... |
| GT Power Management Init |
| IVB GT2 25W-35W Power Meter Weights |
| GT Power Management Init (post VBIOS) |
| |
| [0.605017] CONFIG => |
| [0.605017] (Primary => |
| [0.605018] (Port => Internal, |
| [0.605018] Framebuffer => |
| [0.605019] (Width => 1366, |
| [0.605019] Height => 768, |
| [0.605020] Start_X => 0, |
| [0.605020] Start_Y => 0, |
| [0.605021] Stride => 1376, |
| [0.605021] V_Stride => 768, |
| [0.605022] Tiling => Linear , |
| [0.605022] Rotation => No_Rotation, |
| [0.605023] Offset => 0x00000000, |
| [0.605023] BPC => 8), |
| [0.605024] Mode => |
| [0.605024] (Dotclock => 69700000, |
| [0.605025] H_Visible => 1366, |
| [0.605025] H_Sync_Begin => 1414, |
| [0.605026] H_Sync_End => 1446, |
| [0.605026] H_Total => 1470, |
| [0.605027] V_Visible => 768, |
| [0.605027] V_Sync_Begin => 770, |
| [0.605028] V_Sync_End => 775, |
| [0.605028] V_Total => 790, |
| [0.605029] H_Sync_Active_High => True, |
| [0.605029] V_Sync_Active_High => False, |
| [0.605030] BPC => 5)), |
| [0.605030] Secondary => |
| [0.605031] (Port => Disabled, |
| [0.605031] Framebuffer => |
| [0.605032] (Width => 1, |
| [0.605032] Height => 1, |
| [0.605033] Start_X => 0, |
| [0.605033] Start_Y => 0, |
| [0.605034] Stride => 1, |
| [0.605034] V_Stride => 1, |
| [0.605035] Tiling => Linear , |
| [0.605035] Rotation => No_Rotation, |
| [0.605036] Offset => 0x00000000, |
| [0.605036] BPC => 8), |
| [0.605037] Mode => |
| [0.605037] (Dotclock => 1000000, |
| [0.605038] H_Visible => 1, |
| [0.605038] H_Sync_Begin => 1, |
| [0.605039] H_Sync_End => 1, |
| [0.605039] H_Total => 1, |
| [0.605040] V_Visible => 1, |
| [0.605040] V_Sync_Begin => 1, |
| [0.605041] V_Sync_End => 1, |
| [0.605041] V_Total => 1, |
| [0.605042] H_Sync_Active_High => False, |
| [0.605042] V_Sync_Active_High => False, |
| [0.605043] BPC => 5)), |
| [0.605043] Tertiary => |
| [0.605044] (Port => Disabled, |
| [0.605044] Framebuffer => |
| [0.605045] (Width => 1, |
| [0.605045] Height => 1, |
| [0.605046] Start_X => 0, |
| [0.605046] Start_Y => 0, |
| [0.605047] Stride => 1, |
| [0.605047] V_Stride => 1, |
| [0.605048] Tiling => Linear , |
| [0.605048] Rotation => No_Rotation, |
| [0.605049] Offset => 0x00000000, |
| [0.605049] BPC => 8), |
| [0.605050] Mode => |
| [0.605050] (Dotclock => 1000000, |
| [0.605051] H_Visible => 1, |
| [0.605051] H_Sync_Begin => 1, |
| [0.605052] H_Sync_End => 1, |
| [0.605052] H_Total => 1, |
| [0.605053] V_Visible => 1, |
| [0.605053] V_Sync_Begin => 1, |
| [0.605054] V_Sync_End => 1, |
| [0.605054] V_Total => 1, |
| [0.605055] H_Sync_Active_High => False, |
| [0.605055] V_Sync_Active_High => False, |
| [0.605056] BPC => 5))); |
| PCI: 00:02.0 init finished in 515428 usecs |
| PCI: 00:04.0 init ... |
| PCI: 00:04.0 init finished in 0 usecs |
| PCI: 00:14.0 init ... |
| XHCI: Setting up controller.. done. |
| PCI: 00:14.0 init finished in 7 usecs |
| PCI: 00:16.0 init ... |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : YES |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Initializing |
| ME: Current Operation State : Bring up |
| ME: Current Operation Mode : Debug or Disabled by AltDisableBit |
| ME: Error Code : No Error |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Pseudo-global reset |
| ME: Progress Phase State : Check to see if straps say ME DISABLED |
| intel_me_path: mbp is not ready! |
| ME: BIOS path: Error |
| PCI: 00:16.0 init finished in 18 usecs |
| PCI: 00:19.0 init ... |
| PCI: 00:19.0 init finished in 0 usecs |
| PCI: 00:1a.0 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1a.0 init finished in 11 usecs |
| PCI: 00:1b.0 init ... |
| Azalia: base = e1638000 |
| Azalia: codec_mask = 09 |
| Azalia: Initializing codec #3 |
| Azalia: codec viddid: 80862806 |
| Azalia: verb_size: 16 |
| Azalia: verb loaded. |
| Azalia: Initializing codec #0 |
| Azalia: codec viddid: 10ec0269 |
| Azalia: verb_size: 76 |
| Azalia: verb loaded. |
| PCI: 00:1b.0 init finished in 5968 usecs |
| PCI: 00:1c.0 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.0 init finished in 8 usecs |
| PCI: 00:1c.1 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.1 init finished in 10 usecs |
| PCI: 00:1c.2 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.2 init finished in 12 usecs |
| PCI: 00:1d.0 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1d.0 init finished in 12 usecs |
| PCI: 00:1f.0 init ... |
| pch: lpc_init |
| PCH: detected QM77, device id: 0x1e55, rev id 0x4 |
| IOAPIC: Initializing IOAPIC at 0xfec00000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| IOAPIC: ID = 0x02 |
| Set power off after power failure. |
| NMI sources enabled. |
| PantherPoint PM init |
| RTC: failed = 0x0 |
| RTC Init |
| Disabling ACPI via APMC: |
| done. |
| pch_spi_init |
| PCI: 00:1f.0 init finished in 701 usecs |
| PCI: 00:1f.2 init ... |
| SATA: Initializing... |
| SATA: Controller in AHCI mode. |
| ABAR: 0xe163e000 |
| PCI: 00:1f.2 init finished in 235 usecs |
| PCI: 00:1f.3 init ... |
| PCI: 00:1f.3 init finished in 7 usecs |
| PCI: 00:1f.6 init ... |
| PCI: 00:1f.6 init finished in 1 usecs |
| PCI: 01:00.0 init ... |
| PCI: 01:00.0 init finished in 15 usecs |
| PCI: 02:00.0 init ... |
| PCI: 02:00.0 init finished in 1 usecs |
| PNP: 00ff.2 init ... |
| PNP: 00ff.2 init finished in 0 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:54 init ... |
| I2C: 01:54 init finished in 1 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:55 init ... |
| I2C: 01:55 init finished in 1 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:56 init ... |
| I2C: 01:56 init finished in 1 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:57 init ... |
| I2C: 01:57 init finished in 2 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5c init ... |
| Locking EEPROM RFID |
| init EEPROM done |
| I2C: 01:5c init finished in 24362 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5d init ... |
| I2C: 01:5d init finished in 1 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5e init ... |
| I2C: 01:5e init finished in 1 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5f init ... |
| I2C: 01:5f init finished in 1 usecs |
| Devices initialized |
| BS: BS_DEV_INIT times (ms): entry 61 run 569 exit 0 |
| Finalize devices... |
| PCI: 00:1f.0 final |
| flash size 0xc00000 bytes |
| SF: Detected Opaque HW-sequencing with sector size 0x1000, total 0xc00000 |
| Devices finalized |
| BS: BS_POST_DEVICE times (ms): entry 0 run 0 exit 0 |
| BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0 |
| FMAP: area COREBOOT found @ 650200 (5963264 bytes) |
| CBFS: 'COREBOOT Locator' located CBFS at [650200:c00000) |
| CBFS: Locating 'fallback/dsdt.aml' |
| CBFS: Found @ offset 3cf00 size 39b0 |
| FMAP: area COREBOOT found @ 650200 (5963264 bytes) |
| CBFS: 'COREBOOT Locator' located CBFS at [650200:c00000) |
| CBFS: Locating 'fallback/slic' |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at bff42000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| ACPI: * FADT |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| Found 1 CPU(s) with 4 core(s) each. |
| PSS: 2601MHz power 35000 control 0x2100 status 0x2100 |
| PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 31561 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 28247 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 25084 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 22064 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 19135 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 16344 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 13666 control 0xc00 status 0xc00 |
| PSS: 2601MHz power 35000 control 0x2100 status 0x2100 |
| PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 31561 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 28247 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 25084 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 22064 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 19135 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 16344 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 13666 control 0xc00 status 0xc00 |
| PSS: 2601MHz power 35000 control 0x2100 status 0x2100 |
| PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 31561 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 28247 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 25084 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 22064 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 19135 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 16344 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 13666 control 0xc00 status 0xc00 |
| PSS: 2601MHz power 35000 control 0x2100 status 0x2100 |
| PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 |
| PSS: 2400MHz power 31561 control 0x1800 status 0x1800 |
| PSS: 2200MHz power 28247 control 0x1600 status 0x1600 |
| PSS: 2000MHz power 25084 control 0x1400 status 0x1400 |
| PSS: 1800MHz power 22064 control 0x1200 status 0x1200 |
| PSS: 1600MHz power 19135 control 0x1000 status 0x1000 |
| PSS: 1400MHz power 16344 control 0xe00 status 0xe00 |
| PSS: 1200MHz power 13666 control 0xc00 status 0xc00 |
| Generating ACPI PIRQ entries |
| \_SB.PCI0.LPCB.TPM: LPC TPM PNP: 0c31.0 |
| ACPI: * H8 |
| H8: BDC detection not implemented. Assuming BDC installed |
| H8: WWAN not installed |
| \_SB.PCI0.RP02.WF00: PCI: 02:00.0 |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MCFG |
| ACPI: added table 3/32, length now 48 |
| ACPI: * TCPA |
| TCPA log created at 0xbff31000 |
| ACPI: added table 4/32, length now 52 |
| ACPI: * MADT |
| ACPI: added table 5/32, length now 56 |
| current = bff47a90 |
| ACPI: * DMAR |
| ACPI: added table 6/32, length now 60 |
| current = bff47b60 |
| FMAP: area COREBOOT found @ 650200 (5963264 bytes) |
| CBFS: 'COREBOOT Locator' located CBFS at [650200:c00000) |
| CBFS: Locating 'vbt.bin' |
| CBFS: Found @ offset 37700 size 599 |
| Found a VBT of 4281 bytes after decompression |
| GMA: Found VBT in CBFS |
| GMA: Found valid VBT in CBFS |
| ACPI: * HPET |
| ACPI: added table 7/32, length now 64 |
| ACPI: done. |
| ACPI tables: 31648 bytes. |
| smbios_write_tables: bff30000 |
| Create SMBIOS type 17 |
| PCI: 02:00.0 (unknown) |
| SMBIOS tables: 906 bytes. |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum dfe7 |
| Writing coreboot table at 0xbff66000 |
| FMAP: area COREBOOT found @ 650200 (5963264 bytes) |
| CBFS: 'COREBOOT Locator' located CBFS at [650200:c00000) |
| CBFS: Locating 'cmos_layout.bin' |
| CBFS: Found @ offset 37d00 size 70c |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-000000000009ffff: RAM |
| 2. 00000000000a0000-00000000000fffff: RESERVED |
| 3. 0000000000100000-00000000bff2ffff: RAM |
| 4. 00000000bff30000-00000000bff7efff: CONFIGURATION TABLES |
| 5. 00000000bff7f000-00000000bffd1fff: RAMSTAGE |
| 6. 00000000bffd2000-00000000bfffffff: CONFIGURATION TABLES |
| 7. 00000000c0000000-00000000c29fffff: RESERVED |
| 8. 00000000f0000000-00000000f3ffffff: RESERVED |
| 9. 00000000fed40000-00000000fed44fff: RESERVED |
| 10. 00000000fed90000-00000000fed91fff: RESERVED |
| 11. 0000000100000000-000000023d5fffff: RAM |
| FMAP: area COREBOOT found @ 650200 (5963264 bytes) |
| CBFS: 'COREBOOT Locator' located CBFS at [650200:c00000) |
| Wrote coreboot table at: 0xbff66000, 0xa98 bytes, checksum f51d |
| coreboot table: 2736 bytes. |
| IMD ROOT 0. 0xbffff000 0x00001000 |
| IMD SMALL 1. 0xbfffe000 0x00001000 |
| CONSOLE 2. 0xbffde000 0x00020000 |
| TIME STAMP 3. 0xbffdd000 0x00000910 |
| ROMSTG STCK 4. 0xbffdc000 0x00001000 |
| AFTER CAR 5. 0xbffd2000 0x0000a000 |
| RAMSTAGE 6. 0xbff7e000 0x00054000 |
| SMM BACKUP 7. 0xbff6e000 0x00010000 |
| COREBOOT 8. 0xbff66000 0x00008000 |
| ACPI 9. 0xbff42000 0x00024000 |
| ACPI GNVS 10. 0xbff41000 0x00001000 |
| TCPA TCGLOG11. 0xbff31000 0x00010000 |
| SMBIOS 12. 0xbff30000 0x00000800 |
| IMD small region: |
| IMD ROOT 0. 0xbfffec00 0x00000400 |
| FMAP 1. 0xbfffeae0 0x0000010a |
| MEM INFO 2. 0xbfffe920 0x000001b9 |
| ROMSTAGE 3. 0xbfffe900 0x00000004 |
| BS: BS_WRITE_TABLES times (ms): entry 0 run 26 exit 0 |
| FMAP: area COREBOOT found @ 650200 (5963264 bytes) |
| CBFS: 'COREBOOT Locator' located CBFS at [650200:c00000) |
| CBFS: Locating 'fallback/payload' |
| CBFS: Found @ offset 5dd80 size af51c |
| Checking segment from ROM address 0xffaadfb8 |
| Checking segment from ROM address 0xffaadfd4 |
| Loading segment from ROM address 0xffaadfb8 |
| code (compression=1) |
| New segment dstaddr 0x00800000 memsize 0x410000 srcaddr 0xffaadff0 filesize 0xaf4e4 |
| Loading Segment: addr: 0x00800000 memsz: 0x0000000000410000 filesz: 0x00000000000af4e4 |
| using LZMA |
| Loading segment from ROM address 0xffaadfd4 |
| Entry Point 0x008008f0 |
| BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 267 exit 0 |
| ICH-NM10-PCH: watchdog disabled |
| Jumping to boot code at 0x008008f0(0xbff66000) |
| |